Changeset 468f21e in rtems


Ignore:
Timestamp:
10/24/22 11:29:17 (8 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
f6bcf163
Parents:
d574e08
git-author:
Sebastian Huber <sebastian.huber@…> (10/24/22 11:29:17)
git-committer:
Sebastian Huber <sebastian.huber@…> (10/24/22 11:34:32)
Message:

bsps: Add Cache Manager implementation group

Update #3707.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/shared/cache/cacheimpl.h

    rd574e08 r468f21e  
     1/**
     2 * @file
     3 *
     4 * @ingroup RTEMSImplClassicCache
     5 *
     6 * @brief This header file contains the implementation of the
     7 *   @ref RTEMSAPIClassicCache.
     8 */
     9
    110/*
    211 *  Cache Manager
     
    1221 */
    1322
    14 /*
    15  * The functions in this file implement the API to the RTEMS Cache Manager.
    16  * This file is intended to be included in a cache implemention source file
    17  * provided by the architecture or BSP, e.g.
     23/**
     24 * @file
     25 *
     26 * The functions in this file implement the API to the
     27 * @ref RTEMSAPIClassicCache.  This file is intended to be included in a cache
     28 * implemention source file provided by the architecture or BSP, e.g.
    1829 *
    1930 *  - bsps/${RTEMS_CPU}/shared/cache/cache.c
     
    2334 * afterwards this file is included, e.g.
    2435 *
     36 *  @code
    2537 *  #define CPU_DATA_CACHE_ALIGNMENT XYZ
    2638 *  ...
    2739 *  #include "../../../bsps/shared/cache/cacheimpl.h"
    28  *
    29  * The cache implementation source file shall define
    30  *
     40 *  @endcode
     41 *
     42 * The cache implementation source file shall define
     43 *
     44 *  @code
    3145 *  #define CPU_DATA_CACHE_ALIGNMENT <POSITIVE INTEGER>
     46 *  @endcode
    3247 *
    3348 * to enable the data cache support.
     
    3550 * The cache implementation source file shall define
    3651 *
     52 *  @code
    3753 *  #define CPU_INSTRUCTION_CACHE_ALIGNMENT <POSITIVE INTEGER>
     54 *  @endcode
    3855 *
    3956 * to enable the instruction cache support.
     
    4158 * The cache implementation source file shall define
    4259 *
     60 *  @code
    4361 *  #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
     62 *  @endcode
    4463 *
    4564 * if it provides cache maintenance functions which operate on multiple lines.
     
    5069 * The cache implementation source file shall define
    5170 *
     71 *  @code
    5272 *  #define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
     73 *  @endcode
    5374 *
    5475 * if it provides functions to get the data and instruction cache sizes by
     
    5778 * The cache implementation source file shall define
    5879 *
     80 *  @code
    5981 *  #define CPU_CACHE_SUPPORT_PROVIDES_INSTRUCTION_SYNC_FUNCTION
     82 *  @endcode
    6083 *
    6184 * if special instructions must be used to synchronize the instruction caches
     
    6487 * The cache implementation source file shall define
    6588 *
     89 *  @code
    6690 *  #define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
     91 *  @endcode
    6792 *
    6893 * if an external implementation of rtems_cache_disable_data() is provided,
     
    7196 * The cache implementation source file shall define
    7297 *
     98 *  @code
    7399 *  #define CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING
     100 *  @endcode
    74101 *
    75102 * if the hardware provides no instruction cache snooping and the instruction
     
    98125#error "CPU_INSTRUCTION_CACHE_ALIGNMENT is greater than CPU_CACHE_LINE_BYTES"
    99126#endif
     127
     128/**
     129 * @defgroup RTEMSImplClassicCache Cache Manager
     130 *
     131 * @ingroup RTEMSImplClassic
     132 *
     133 * @brief This group contains the Cache Manager implementation.
     134 */
    100135
    101136/*
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