Changeset 44237e3c in rtems


Ignore:
Timestamp:
Sep 25, 2008, 8:07:47 PM (11 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, master
Children:
a73ebc92
Parents:
321cce4
Message:

2008-09-25 Allan Hessenflow <allanh@…>

  • clock/clock.c, include/bf533.h, include/bf537.h, include/sicRegs.h:
Location:
c/src/lib/libcpu/bfin
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/bfin/ChangeLog

    r321cce4 r44237e3c  
     12008-09-25      Allan Hessenflow <allanh@kallisti.com>
     2
     3        * clock/clock.c, include/bf533.h, include/bf537.h, include/sicRegs.h:
     4
    152008-09-06      Ralf Corsépius <ralf.corsepius@rtems.org>
    26
  • c/src/lib/libcpu/bfin/clock/clock.c

    r321cce4 r44237e3c  
    2020#include <libcpu/coreTimerRegs.h>
    2121
     22#if (BFIN_ON_SKYEYE)
     23#define CLOCK_DRIVER_USE_FAST_IDLE
     24#endif
    2225
    2326volatile uint32_t Clock_driver_ticks;
  • c/src/lib/libcpu/bfin/include/bf533.h

    r321cce4 r44237e3c  
    110110/* System Interrupt Controller vectors */
    111111
     112#define SIC_IAR_COUNT                                      3
     113
    112114#define SIC_PLL_WAKEUP_VECTOR                              0
    113115#define SIC_DMA_ERROR_VECTOR                               1
  • c/src/lib/libcpu/bfin/include/bf537.h

    r321cce4 r44237e3c  
    174174/* System Interrupt Controller vectors */
    175175
     176#define SIC_IAR_COUNT                                      4
     177
    176178#define SIC_PLL_WAKEUP_VECTOR                              0
    177179#define SIC_DMA_ERROR_VECTOR                               1
  • c/src/lib/libcpu/bfin/include/sicRegs.h

    r321cce4 r44237e3c  
    1818#define SIC_IMASK                (SIC_BASE_ADDRESS + 0x000c)
    1919#define SIC_IAR_BASE_ADDRESS     (SIC_BASE_ADDRESS + 0x0010)
    20 #define SIC_IAR_COUNT                                      4
    2120#define SIC_IAR_PITCH                                   0x04
    2221#define SIC_IAR0                 (SIC_BASE_ADDRESS + 0x0010)
     22#if SIC_IAR_COUNT > 1
    2323#define SIC_IAR1                 (SIC_BASE_ADDRESS + 0x0014)
     24#endif
     25#if SIC_IAR_COUNT > 2
    2426#define SIC_IAR2                 (SIC_BASE_ADDRESS + 0x0018)
     27#endif
     28#if SIC_IAR_COUNT > 3
    2529#define SIC_IAR3                 (SIC_BASE_ADDRESS + 0x001c)
     30#endif
    2631#define SIC_ISR                  (SIC_BASE_ADDRESS + 0x0020)
    2732#define SIC_IWR                  (SIC_BASE_ADDRESS + 0x0024)
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