Changeset 4383f3a in rtems


Ignore:
Timestamp:
Nov 27, 2001, 12:09:48 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
3f381864
Parents:
9393f7fa
Message:

2001-11-26 Ralf Corsepius <corsepiu@…>

  • custom/gen405.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG; Remove make-target-options.
  • custom/helas403.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG; Remove make-target-options.
  • custom/mbx8xx.cfg: Remove INSTRUCTION_CACHE_ENABLE, DATA_CACHE_ENABLE.
  • custom/mbx860_005b.cfg: Remove INSTRUCTION_CACHE_ENABLE, DATA_CACHE_ENABLE.
  • custom/mpc8260ads.cfg: Remove INSTRUCTION_CACHE_ENABLE, DATA_CACHE_ENABLE.
Location:
make
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • make/ChangeLog

    r9393f7fa r4383f3a  
     1
     22001-11-26      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
     3
     4
     5        * custom/gen405.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
     6        Remove make-target-options.
     7        * custom/helas403.cfg:  Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
     8        Remove make-target-options.
     9        * custom/mbx8xx.cfg: Remove INSTRUCTION_CACHE_ENABLE,
     10        DATA_CACHE_ENABLE.
     11        * custom/mbx860_005b.cfg: Remove INSTRUCTION_CACHE_ENABLE,
     12        DATA_CACHE_ENABLE.
     13        * custom/mpc8260ads.cfg: Remove INSTRUCTION_CACHE_ENABLE,
     14        DATA_CACHE_ENABLE.
    115
    2162001-11-25      Joel Sherrill <joel@OARcorp.com>
  • make/custom/gen405.cfg

    r9393f7fa r4383f3a  
    1919# This is the actual bsp directory used during the build process.
    2020RTEMS_BSP_FAMILY=gen405
    21 
    22 #  This section makes the target dependent options file.
    23 
    24 #  PPC_VECTOR_FILE_BASE (PowerPC)
    25 #     This defines the base address of the exception table.
    26 #     NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
    27 #       
    28 #  PPC_USE_SPRG (RTEMS PowerPC port)
    29 #     If defined, then the PowerPC specific code in RTEMS will use some
    30 #     of the special purpose registers to slightly optimize interrupt
    31 #     response time.  The use of these registers can conflict with
    32 #     other tools like debuggers.
    33 
    34 define make-target-options
    35         @echo "#define PPC_VECTOR_FILE_BASE 0x0100"         >>$@
    36         @echo "#define PPC_USE_SPRG 1"                      >>$@
    37 endef
    3821
    3922#  This contains the compiler options necessary to select the CPU model
  • make/custom/helas403.cfg

    r9393f7fa r4383f3a  
    1313# This is the actual bsp directory used during the build process.
    1414RTEMS_BSP_FAMILY=helas403
    15 
    16 #  This section makes the target dependent options file.
    17 
    18 #  PPC_VECTOR_FILE_BASE (PowerPC)
    19 #     This defines the base address of the exception table.
    20 #     NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
    21 #       
    22 #  PPC_USE_SPRG (RTEMS PowerPC port)
    23 #     If defined, then the PowerPC specific code in RTEMS will use some
    24 #     of the special purpose registers to slightly optimize interrupt
    25 #     response time.  The use of these registers can conflict with
    26 #     other tools like debuggers.
    27 
    28 define make-target-options
    29         @echo "#define PPC_VECTOR_FILE_BASE 0x0100"         >>$@
    30         @echo "#define PPC_USE_SPRG 1"                      >>$@
    31 endef
    3215
    3316#  This contains the compiler options necessary to select the CPU model
  • make/custom/mbx860_005b.cfg

    r9393f7fa r4383f3a  
    2222        @echo "#define mpc$(CPU_TYPE) 1"                    >>$@
    2323        @echo                                               >>$@
    24         @echo "#define INSTRUCTION_CACHE_ENABLE 1"          >>$@
    25         @echo "#define DATA_CACHE_ENABLE 1"                 >>$@
    26         @echo                                               >>$@
    2724endef
  • make/custom/mbx8xx.cfg

    r9393f7fa r4383f3a  
    6565#  MBX8xx-specific options:
    6666#
    67 #  INSTRUCTION_CACHE_ENABLE (BSP--RTEMS)
    68 #    If defined, the instruction cache will be enabled after address translation
    69 #    is turned on.
    70 #
    71 #  DATA_CACHE_ENABLE (BSP--RTEMS)
    72 #    If defined, the data cache will be enabled after address translation
    73 #    is turned on.
    74 #   
    7567
    7668define make-target-options
     
    7971        @echo "#endif"                                      >>$@
    8072        @echo "#define mpc$(CPU_TYPE) 1"                    >>$@
    81         @echo                                               >>$@
    82         @echo "#define INSTRUCTION_CACHE_ENABLE 1"          >>$@
    83         @echo "#define DATA_CACHE_ENABLE 1"                 >>$@
    8473        @echo                                               >>$@
    8574endef
  • make/custom/mpc8260ads.cfg

    r9393f7fa r4383f3a  
    3333        @echo "#define PPC_ABI PPC_ABI_EABI"                >>$@
    3434        @echo "#define PPC_ASM PPC_ASM_ELF"                 >>$@
    35         @echo "#define INSTRUCTION_CACHE_ENABLE 0"          >>$@
    36         @echo "#define DATA_CACHE_ENABLE 0"                 >>$@
    3735endef
    3836
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