Index: c/src/lib/libcpu/i386/cpu.h
===================================================================
--- c/src/lib/libcpu/i386/cpu.h	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/cpu.h	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -1,4 +1,4 @@
 /*
- * cpu.h  - This file contains definitions for data structure related 
+ * cpu.h  - This file contains definitions for data structure related
  *          to Intel system programming. More information can be found
  *	    on Intel site and more precisely in the following book :
@@ -148,5 +148,5 @@
 
 /*
- * Type definition for raw interrupts. 
+ * Type definition for raw interrupts.
  */
 
@@ -168,7 +168,7 @@
    * board specific hardware to manage interrupts and thus the
    * "on" routine must enable the irq both at device and PIC level.
-   * 
-   */
-    rtems_raw_irq_enable	on;	
+   *
+   */
+    rtems_raw_irq_enable	on;
   /*
    * function for disabling raw interrupts. In order to be consistent
@@ -177,5 +177,5 @@
    * board specific hardware to manage interrupts and thus the
    * "on" routine must disable the irq both at device and PIC level.
-   * 
+   *
    */
   rtems_raw_irq_disable		off;
@@ -205,5 +205,5 @@
 /*
  * C callable function enabling to get handler currently connected to a vector
- * 
+ *
  */
 rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset);
@@ -336,5 +336,5 @@
   unsigned int		table_entry;
 } page_table_entry;
- 
+
 /*
  * definitions related to page table entry
@@ -372,10 +372,10 @@
 extern int 	_CPU_map_phys_address
                       (void **mappedAddress, void *physAddress,
-		       int size, int flag); 
-extern int 	_CPU_unmap_virt_address (void *mappedAddress, int size); 
+		       int size, int flag);
+extern int 	_CPU_unmap_virt_address (void *mappedAddress, int size);
 extern int 	_CPU_change_memory_mapping_attribute
                          (void **newAddress, void *mappedAddress,
 			  unsigned int size, unsigned int flag);
-extern int  	_CPU_display_memory_attribute(); 
+extern int  	_CPU_display_memory_attribute();
 
 # endif /* ASM */
Index: c/src/lib/libcpu/i386/cpuModel.S
===================================================================
--- c/src/lib/libcpu/i386/cpuModel.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/cpuModel.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -6,5 +6,5 @@
  *  Intel also provides public similar code in the book
  *  called :
- *	
+ *
  *	Pentium Processor Family
  *		Developer Family
@@ -12,7 +12,7 @@
  *
  * At the following place :
- *	
+ *
  *	Chapter 5 :	Feature determination
- *	Chapter 25:	CPUID instruction	
+ *	Chapter 25:	CPUID instruction
  *
  *  COPYRIGHT (c) 1998 valette@crf.canon.fr
@@ -29,14 +29,14 @@
 
 BEGIN_CODE
-	PUBLIC(checkCPUtypeSetCr0); 
-/* 
- * check Processor type: 386, 486, 6x86(L) or CPUID capable processor 
+	PUBLIC(checkCPUtypeSetCr0);
+/*
+ * check Processor type: 386, 486, 6x86(L) or CPUID capable processor
  */
 
 SYM (checkCPUtypeSetCr0):
 	/*
-	 *  Assume 386 for now 
-	 */
-	movl $3, SYM (x86) 
+	 *  Assume 386 for now
+	 */
+	movl $3, SYM (x86)
 	/*
 	 * Start using the EFLAGS AC bit determination method described in
@@ -45,20 +45,20 @@
 	 */
 	pushfl				/* save EFLAGS			*/
-	
+
 	pushfl				/* Get EFLAGS in EAX		*/
 	popl eax
-	
+
 	movl eax,ecx			/* save original EFLAGS in ECX	*/
 	xorl $EFLAGS_ALIGN_CHECK,eax	/* flip AC bit in EAX		*/
 	pushl eax			/* set EAX as EFLAGS		*/
-	popfl			
+	popfl
 	pushfl				/* Get new EFLAGS in EAX	*/
 	popl eax
-	
+
 	xorl ecx,eax			/* check if AC bit changed	*/
-	andl $EFLAGS_ALIGN_CHECK,eax	
+	andl $EFLAGS_ALIGN_CHECK,eax
 	je is386			/* If not : we have a 386	*/
 	/*
-	 *  Assume 486 for now 
+	 *  Assume 486 for now
 	 */
 	movl $4,SYM (x86)
@@ -66,20 +66,20 @@
 	xorl $EFLAGS_ID,eax		/* flip  ID flag		*/
 	pushl eax			/* set EAX as EFLAGS		*/
-	popfl				
+	popfl
 	pushfl				/* Get new EFLAGS in EAX	*/
-	popl eax	
-			
+	popl eax
+
 	xorl ecx,eax			/* check if ID bit changed	*/
 	andl $EFLAGS_ID,eax
 
-	/* 
+	/*
 	 * if we are on a straight 486DX,
 	 * SX, or 487SX we can't change it
-	 * OTOH 6x86MXs and MIIs check OK 
+	 * OTOH 6x86MXs and MIIs check OK
 	 * Also if we are on a Cyrix 6x86(L)
 	 */
 	je is486x
 
-isnew:	
+isnew:
 	/*
 	 * restore original EFLAGS
@@ -88,5 +88,5 @@
 	incl SYM(have_cpuid)	/* we have CPUID instruction */
 
-	/* use it to get :	
+	/* use it to get :
 	 *	processor type,
 	 *	processor model,
@@ -94,24 +94,24 @@
 	 * by using it with EAX = 1
 	 */
-	movl $1, eax		
-	cpuid			
+	movl $1, eax
+	cpuid
 	movl ecx,SYM(x86_capability_x) /* store ecx feature flags */
 
 	movb al, cl		/* save reg for future use */
-	
+
 	andb $0x0f,ah		/* mask processor family   */
 	movb ah,SYM (x86)	/* put result in x86 var   */
-	
+
 	andb $0xf0, al		/* get model		   */
 	shrb $4, al
 	movb al,SYM (x86_model) /* store it in x86_model   */
-	
+
 	andb $0x0f, cl		/* get mask revision	   */
 	movb cl,SYM (x86_mask)  /* store it in x86_mask	   */
-	
+
 	movl edx,SYM(x86_capability)	/* store feature flags in x86_capability */
-	
+
 	/* get vendor info by using CPUID with EXA = 0 */
-	xorl eax, eax		
+	xorl eax, eax
 	cpuid
 
@@ -120,7 +120,7 @@
 	 * x86_vendor_id variable.
 	 */
-	movl ebx,SYM(x86_vendor_id)	
-	movl edx,SYM(x86_vendor_id)+4	
-	movl ecx,SYM(x86_vendor_id)+8	
+	movl ebx,SYM(x86_vendor_id)
+	movl edx,SYM(x86_vendor_id)+4
+	movl ecx,SYM(x86_vendor_id)+8
 
 	movl cr0,eax		/* 486+ */
@@ -181,5 +181,5 @@
         getCx86($0xfe)          /* DIR0 : let's check this is a 6x86(L) */
         andb $0xf0,al		/* should be 3xh */
-	cmpb $0x30,al		
+	cmpb $0x30,al
 	jne n6x86
         getCx86($0xe9)          /* CCR5 : we reset the SLOP bit */
@@ -207,5 +207,5 @@
 	call check_x87
 	ret
-	
+
 
 /*
@@ -229,5 +229,5 @@
 
 END_CODE
-	
+
 BEGIN_DATA
 	PUBLIC(x86)
@@ -240,19 +240,19 @@
 	PUBLIC(hard_math)
 
-SYM(x86):	
-	.byte 0
-SYM(have_cpuid):	
+SYM(x86):
+	.byte 0
+SYM(have_cpuid):
 	.long 0
-SYM(x86_model):	
-	.byte 0
-SYM(x86_mask):	
-	.byte 0
-SYM(x86_capability):	
-	.long 0		
-SYM(x86_capability_x):	
-	.long 0		
-SYM(x86_vendor_id):	
+SYM(x86_model):
+	.byte 0
+SYM(x86_mask):
+	.byte 0
+SYM(x86_capability):
+	.long 0
+SYM(x86_capability_x):
+	.long 0
+SYM(x86_vendor_id):
 	.zero 13
-SYM(hard_math):	
+SYM(hard_math):
 	.byte 0
 END_DATA
Index: c/src/lib/libcpu/i386/cpuModel.h
===================================================================
--- c/src/lib/libcpu/i386/cpuModel.h	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/cpuModel.h	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -28,5 +28,5 @@
 extern int x86_capability_x;    /* cpuid:ECX */
 extern char x86_vendor_id[13];
-extern int have_cpuid;  
+extern int have_cpuid;
 extern unsigned char Cx86_step; /* cyrix processor identification */
 
Index: c/src/lib/libcpu/i386/displayCpu.c
===================================================================
--- c/src/lib/libcpu/i386/displayCpu.c	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/displayCpu.c	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -135,5 +135,5 @@
 	const char *p=NULL;
 	int i;
-	
+
 	if (x86_model < 16)
 		for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++)
@@ -188,6 +188,6 @@
 	"24",  "25", "26", "27", "28", "29", "30", "31"
   };
-         
-  printk("cpu         : %c86\n", x86+'0'); 
+
+  printk("cpu         : %c86\n", x86+'0');
   printk("model       : %s\n",
 	 have_cpuid ? getmodel(x86, x86_model) : "unknown");
@@ -195,5 +195,5 @@
     strcpy(x86_vendor_id, "unknown");
   printk("vendor_id   : %s\n", x86_vendor_id);
-        
+
   if (x86_mask)
     if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
@@ -205,5 +205,5 @@
   else
     printk("stepping    : unknown\n");
-        
+
   printk("fpu         : %s\n", (hard_math ? "yes" : "no"));
   printk("cpuid       : %s\n", (have_cpuid ? "yes" : "no"));
Index: c/src/lib/libcpu/i386/idtr.S
===================================================================
--- c/src/lib/libcpu/i386/idtr.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/idtr.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -27,5 +27,5 @@
 PUBLIC (i386_get_info_from_GDTR)
 PUBLIC (i386_set_GDTR)
-		
+
 SYM (i386_get_info_from_IDTR):
 	movl	4(esp), ecx	    /* get location where table address */
@@ -53,5 +53,5 @@
 		           unsigned limit);
  */
-SYM (i386_set_IDTR):			
+SYM (i386_set_IDTR):
 
 	leal	4(esp), edx	    /* load in edx address of input */
@@ -74,6 +74,6 @@
 				     unsigned* limit);
  */
-	
-SYM (i386_get_info_from_GDTR):	
+
+SYM (i386_get_info_from_GDTR):
 	movl	4(esp), ecx	    /* get location where table address */
                                     /*    must be stored */
@@ -98,5 +98,5 @@
  *   extern void i386_set_GDTR (segment_descriptors*, unsigned limit);
  */
-SYM (i386_set_GDTR):			
+SYM (i386_set_GDTR):
 
 	leal	4(esp), edx	    /* load in edx address of input */
@@ -112,5 +112,5 @@
 
 	ret
-		
+
 END_CODE
 
Index: c/src/lib/libcpu/i386/page.c
===================================================================
--- c/src/lib/libcpu/i386/page.c	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/i386/page.c	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -81,5 +81,5 @@
   unsigned int physPage;
   int nbTables=0;
-  
+
   /*
    * rtemsFreeMemStart is the last valid 32-bits address
@@ -87,14 +87,14 @@
    */
   memorySize = rtemsFreeMemStart + 4;
-  
+
   nbPages = ( (memorySize - 1) / PG_SIZE ) + 1;
   nbTables = ( (memorySize - 1) / FOUR_MB ) + 2;
 
   /* allocate 1 page more to page alignement */
-  Tables = (char *)malloc( (nbTables + 1)*sizeof(page_table) ); 
+  Tables = (char *)malloc( (nbTables + 1)*sizeof(page_table) );
   if ( Tables == NULL ){
     return -1; /*unable to allocate memory */
   }
-  
+
   /* 4K-page alignement */
   Tables += (PG_SIZE - (int)Tables) & 0xFFF;
@@ -140,5 +140,5 @@
       pageTable ++;
     }
-      
+
     nbInitPages++;
   }
@@ -150,6 +150,6 @@
   i386_set_cr3( regCr3.i );
 
-  _CPU_enable_cache();  
-  _CPU_enable_paging();  
+  _CPU_enable_cache();
+  _CPU_enable_paging();
 
   return 0;
@@ -190,5 +190,5 @@
   int    flag
 )
-{ 
+{
   page_table *localPageTable;
   unsigned int lastAddress, countAddress;
@@ -196,5 +196,5 @@
   linear_address virtualAddress;
   unsigned char pagingWasEnabled;
-  
+
   pagingWasEnabled = 0;
 
@@ -216,5 +216,5 @@
     if (pageDirectory->pageDirEntry[directoryEntry].bits.page_frame_address == 0){
       /* We allocate 2 pages to perform 4k-page alignement */
-      Tables = (char *)malloc(2*sizeof(page_table)); 
+      Tables = (char *)malloc(2*sizeof(page_table));
       if ( Tables == NULL ){
 	if (pagingWasEnabled)
@@ -226,5 +226,5 @@
 
       /* Reset Table */
-      memset( Tables, 0, sizeof(page_table) );      
+      memset( Tables, 0, sizeof(page_table) );
       pageDirectory->pageDirEntry[directoryEntry].bits.page_frame_address =
 	(unsigned int)Tables >> 12;
@@ -238,5 +238,5 @@
       pageDirectory->pageDirEntry[directoryEntry].bits.present        = 1;
     }
-      
+
 
     localPageTable = (page_table *)(pageDirectory->
@@ -265,5 +265,5 @@
     countAddress += PG_SIZE;
     tableEntry++;
-    if (tableEntry >= MAX_ENTRY){      
+    if (tableEntry >= MAX_ENTRY){
       tableEntry = 0;
       directoryEntry++;
@@ -286,5 +286,5 @@
   unsigned int dirCount, pageCount;
   page_table *localPageTable;
-  
+
   if (tableEntry == 0){
     dirCount  = directoryEntry - 1;
@@ -295,5 +295,5 @@
     pageCount = tableEntry - 1;
   }
-    
+
   while (1){
 
@@ -304,5 +304,5 @@
     if (localPageTable->pageTableEntry[pageCount].bits.present == 1){
       pageCount++;
-      if (pageCount >= MAX_ENTRY){      
+      if (pageCount >= MAX_ENTRY){
 	pageCount = 0;
 	dirCount++;
@@ -313,5 +313,5 @@
 
     if (pageCount == 0) {
-      if (dirCount == 0){	
+      if (dirCount == 0){
 	break;
       }
@@ -319,5 +319,5 @@
 	pageCount = MAX_ENTRY - 1;
 	dirCount-- ;
-      }	
+      }
     }
     else
@@ -328,6 +328,6 @@
   tableEntry = pageCount;
 }
-      
-  
+
+
 /*
  * Unmap the virtual address from the tables
@@ -339,5 +339,5 @@
   int   size
 )
-{ 
+{
 
   linear_address linearAddr;
@@ -346,5 +346,5 @@
   unsigned int dirCount ;
   unsigned char pagingWasEnabled;
-  
+
   pagingWasEnabled = 0;
 
@@ -372,5 +372,5 @@
 				    pageDirEntry[linearAddr.bits.directory].bits.
 				    page_frame_address << 12);
-    
+
     if (localPageTable->pageTableEntry[linearAddr.bits.page].bits.present == 0){
       if (pagingWasEnabled)
@@ -378,7 +378,7 @@
       return -1;
     }
-  
-    localPageTable->pageTableEntry[linearAddr.bits.page].bits.present = 0;    
-    
+
+    localPageTable->pageTableEntry[linearAddr.bits.page].bits.present = 0;
+
     linearAddr.address += PG_SIZE ;
   }
@@ -391,5 +391,5 @@
 
 /*
- * Modify the flags PRESENT, WRITABLE, USER, WRITE_TROUGH, CACHE_DISABLE 
+ * Modify the flags PRESENT, WRITABLE, USER, WRITE_TROUGH, CACHE_DISABLE
  * of the page's descriptor.
  */
@@ -401,5 +401,5 @@
   unsigned int   flag
 )
-{ 
+{
 
   linear_address linearAddr;
@@ -407,5 +407,5 @@
   unsigned int lastAddr ;
   unsigned char pagingWasEnabled;
-  
+
   pagingWasEnabled = 0;
 
@@ -414,5 +414,5 @@
     _CPU_disable_paging();
   }
-  
+
   linearAddr.address  = (unsigned int)mappedAddress;
   lastAddr = (unsigned int)mappedAddress + (size - 1);
@@ -431,5 +431,5 @@
 				    pageDirEntry[linearAddr.bits.directory].bits.
 				    page_frame_address << 12);
-    
+
     if (localPageTable->pageTableEntry[linearAddr.bits.page].bits.present == 0){
       if (pagingWasEnabled)
@@ -437,10 +437,10 @@
       return -1;
     }
-  
+
     localPageTable->pageTableEntry[linearAddr.bits.page].table_entry &= ~MASK_FLAGS ;
     localPageTable->pageTableEntry[linearAddr.bits.page].table_entry |= flag ;
-    
+
     linearAddr.address += PG_SIZE ;
-  }  
+  }
 
   if (newAddress != NULL)
@@ -461,5 +461,5 @@
 
 int  _CPU_display_memory_attribute(void)
-{ 
+{
   unsigned int dirCount, pageCount;
   cr0 regCr0;
@@ -469,7 +469,7 @@
   unsigned int maxPage;
   unsigned char pagingWasEnabled;
-  
+
   regCr0.i = i386_get_cr0();
-  
+
   printk("\n\n********* MEMORY CACHE CONFIGURATION *****\n");
 
@@ -479,8 +479,8 @@
   if (regCr0.cr0.paging == 0)
     return 0;
-  
+
   prevPresent = 0;
   prevCache   = 1;
-  
+
   pagingWasEnabled = 0;
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/bindec.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/bindec.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/bindec.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -22,5 +22,5 @@
 //	Algorithm:
 //
-//	A1.	Set RM and size ext;  Set SIGMA = sign of input.  
+//	A1.	Set RM and size ext;  Set SIGMA = sign of input.
 //		The k-factor is saved for use in d7. Clear the
 //		BINDEC_FLG for separating normalized/denormalized
@@ -32,13 +32,13 @@
 //	A3.	Compute ILOG.
 //		ILOG is the log base 10 of the input value.  It is
-//		approximated by adding e + 0.f when the original 
-//		value is viewed as 2^^e * 1.f in extended precision.  
+//		approximated by adding e + 0.f when the original
+//		value is viewed as 2^^e * 1.f in extended precision.
 //		This value is stored in d6.
 //
 //	A4.	Clr INEX bit.
-//		The operation in A3 above may have set INEX2.  
+//		The operation in A3 above may have set INEX2.
 //
 //	A5.	Set ICTR = 0;
-//		ICTR is a flag used in A13.  It must be set before the 
+//		ICTR is a flag used in A13.  It must be set before the
 //		loop entry A6.
 //
@@ -62,7 +62,7 @@
 //
 //	A8.	Clr INEX; Force RZ.
-//		The operation in A3 above may have set INEX2.  
+//		The operation in A3 above may have set INEX2.
 //		RZ mode is forced for the scaling operation to insure
-//		only one rounding error.  The grs bits are collected in 
+//		only one rounding error.  The grs bits are collected in
 //		the INEX flag for use in A10.
 //
@@ -93,9 +93,9 @@
 //
 //	A14.	Convert the mantissa to bcd.
-//		The binstr routine is used to convert the LEN digit 
+//		The binstr routine is used to convert the LEN digit
 //		mantissa to bcd in memory.  The input to binstr is
 //		to be a fraction; i.e. (mantissa)/10^LEN and adjusted
 //		such that the decimal point is to the left of bit 63.
-//		The bcd digits are stored in the correct position in 
+//		The bcd digits are stored in the correct position in
 //		the final string area in memory.
 //
@@ -134,6 +134,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -174,5 +174,5 @@
 //     is a denormalized number, set the BINDEC_FLG memory word
 //     to signal denorm.  If the input is unnormalized, normalize
-//     the input and test for denormalized result.  
+//     the input and test for denormalized result.
 //
 	fmovel	#rm_mode,%FPCR	//set RM and ext
@@ -254,5 +254,5 @@
 	faddw	%d0,%fp0		//add in exp
 	fsubs	FONE,%fp0	//subtract off 1.0
-	fbge	pos_res		//if pos, branch 
+	fbge	pos_res		//if pos, branch
 	fmulx	LOG2UP1,%fp0	//if neg, mul by LOG2UP1
 	fmovel	%fp0,%d6		//put ILOG in d6 as a lword
@@ -264,12 +264,12 @@
 
 // A4. Clr INEX bit.
-//     The operation in A3 above may have set INEX2.  
-
-A4_str:	
+//     The operation in A3 above may have set INEX2.
+
+A4_str:
 	fmovel	#0,%FPSR		//zero all of fpsr - nothing needed
 
 
 // A5. Set ICTR = 0;
-//     ICTR is a flag used in A13.  It must be set before the 
+//     ICTR is a flag used in A13.  It must be set before the
 //     loop entry A6. The lower word of d5 is used for ICTR.
 
@@ -306,5 +306,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A6_str:	
+A6_str:
 	tstl	%d7		//branch on sign of k
 	bles	k_neg		//if k <= 0, LEN = ILOG + 1 - k
@@ -378,5 +378,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A7_str:	
+A7_str:
 	tstl	%d7		//test sign of k
 	bgts	k_pos		//if pos and > 0, skip this
@@ -384,5 +384,5 @@
 	blts	k_pos		//if ILOG >= k, skip this
 	movel	%d7,%d6		//if ((k<0) & (ILOG < k)) ILOG = k
-k_pos:	
+k_pos:
 	movel	%d6,%d0		//calc ILOG + 1 - LEN in d0
 	addql	#1,%d0		//add the 1
@@ -398,7 +398,7 @@
 	addil	#24,%d0		//add in 24 to iscale
 	movel	#24,%d2		//put 24 in d2 for A9
-no_inf:	
+no_inf:
 	negl	%d0		//and take abs of ISCALE
-iscale:	
+iscale:
 	fmoves	FONE,%fp1	//init fp1 to 1
 	bfextu	USER_FPCR(%a6){#26:#2},%d1 //get initial rmode bits
@@ -428,9 +428,9 @@
 rmode:
 	clrl	%d3		//clr table index
-e_loop:	
+e_loop:
 	lsrl	#1,%d0		//shift next bit into carry
 	bccs	e_next		//if zero, skip the mul
 	fmulx	(%a1,%d3),%fp1	//mul by 10**(d3_bit_no)
-e_next:	
+e_next:
 	addl	#12,%d3		//inc d3 to next pwrten table entry
 	tstl	%d0		//test if ISCALE is zero
@@ -439,7 +439,7 @@
 
 // A8. Clr INEX; Force RZ.
-//     The operation in A3 above may have set INEX2.  
+//     The operation in A3 above may have set INEX2.
 //     RZ mode is forced for the scaling operation to insure
-//     only one rounding error.  The grs bits are collected in 
+//     only one rounding error.  The grs bits are collected in
 //     the INEX flag for use in A10.
 //
@@ -447,5 +447,5 @@
 //	Input/Output
 
-	fmovel	#0,%FPSR		//clr INEX 
+	fmovel	#0,%FPSR		//clr INEX
 	fmovel	#rz_mode,%FPCR	//set RZ rounding mode
 
@@ -454,5 +454,5 @@
 //     The mantissa is scaled to the desired number of significant
 //     digits.  The excess digits are collected in INEX2. If mul,
-//     Check d2 for excess 10 exponential value.  If not zero, 
+//     Check d2 for excess 10 exponential value.  If not zero,
 //     the iscale value would have caused the pwrten calculation
 //     to overflow.  Only a negative iscale can cause this, so
@@ -483,5 +483,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A9_str:	
+A9_str:
 	fmovex	(%a0),%fp0	//load X from memory
 	fabsx	%fp0		//use abs(X)
@@ -501,7 +501,7 @@
 A9_loop:
 	clrl	-(%a7)		//clear lword on stack
-	dbf	%d3,A9_loop	
+	dbf	%d3,A9_loop
 	moveb	VER_TMP(%a6),(%a7) //write current version number
-	moveb	#BUSY_SIZE-4,1(%a7) //write current busy size 
+	moveb	#BUSY_SIZE-4,1(%a7) //write current busy size
 	moveb	#0x10,0x44(%a7)	//set fcefpte[15] bit
 	movew	#0x0023,0x40(%a7)	//load cmdreg1b with mul command
@@ -540,5 +540,5 @@
 //	fp2: x/x
 
-A10_st:	
+A10_st:
 	fmovel	%FPSR,%d0		//get FPSR
 	fmovex	%fp0,FP_SCR2(%a6)	//move Y to memory
@@ -556,7 +556,7 @@
 //      mode and precision.  The original FPCR is saved in L_SCR1.
 
-A11_st:	
+A11_st:
 	movel	USER_FPCR(%a6),L_SCR1(%a6) //save it for later
-	andil	#0x00000030,USER_FPCR(%a6) //set size to ext, 
+	andil	#0x00000030,USER_FPCR(%a6) //set size to ext,
 //					;block exceptions
 
@@ -587,5 +587,5 @@
 
 A12_st:
-	moveml	%d0-%d1/%a0-%a1,-(%a7)	//save regs used by sintd0	
+	moveml	%d0-%d1/%a0-%a1,-(%a7)	//save regs used by sintd0
 	movel	L_SCR1(%a6),-(%a7)
 	movel	L_SCR2(%a6),-(%a7)
@@ -593,5 +593,5 @@
 	fmovex	%fp0,(%a0)		//move Y to memory at FP_SCR2(a6)
 	tstl	L_SCR2(%a6)		//test sign of original operand
-	bges	do_fint			//if pos, use Y 
+	bges	do_fint			//if pos, use Y
 	orl	#0x80000000,(%a0)		//if neg, use -Y
 do_fint:
@@ -602,5 +602,5 @@
 	movel	(%a7)+,L_SCR2(%a6)
 	movel	(%a7)+,L_SCR1(%a6)
-	moveml	(%a7)+,%d0-%d1/%a0-%a1	//restore regs used by sint	
+	moveml	(%a7)+,%d0-%d1/%a0-%a1	//restore regs used by sint
 	movel	L_SCR2(%a6),FP_SCR2(%a6)	//restore original exponent
 	movel	L_SCR1(%a6),USER_FPCR(%a6) //restore user's FPCR
@@ -638,5 +638,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A13_st:	
+A13_st:
 	swap	%d5		//put ICTR in lower word of d5
 	tstw	%d5		//check if ICTR = 0
@@ -649,5 +649,5 @@
 	subql	#1,%d0		//d0 = LEN -1
 	clrl	%d3		//clr table index
-l_loop:	
+l_loop:
 	lsrl	#1,%d0		//shift next bit into carry
 	bccs	l_next		//if zero, skip the mul
@@ -675,5 +675,5 @@
 	movew	#1,%d5		//set ICTR
 	fmovel	#rm_mode,%FPCR	//set rmode to RM
-	fmuls	FTEN,%fp2	//compute 10^LEN 
+	fmuls	FTEN,%fp2	//compute 10^LEN
 	bra	A6_str		//return to A6 and recompute YINT
 test_2:
@@ -691,5 +691,5 @@
 	bra	A6_str		//return to A6 and recompute YINT
 //
-// Since ICTR <> 0, we have already been through one adjustment, 
+// Since ICTR <> 0, we have already been through one adjustment,
 // and shouldn't have another; this is to check if abs(YINT) = 10^LEN
 // 10^LEN is again computed using whatever table is in a1 since the
@@ -718,9 +718,9 @@
 
 // A14. Convert the mantissa to bcd.
-//      The binstr routine is used to convert the LEN digit 
+//      The binstr routine is used to convert the LEN digit
 //      mantissa to bcd in memory.  The input to binstr is
 //      to be a fraction; i.e. (mantissa)/10^LEN and adjusted
 //      such that the decimal point is to the left of bit 63.
-//      The bcd digits are stored in the correct position in 
+//      The bcd digits are stored in the correct position in
 //      the final string area in memory.
 //
@@ -748,5 +748,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A14_st:	
+A14_st:
 	fmovel	#rz_mode,%FPCR	//force rz for conversion
 	fdivx	%fp2,%fp0		//divide abs(YINT) by 10^LEN
@@ -765,5 +765,5 @@
 	negl	%d0		//make exp positive
 m_loop:
-	lsrl	#1,%d2		//shift d2:d3 right, add 0s 
+	lsrl	#1,%d2		//shift d2:d3 right, add 0s
 	roxrl	#1,%d3		//the number of places
 	dbf	%d0,m_loop	//given in d0
@@ -820,5 +820,5 @@
 //	L_SCR2:first word of X packed/Unchanged
 
-A15_st:	
+A15_st:
 	tstb	BINDEC_FLG(%a6)	//check for denorm
 	beqs	not_denorm
@@ -842,5 +842,5 @@
 	fmoves	FONE,%fp0	//force exponent to 1
 	bras	convrt		//do it
-not_zero:	
+not_zero:
 	fmovel	%d6,%fp0		//float ILOG
 	fabsx	%fp0		//get abs of ILOG
@@ -855,5 +855,5 @@
 	negw	%d0		//make exp positive
 x_loop:
-	lsrl	#1,%d2		//shift d2:d3 right 
+	lsrl	#1,%d2		//shift d2:d3 right
 	roxrl	#1,%d3		//the number of places
 	dbf	%d0,x_loop	//given in d0
@@ -866,10 +866,10 @@
 	leal	L_SCR1(%a6),%a0	//a0 is ptr to L_SCR1 for exp digits
 	bsr	binstr		//call binstr to convert exp
-	movel	L_SCR1(%a6),%d0	//load L_SCR1 lword to d0 
+	movel	L_SCR1(%a6),%d0	//load L_SCR1 lword to d0
 	movel	#12,%d1		//use d1 for shift count
 	lsrl	%d1,%d0		//shift d0 right by 12
 	bfins	%d0,FP_SCR1(%a6){#4:#12} //put e3:e2:e1 in FP_SCR1
 	lsrl	%d1,%d0		//shift d0 right by 12
-	bfins	%d0,FP_SCR1(%a6){#16:#4} //put e4 in FP_SCR1 
+	bfins	%d0,FP_SCR1(%a6){#16:#4} //put e4 in FP_SCR1
 	tstb	%d0		//check if e4 is zero
 	beqs	A16_st		//if zero, skip rest
@@ -902,5 +902,5 @@
 A16_st:
 	clrl	%d0		//clr d0 for collection of signs
-	andib	#0x0f,FP_SCR1(%a6) //clear first nibble of FP_SCR1 
+	andib	#0x0f,FP_SCR1(%a6) //clear first nibble of FP_SCR1
 	tstl	L_SCR2(%a6)	//check sign of original mantissa
 	bges	mant_p		//if pos, don't set SM
@@ -909,5 +909,5 @@
 	tstl	%d6		//check sign of ILOG
 	bges	wr_sgn		//if pos, don't set SE
-	addql	#1,%d0		//set bit 0 in d0 for SE 
+	addql	#1,%d0		//set bit 0 in d0 for SE
 wr_sgn:
 	bfins	%d0,FP_SCR1(%a6){#0:#2} //insert SM and SE into FP_SCR1
Index: c/src/lib/libcpu/m68k/m68040/fpsp/binstr.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/binstr.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/binstr.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -62,6 +62,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/bugfix.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/bugfix.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/bugfix.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -9,5 +9,5 @@
 //	Fixes for bugs: 1238
 //
-//	Bug: 1238 
+//	Bug: 1238
 //
 //
@@ -154,6 +154,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -169,6 +169,6 @@
 b1238_fix:
 //
-// This code is entered only on completion of the handling of an 
-// nu-generated ovfl, unfl, or inex exception.  If the version 
+// This code is entered only on completion of the handling of an
+// nu-generated ovfl, unfl, or inex exception.  If the version
 // number of the fsave is not $40, this handler is not necessary.
 // Simply branch to fix_done and exit normally.
@@ -186,5 +186,5 @@
 //
 // Test the register conflict aspect.  If opclass0, check for
-// cu src equal to xu dest or equal to nu dest.  If so, go to 
+// cu src equal to xu dest or equal to nu dest.  If so, go to
 // op0.  Else, or if opclass2, check for cu dest equal to
 // xu dest or equal to nu dest.  If so, go to tst_opcl.  Else,
@@ -198,15 +198,15 @@
 //
 // Check for cu and nu register conflict.  If one exists, this takes
-// priority over a cu and xu conflict. 
-//
-	bfextu	CMDREG1B(%a6){#3:#3},%d0	//get 1st src 
+// priority over a cu and xu conflict.
+//
+	bfextu	CMDREG1B(%a6){#3:#3},%d0	//get 1st src
 	bfextu	CMDREG3B(%a6){#6:#3},%d1	//get 3rd dest
 	cmpb	%d0,%d1
 	beqs	op0			//if equal, continue bugfix
 //
-// Check for cu dest equal to nu dest.  If so, go and fix the 
+// Check for cu dest equal to nu dest.  If so, go and fix the
 // bug condition.  Otherwise, exit.
 //
-	bfextu	CMDREG1B(%a6){#6:#3},%d0	//get 1st dest 
+	bfextu	CMDREG1B(%a6){#6:#3},%d0	//get 1st dest
 	cmpb	%d0,%d1			//cmp 1st dest with 3rd dest
 	beqs	op0			//if equal, continue bugfix
@@ -217,5 +217,5 @@
 	cmpb	%d0,%d1			//cmp 1st dest with 2nd dest
 	beqs	op0_xu			//if equal, continue bugfix
-	bfextu	CMDREG1B(%a6){#3:#3},%d0	//get 1st src 
+	bfextu	CMDREG1B(%a6){#3:#3},%d0	//get 1st src
 	cmpb	%d0,%d1			//cmp 1st src with 2nd dest
 	beq	op0_xu
@@ -247,5 +247,5 @@
 //
 // We have the case in which a conflict exists between the cu src or
-// dest and the dest of the xu.  We must clear the instruction in 
+// dest and the dest of the xu.  We must clear the instruction in
 // the cu and restore the state, allowing the instruction in the
 // xu to complete.  Remember, the instruction in the nu
@@ -257,5 +257,5 @@
 //
 //	Items saved from the stack:
-//	
+//
 //		$3c stag     - L_SCR1
 //		$40 cmdreg1b - L_SCR2
@@ -266,6 +266,6 @@
 //
 op0_xu:
-	movel	STAG(%a6),L_SCR1(%a6)	
-	movel	CMDREG1B(%a6),L_SCR2(%a6)	
+	movel	STAG(%a6),L_SCR1(%a6)
+	movel	CMDREG1B(%a6),L_SCR2(%a6)
 	movel	DTAG(%a6),L_SCR3(%a6)
 	andil	#0xe0000000,L_SCR3(%a6)
@@ -276,11 +276,11 @@
 //
 // Check if the instruction which just completed was exceptional.
-// 
+//
 	cmpw	#0x4060,(%a7)
 	beq	op0_xb
-// 
+//
 // It is necessary to isolate the result of the instruction in the
 // xu if it is to fp0 - fp3 and write that value to the USER_FPn
-// locations on the stack.  The correct destination register is in 
+// locations on the stack.  The correct destination register is in
 // cmdreg2b.
 //
@@ -341,5 +341,5 @@
 //
 // The frame returned is busy.  It is not possible to reconstruct
-// the code sequence to allow completion.  We will jump to 
+// the code sequence to allow completion.  We will jump to
 // fpsp_fmt_error and allow the kernel to kill the process.
 //
@@ -356,18 +356,18 @@
 	bne	fix_done		//if not, it is not bug 1238
 //
-// Check for cu dest equal to nu dest or equal to xu dest, with 
+// Check for cu dest equal to nu dest or equal to xu dest, with
 // a cu and nu conflict taking priority an nu conflict.  If either,
 // go and fix the bug condition.  Otherwise, exit.
 //
-	bfextu	CMDREG1B(%a6){#6:#3},%d0	//get 1st dest 
+	bfextu	CMDREG1B(%a6){#6:#3},%d0	//get 1st dest
 	bfextu	CMDREG3B(%a6){#6:#3},%d1	//get 3rd dest
 	cmpb	%d0,%d1			//cmp 1st dest with 3rd dest
 	beq	op2_com			//if equal, continue bugfix
-	bfextu	CMDREG2B(%a6){#6:#3},%d1	//get 2nd dest 
+	bfextu	CMDREG2B(%a6){#6:#3},%d1	//get 2nd dest
 	cmpb	%d0,%d1			//cmp 1st dest with 2nd dest
 	bne	fix_done		//if the reg checks fail, exit
 //
 // We have the case in which a conflict exists between the cu src or
-// dest and the dest of the xu.  We must clear the instruction in 
+// dest and the dest of the xu.  We must clear the instruction in
 // the cu and restore the state, allowing the instruction in the
 // xu to complete.  Remember, the instruction in the nu
@@ -379,5 +379,5 @@
 //
 //	Items saved from the stack:
-//	
+//
 //		$3c stag     - L_SCR1
 //		$40 cmdreg1b - L_SCR2
@@ -389,7 +389,7 @@
 //
 op2_xu:
-	movel	STAG(%a6),L_SCR1(%a6)	
-	movel	CMDREG1B(%a6),L_SCR2(%a6)	
-	movel	DTAG(%a6),L_SCR3(%a6)	
+	movel	STAG(%a6),L_SCR1(%a6)
+	movel	CMDREG1B(%a6),L_SCR2(%a6)
+	movel	DTAG(%a6),L_SCR3(%a6)
 	andil	#0xe0000000,L_SCR3(%a6)
 	moveb	#0,CU_SAVEPC(%a6)
@@ -402,11 +402,11 @@
 //
 // Check if the instruction which just completed was exceptional.
-// 
+//
 	cmpw	#0x4060,(%a7)
 	beq	op2_xb
-// 
+//
 // It is necessary to isolate the result of the instruction in the
 // xu if it is to fp0 - fp3 and write that value to the USER_FPn
-// locations on the stack.  The correct destination register is in 
+// locations on the stack.  The correct destination register is in
 // cmdreg2b.
 //
@@ -461,10 +461,10 @@
 	movew	#0x43FF,ETEMP_EX(%a6)	//to double +max
 	bra	finish
-case2:	
+case2:
 	cmpw	#0xC07F,ETEMP_EX(%a6)	//single -max
 	bnes	case3
 	movew	#0xC3FF,ETEMP_EX(%a6)	//to double -max
 	bra	finish
-case3:	
+case3:
 	cmpw	#0x3F80,ETEMP_EX(%a6)	//single +min
 	bnes	case4
@@ -482,5 +482,5 @@
 //
 // You should replace the jump to fpsp_fmt_error with a jump
-// to the entry point used to kill a process. 
+// to the entry point used to kill a process.
 //
 op2_xb:
Index: c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/decbin.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -63,15 +63,15 @@
 //
 //	Clean up and return.  Check if the final mul or div resulted
-//	in an inex2 exception.  If so, set inex1 in the fpsr and 
+//	in an inex2 exception.  If so, set inex1 in the fpsr and
 //	check if the inex1 exception is enabled.  If so, set d7 upper
 //	word to $0100.  This will signal unimp.sa that an enabled inex1
 //	exception occurred.  Unimp will fix the stack.
-//	
+//
 
 //		Copyright (C) Motorola, Inc. 1990
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -110,5 +110,5 @@
 //
 	.set	ESTRT,4
-	.set	EDIGITS,2	// 
+	.set	EDIGITS,2	//
 //
 // Constants in single precision
@@ -227,5 +227,5 @@
 	cmpl	#2,%d1		//test for last lw
 	ble	loadlw		//if not, get last one
-	
+
 //
 //  Check the sign of the mant and make the value in fp0 the same sign.
@@ -235,5 +235,5 @@
 	beq	ap_st_z		//if clear, go to append/strip zeros
 	fnegx	%fp0		//if set, negate fp0
-	
+
 //
 // Append/strip zeros:
@@ -410,5 +410,5 @@
 // Pwrten calculates the exponent factor in the selected rounding mode
 // according to the following table:
-//	
+//
 //	Sign of Mant  Sign of Exp  Rounding Mode  PWRTEN Rounding Mode
 //
@@ -498,5 +498,5 @@
 //
 end_dec:
-	fmovel	%FPSR,%d0		//get status register	
+	fmovel	%FPSR,%d0		//get status register
 	bclrl	#inex2_bit+8,%d0	//test for inex2 and clear it
 	fmovel	%d0,%FPSR		//return status reg w/o inex2
Index: c/src/lib/libcpu/m68k/m68040/fpsp/do_func.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/do_func.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/do_func.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -7,9 +7,9 @@
 // to be performed is determined from the lower 7 bits of the
 // extension word (except in the case of fmovecr and fsincos).
-// The opcode and tag bits form an index into a jump table in 
-// tbldo.sa.  Cases of zero, infinity and NaN are handled in 
+// The opcode and tag bits form an index into a jump table in
+// tbldo.sa.  Cases of zero, infinity and NaN are handled in
 // do_func by forcing the default result.  Normalized and
 // denormalized (there are no unnormalized numbers at this
-// point) are passed onto the emulation code.  
+// point) are passed onto the emulation code.
 //
 // CMDREG1B and STAG are extracted from the fsave frame
@@ -25,6 +25,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -71,5 +71,5 @@
 //
 	bfextu	CMDREG1B(%a6){#0:#6},%d0 //get opclass and src fields
-	cmpil	#0x17,%d0		//if op class and size fields are $17, 
+	cmpil	#0x17,%d0		//if op class and size fields are $17,
 //				;it is FMOVECR; if not, continue
 	bnes	not_fmovecr
@@ -79,5 +79,5 @@
 	movew	CMDREG1B(%a6),%d0
 	andl	#0x7F,%d0
-	cmpil	#0x38,%d0		//if the extension is >= $38, 
+	cmpil	#0x38,%d0		//if the extension is >= $38,
 	bge	serror		//it is illegal
 	bfextu	STAG(%a6){#0:#3},%d1
@@ -114,5 +114,5 @@
 	bra	t_inx2		//now, set the inx for the next inst
 //
-// Load a signed zero to fp0; do not set inex2/ainex 
+// Load a signed zero to fp0; do not set inex2/ainex
 //
 	.global	szero
@@ -122,5 +122,5 @@
 	bra	ld_pzero	//load positive zero
 //
-// Load a signed infinity to fp0; do not set inex2/ainex 
+// Load a signed infinity to fp0; do not set inex2/ainex
 //
 	.global	sinf
@@ -130,5 +130,5 @@
 	bra	ld_pinf
 //
-// Load a signed one to fp0; do not set inex2/ainex 
+// Load a signed one to fp0; do not set inex2/ainex
 //
 	.global	sone
@@ -138,5 +138,5 @@
 	bra	ld_pone
 //
-// Load a signed pi/2 to fp0; do not set inex2/ainex 
+// Load a signed pi/2 to fp0; do not set inex2/ainex
 //
 	.global	spi_2
@@ -163,5 +163,5 @@
 	bra	ld_pinf
 //
-//	FLOGNP1 
+//	FLOGNP1
 //
 	.global	sslognp1
@@ -169,5 +169,5 @@
 	fmovemx (%a0),%fp0-%fp0
 	fcmpb	#-1,%fp0
-	fbgt	slognp1		
+	fbgt	slognp1
 	fbeq	t_dz2		//if = -1, divide by zero exception
 	fmovel	#0,%FPSR		//clr N flag
@@ -189,5 +189,5 @@
 	.global	sslogn
 sslogn:
-	btstb	#sign_bit,LOCAL_EX(%a0) 
+	btstb	#sign_bit,LOCAL_EX(%a0)
 	bne	t_operr		//take care of operands < 0
 	cmpiw	#0x3fff,LOCAL_EX(%a0) //test for 1.0 input
@@ -202,5 +202,5 @@
 	.global	sslognd
 sslognd:
-	btstb	#sign_bit,LOCAL_EX(%a0) 
+	btstb	#sign_bit,LOCAL_EX(%a0)
 	beq	slognd
 	bra	t_operr		//take care of operands < 0
@@ -224,5 +224,5 @@
 	.global	sslog10d
 sslog10d:
-	btstb	#sign_bit,LOCAL_EX(%a0) 
+	btstb	#sign_bit,LOCAL_EX(%a0)
 	beq	slog10d
 	bra	t_operr		//take care of operands < 0
@@ -246,5 +246,5 @@
 	.global	sslog2d
 sslog2d:
-	btstb	#sign_bit,LOCAL_EX(%a0) 
+	btstb	#sign_bit,LOCAL_EX(%a0)
 	beq	slog2d
 	bra	t_operr		//take care of operands < 0
@@ -313,5 +313,5 @@
 	beq	ld_pzero	//if pos then load +0
 	bra	ld_mzero	//else neg load -0
-	
+
 smod_fpn:
 	moveb	ETEMP(%a6),%d1	//get sign of src op
@@ -330,5 +330,5 @@
 	fmovex FPTEMP(%a6),%fp0	//return dest to fp0
 	rts
-		
+
 //
 //	FREM
@@ -375,5 +375,5 @@
 	movel	(%a1,%d1.w*4),%a1
 	jmp	(%a1)
-	
+
 srem_snan:
 	bra	src_nan
@@ -393,5 +393,5 @@
 	beq	ld_pzero	//if pos then load +0
 	bra	ld_mzero	//else neg load -0
-	
+
 srem_fpn:
 	moveb	ETEMP(%a6),%d1	//get sign of src op
@@ -501,5 +501,5 @@
 	bra	src_nan
 //
-// This code forces default values for the zero, inf, and nan cases 
+// This code forces default values for the zero, inf, and nan cases
 // in the transcendentals code.  The CC bits must be set in the
 // stacked FPSR to be correctly reported.
Index: c/src/lib/libcpu/m68k/m68040/fpsp/gen_except.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/gen_except.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/gen_except.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -5,8 +5,8 @@
 //
 //	gen_except --- FPSP routine to detect reportable exceptions
-//	
+//
 //	This routine compares the exception enable byte of the
 //	user_fpcr on the stack with the exception status byte
-//	of the user_fpsr. 
+//	of the user_fpsr.
 //
 //	Any routine which may report an exceptions must load
@@ -26,5 +26,5 @@
 //	Note: The IEEE standard specifies that inex2 is to be
 //	reported if ovfl occurs and the ovfl enable bit is not
-//	set but the inex2 enable bit is.  
+//	set but the inex2 enable bit is.
 //
 //
@@ -32,6 +32,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -73,10 +73,10 @@
 	movel	ETEMP_EX(%a6),ETEMP_EX(%a1) //copy etemp from unimp
 	movel	ETEMP_HI(%a6),ETEMP_HI(%a1) //frame to busy frame
-	movel	ETEMP_LO(%a6),ETEMP_LO(%a1) 
+	movel	ETEMP_LO(%a6),ETEMP_LO(%a1)
 	movel	CMDREG1B(%a6),CMDREG1B(%a1) //set inst in frame to unimp
 	movel	CMDREG1B(%a6),%d0		//fix cmd1b to make it
 	andl	#0x03c30000,%d0		//work for cmd3b
 	bfextu	CMDREG1B(%a6){#13:#1},%d1	//extract bit 2
-	lsll	#5,%d1			
+	lsll	#5,%d1
 	swap	%d1
 	orl	%d1,%d0			//put it in the right place
@@ -89,5 +89,5 @@
 // Or in the FPSR from the emulation with the USER_FPSR on the stack.
 //
-	fmovel	%FPSR,%d0		
+	fmovel	%FPSR,%d0
 	orl	%d0,USER_FPSR(%a6)
 	movel	USER_FPSR(%a6),FPSR_SHADOW(%a1) //set exc bits
@@ -111,5 +111,5 @@
 	bnel	fpsp_fmt_error		//if not $28 or $30
 	leal	UNIMP_41_SIZE+LOCAL_SIZE(%a7),%a1
-	
+
 unimp_con:
 //
@@ -120,5 +120,5 @@
 // Or in the FPSR from the emulation with the USER_FPSR on the stack.
 //
-	fmovel	%FPSR,%d0		
+	fmovel	%FPSR,%d0
 	orl	%d0,USER_FPSR(%a6)
 	bra	do_clean
@@ -126,9 +126,9 @@
 //
 // Frame is idle, so check for exceptions reported through
-// USER_FPSR and set the unimp frame accordingly.  
+// USER_FPSR and set the unimp frame accordingly.
 // A7 must be incremented to the point before the
 // idle fsave vector to the unimp vector.
 //
-	
+
 do_check:
 	addl	#4,%a7			//point A7 back to unimp frame
@@ -136,5 +136,5 @@
 // Or in the FPSR from the emulation with the USER_FPSR on the stack.
 //
-	fmovel	%FPSR,%d0		
+	fmovel	%FPSR,%d0
 	orl	%d0,USER_FPSR(%a6)
 //
@@ -168,8 +168,8 @@
 	bra	do_clean
 //
-// The typical work to be done to the unimp frame to report an 
+// The typical work to be done to the unimp frame to report an
 // exception is to set the E1/E3 byte and clr the U flag.
-// commonE1 does this for E1 exceptions, which are snan, 
-// operr, and dz.  commonE3 does this for E3 exceptions, which 
+// commonE1 does this for E1 exceptions, which are snan,
+// operr, and dz.  commonE3 does this for E3 exceptions, which
 // are inex2 and inex1, and also clears the E1 exception bit
 // left over from the unimp exception.
@@ -189,5 +189,5 @@
 unsE3:
 	tstb	RES_FLG(%a6)
-	bnes	unsE3_0	
+	bnes	unsE3_0
 unsE3_1:
 	bsetb	#E3,E_BYTE(%a6)		//set E3 flag
@@ -197,5 +197,5 @@
 	andl	#0x03c30000,%d0		//work for cmd3b
 	bfextu	CMDREG1B(%a6){#13:#1},%d1	//extract bit 2
-	lsll	#5,%d1			
+	lsll	#5,%d1
 	swap	%d1
 	orl	%d1,%d0			//put it in the right place
@@ -221,6 +221,6 @@
 	bras	ovfl_unfl		//go to unfl_ovfl to determine if
 //					;it is an unsupp or unimp exc
-	
-// No exceptions are to be reported.  If the instruction was 
+
+// No exceptions are to be reported.  If the instruction was
 // unimplemented, no FPU restore is necessary.  If it was
 // unsupported, we must perform the restore.
@@ -246,11 +246,11 @@
 // Unimplemented Instruction Handler:
 // Ovfl:
-//   Only scosh, setox, ssinh, stwotox, and scale can set overflow in 
+//   Only scosh, setox, ssinh, stwotox, and scale can set overflow in
 //   this manner.
 // Unfl:
 //   Stwotox, setox, and scale can set underflow in this manner.
 //   Any of the other Library Routines such that f(x)=x in which
-//   x is an extended denorm can report an underflow exception. 
-//   It is the responsibility of the exception-causing exception 
+//   x is an extended denorm can report an underflow exception.
+//   It is the responsibility of the exception-causing exception
 //   to make sure that WBTEMP is correct.
 //
@@ -309,5 +309,5 @@
 	andl	#0x03c30000,%d0		//work for cmd3b
 	bfextu	CMDREG1B(%a6){#13:#1},%d1	//extract bit 2
-	lsll	#5,%d1			
+	lsll	#5,%d1
 	swap	%d1
 	orl	%d1,%d0			//put it in the right place
@@ -321,8 +321,8 @@
 // Check if the frame to be restored is busy or unimp.
 //** NOTE *** Bug fix for errata (0d43b #3)
-// If the frame is unimp, we must create a busy frame to 
+// If the frame is unimp, we must create a busy frame to
 // fix the bug with the nmnexc bits in cases in which they
 // are set by a previous instruction and not cleared by
-// the save. The frame will be unimp only if the final 
+// the save. The frame will be unimp only if the final
 // instruction in an emulation routine caused the exception
 // by doing an fmove <ea>,fp0.  The exception operand, in
@@ -365,5 +365,5 @@
 	movel	USER_FPSR(%a6),FPSR_SHADOW(%a1) //set exc bits
 	orl	#sx_mask,E_BYTE(%a1)
-	
+
 do_restore:
 	moveml	USER_DA(%a6),%d0-%d1/%a0-%a1
@@ -377,8 +377,8 @@
 	unlk	%a6
 //
-// If trace mode enabled, then go to trace handler.  This handler 
-// cannot have any fp instructions.  If there are fp inst's and an 
-// exception has been restored into the machine then the exception 
-// will occur upon execution of the fp inst.  This is not desirable 
+// If trace mode enabled, then go to trace handler.  This handler
+// cannot have any fp instructions.  If there are fp inst's and an
+// exception has been restored into the machine then the exception
+// will occur upon execution of the fp inst.  This is not desirable
 // in the kernel (supervisor mode).  See MC68040 manual Section 9.3.8.
 //
@@ -439,10 +439,10 @@
 	movel	#0x40280000,-(%sp)
 	frestore (%sp)+
-	unlk  	%a5	
+	unlk  	%a5
 	rts
 
 frame_41:
 	tstb	1(%sp)		// check to see if idle
-	bne	notidle	
+	bne	notidle
 idle41:
 	clrl	(%sp)		// get rid of old fsave frame
@@ -454,16 +454,16 @@
 	movel	#0x41300000,-(%sp)
 	frestore (%sp)+
-	unlk	%a5	
+	unlk	%a5
 	rts
 
 notidle:
-	bclrb	#etemp15_bit,-40(%a5) 
+	bclrb	#etemp15_bit,-40(%a5)
 	frestore (%sp)+
-	unlk	%a5	
+	unlk	%a5
 	rts
 
 nofix:
 	frestore (%sp)+
-	unlk	%a5	
+	unlk	%a5
 	rts
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/get_op.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/get_op.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/get_op.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -19,5 +19,5 @@
 // - For unnormalized numbers (opclass 0, 2, or 3) the
 // number(s) is normalized and the operand type tag is updated.
-//		
+//
 // - For a packed number (opclass 2) the number is unpacked and the
 // operand type tag is updated.
@@ -44,5 +44,5 @@
 // a normalized number in the source and the instruction is
 // successful.
-//		
+//
 // Next consider if in the process of normalizing the un-
 // normalized number it becomes a denormalized number.  The
@@ -57,6 +57,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -197,5 +197,5 @@
 uni_getop:
 	bfextu	CMDREG1B(%a6){#0:#6},%d0 //get opclass and src fields
-	cmpil	#0x17,%d0		//if op class and size fields are $17, 
+	cmpil	#0x17,%d0		//if op class and size fields are $17,
 //				;it is FMOVECR; if not, continue
 //
@@ -229,19 +229,19 @@
 	andiw	#0x7fff,%d0	//mask sign, check if exp = 0000
 	beqs	src_op_ck	//if denorm then check source op.
-//				;denorms are taken care of in res_func 
+//				;denorms are taken care of in res_func
 //				;(unsupp) or do_func (unimp)
 //				;else unnorm fall through
 	leal	FPTEMP(%a6),%a0	//point a0 to dop - used in mk_norm
 	bsr	mk_norm		//go normalize - mk_norm returns:
-//				;L_SCR1{7:5} = operand tag 
+//				;L_SCR1{7:5} = operand tag
 //				;	(000 = norm, 100 = denorm)
-//				;L_SCR1{4} = fpte15 or ete15 
+//				;L_SCR1{4} = fpte15 or ete15
 //				;	0 = exp >  $3fff
 //				;	1 = exp <= $3fff
-//				;and puts the normalized num back 
+//				;and puts the normalized num back
 //				;on the fsave stack
 //
-	moveb L_SCR1(%a6),DTAG(%a6) //write the new tag & fpte15 
-//				;to the fsave stack and fall 
+	moveb L_SCR1(%a6),DTAG(%a6) //write the new tag & fpte15
+//				;to the fsave stack and fall
 //				;through to check source operand
 //
@@ -258,17 +258,17 @@
 	movew	ETEMP_EX(%a6),%d0 //get source exponent
 	andiw	#0x7fff,%d0	//mask sign, check if exp = 0000
-	beq	end_getop	//if denorm then exit, denorms are 
+	beq	end_getop	//if denorm then exit, denorms are
 //				;handled in do_func
 	leal	ETEMP(%a6),%a0	//point a0 to sop - used in mk_norm
 	bsr	mk_norm		//go normalize - mk_norm returns:
-//				;L_SCR1{7:5} = operand tag 
+//				;L_SCR1{7:5} = operand tag
 //				;	(000 = norm, 100 = denorm)
-//				;L_SCR1{4} = fpte15 or ete15 
+//				;L_SCR1{4} = fpte15 or ete15
 //				;	0 = exp >  $3fff
 //				;	1 = exp <= $3fff
-//				;and puts the normalized num back 
+//				;and puts the normalized num back
 //				;on the fsave stack
 //
-	moveb	L_SCR1(%a6),STAG(%a6) //write the new tag & ete15 
+	moveb	L_SCR1(%a6),STAG(%a6) //write the new tag & ete15
 	rts			//end_getop
 
@@ -288,5 +288,5 @@
 common:
 	btstb	#sign_bit,ETEMP_EX(%a6) //grab sign bit of mantissa
-	beqs	pos	
+	beqs	pos
 	bset	#15,%d1		//set sign bit because it is negative
 pos:
@@ -300,5 +300,5 @@
 //				;this is needed to fix unsupp data stack
 	leal	ETEMP(%a6),%a0	//point a0 to sop
-	
+
 	bsr	mk_norm		//convert sgl/dbl denorm to norm
 	moveb	L_SCR1(%a6),STAG(%a6) //put tag into source tag reg - d0
@@ -309,5 +309,5 @@
 //
 pack_source:
-	movel	FPTEMP_LO(%a6),ETEMP(%a6)	//write ms part of packed 
+	movel	FPTEMP_LO(%a6),ETEMP(%a6)	//write ms part of packed
 //				;number to etemp slot
 	bsr	chk_dy_mo	//set dyadic/monadic flag
@@ -328,5 +328,5 @@
 	bne	dst_ex_dnrm	//else, handle the unnorm or ext denorm
 //
-// Dest is not denormalized.  Check for norm, and set fpte15 
+// Dest is not denormalized.  Check for norm, and set fpte15
 // accordingly.
 //
@@ -360,5 +360,5 @@
 //
 chk_dy_mo:
-	movew	CMDREG1B(%a6),%d0	
+	movew	CMDREG1B(%a6),%d0
 	btstl	#5,%d0		//testing extension command word
 	beqs	set_mon		//if bit 5 = 0 then monadic
@@ -409,5 +409,5 @@
 //	L_SCR1{4}   = fpte15 or ete15 (0 = exp > $3fff, 1 = exp <=$3fff)
 //	the normalized operand is placed back on the fsave stack
-mk_norm:	
+mk_norm:
 	clrl	L_SCR1(%a6)
 	bclrb	#sign_bit,LOCAL_EX(%a0)
@@ -429,9 +429,9 @@
 	bgts	end_mk		//   fpte15/ete15 already set to 0
 	bsetb	#4,L_SCR1(%a6)	//else set fpte15/ete15 to 1
-//				;calling routine actually sets the 
-//				;value on the stack (along with the 
-//				;tag), since this routine doesn't 
+//				;calling routine actually sets the
+//				;value on the stack (along with the
+//				;tag), since this routine doesn't
 //				;know if it should set ete15 or fpte15
-//				;ie, it doesn't know if this is the 
+//				;ie, it doesn't know if this is the
 //				;src op or dest op.
 end_mk:
@@ -458,5 +458,5 @@
 uns_opx:
 	bsr	nrm_zero	//normalize the number
-	btstb	#7,LOCAL_HI(%a0)	//check if integer bit (j-bit) is set 
+	btstb	#7,LOCAL_HI(%a0)	//check if integer bit (j-bit) is set
 	beqs	uns_den		//if clear then now have a denorm
 uns_nrm:
@@ -471,5 +471,5 @@
 uni_inst:
 	bsr	nrm_zero
-	btstb	#7,LOCAL_HI(%a0)	//check if integer bit (j-bit) is set 
+	btstb	#7,LOCAL_HI(%a0)	//check if integer bit (j-bit) is set
 	beqs	uni_den		//if clear then now have a denorm
 uni_nrm:
@@ -483,7 +483,7 @@
 //	Decimal to binary conversion
 //
-// Special cases of inf and NaNs are completed outside of decbin.  
+// Special cases of inf and NaNs are completed outside of decbin.
 // If the input is an snan, the snan bit is not set.
-// 
+//
 // input:
 //	ETEMP(a6)	- points to packed decimal string in memory
@@ -613,14 +613,14 @@
 finish:
 	movew	CMDREG1B(%a6),%d0	//get the command word
-	andw	#0xfbff,%d0	//change the source specifier field to 
+	andw	#0xfbff,%d0	//change the source specifier field to
 //				;extended (was packed).
 	movew	%d0,CMDREG1B(%a6)	//write command word back to fsave stack
-//				;we need to do this so the 040 will 
-//				;re-execute the inst. without taking 
+//				;we need to do this so the 040 will
+//				;re-execute the inst. without taking
 //				;another packed trap.
 
 fix_stag:
-//Converted result is now in etemp on fsave stack, now set the source 
-//tag (stag) 
+//Converted result is now in etemp on fsave stack, now set the source
+//tag (stag)
 //	if (ete =$7fff) then INF or NAN
 //		if (etemp = $x.0----0) then
@@ -635,5 +635,5 @@
 //
 // Note also that the etemp_15 bit (just right of the stag) must
-// be set accordingly.  
+// be set accordingly.
 //
 	movew		ETEMP_EX(%a6),%d1
@@ -654,5 +654,5 @@
 	rts
 z_or_nrm:
-	tstw		%d1  
+	tstw		%d1
 	bnes		is_nrm
 is_zro:
@@ -673,5 +673,5 @@
 end_fix:
 	rts
- 
+
 end_get:
 	rts
Index: c/src/lib/libcpu/m68k/m68040/fpsp/kernel_ex.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/kernel_ex.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/kernel_ex.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -2,12 +2,12 @@
 //      $Id$
 //
-//	kernel_ex.sa 3.3 12/19/90 
-//
-// This file contains routines to force exception status in the 
+//	kernel_ex.sa 3.3 12/19/90
+//
+// This file contains routines to force exception status in the
 // fpu for exceptional cases detected or reported within the
 // transcendental functions.  Typically, the t_xx routine will
 // set the appropriate bits in the USER_FPSR word on the stack.
 // The bits are tested in gen_except.sa to determine if an exceptional
-// situation needs to be created on return from the FPSP. 
+// situation needs to be created on return from the FPSP.
 //
 
@@ -15,6 +15,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -52,5 +52,5 @@
 //	if dz trap disabled
 //		store properly signed inf (use sign of etemp) into fp0
-//		set FPSR exception status dz bit, condition code 
+//		set FPSR exception status dz bit, condition code
 //		inf bit, and accrued dz bit
 //		return
@@ -64,5 +64,5 @@
 //
 // t_dz2 is used by monadic functions such as flogn (from do_func).
-// t_dz is used by monadic functions such as satanh (from the 
+// t_dz is used by monadic functions such as satanh (from the
 // transcendental function).
 //
@@ -107,8 +107,8 @@
 //
 //	if (operr trap disabled)
-//		set FPSR exception status operr bit, condition code 
+//		set FPSR exception status operr bit, condition code
 //		nan bit; Store default NAN into fp0
 //		frestore the frame into the machine (done by unimp_hd)
-//	
+//
 //	else (operr trap enabled)
 //		set FPSR exception status operr bit, accrued operr bit
@@ -162,5 +162,5 @@
 unfl_dis:
 	bfextu	FPCR_MODE(%a6){#0:#2},%d0	//get round precision
-	
+
 	bclrb	#sign_bit,LOCAL_EX(%a0)
 	sne	LOCAL_SGN(%a0)		//convert to internal ext format
@@ -168,5 +168,5 @@
 	bsr	unf_sub			//returns IEEE result at a0
 //					;and sets FPSR_CC accordingly
-	
+
 	bfclr	LOCAL_SGN(%a0){#0:#8}	//convert back to IEEE ext format
 	beqs	unfl_fin
@@ -178,5 +178,5 @@
 	fmovemx (%a0),%fp0-%fp0		//store result in fp0
 	rts
-	
+
 
 //
@@ -283,5 +283,5 @@
 //
 // Determine if the destination nan is signalling or non-signalling,
-// and set the FPSR bits accordingly.  See the MC68040 User's Manual 
+// and set the FPSR bits accordingly.  See the MC68040 User's Manual
 // section 3.2.2.5 NOT-A-NUMBERS.
 //
@@ -291,5 +291,5 @@
 	bsetb	#neg_bit,FPSR_CC(%a6)	//set N bit
 dst_pos:
-	btstb	#signan_bit,FPTEMP_HI(%a6) //check if signalling 
+	btstb	#signan_bit,FPTEMP_HI(%a6) //check if signalling
 	beqs	dst_snan		//branch if signalling
 
@@ -303,12 +303,12 @@
 	cmpib	#0x60,%d0
 	bnes	no_snan
-	btstb	#signan_bit,ETEMP_HI(%a6) //check if signalling 
+	btstb	#signan_bit,ETEMP_HI(%a6) //check if signalling
 	bnes	no_snan
 	orl	#snaniop_mask,USER_FPSR(%a6) //set NAN, SNAN, AIOP
 no_snan:
-	rts	
+	rts
 
 dst_snan:
-	btstb	#snan_bit,FPCR_ENABLE(%a6) //check if trap enabled 
+	btstb	#snan_bit,FPCR_ENABLE(%a6) //check if trap enabled
 	beqs	dst_dis			//branch if disabled
 
@@ -319,7 +319,7 @@
 
 dst_dis:
-	bsetb	#signan_bit,FPTEMP_HI(%a6) //set SNAN bit in sop 
+	bsetb	#signan_bit,FPTEMP_HI(%a6) //set SNAN bit in sop
 	fmovel	%d1,%fpcr			//restore user's rmode/prec
-	fmovex FPTEMP(%a6),%fp0		//load non-sign. nan 
+	fmovex FPTEMP(%a6),%fp0		//load non-sign. nan
 	orl	#snaniop_mask,USER_FPSR(%a6) //set NAN, SNAN, AIOP
 	rts
@@ -329,5 +329,5 @@
 //
 // Determine if the source nan is signalling or non-signalling,
-// and set the FPSR bits accordingly.  See the MC68040 User's Manual 
+// and set the FPSR bits accordingly.  See the MC68040 User's Manual
 // section 3.2.2.5 NOT-A-NUMBERS.
 //
@@ -337,14 +337,14 @@
 	bsetb	#neg_bit,FPSR_CC(%a6)	//set N bit
 src_pos:
-	btstb	#signan_bit,ETEMP_HI(%a6) //check if signalling 
+	btstb	#signan_bit,ETEMP_HI(%a6) //check if signalling
 	beqs	src_snan		//branch if signalling
 	fmovel	%d1,%fpcr			//restore user's rmode/prec
 	fmovex ETEMP(%a6),%fp0		//return the non-signalling nan
-	rts	
+	rts
 
 src_snan:
-	btstb	#snan_bit,FPCR_ENABLE(%a6) //check if trap enabled 
+	btstb	#snan_bit,FPCR_ENABLE(%a6) //check if trap enabled
 	beqs	src_dis			//branch if disabled
-	bsetb	#signan_bit,ETEMP_HI(%a6) //set SNAN bit in sop 
+	bsetb	#signan_bit,ETEMP_HI(%a6) //set SNAN bit in sop
 	orb	#norm_tag,DTAG(%a6)	//set up dtag for norm
 	orb	#nan_tag,STAG(%a6)	//set up stag for nan
@@ -354,7 +354,7 @@
 
 src_dis:
-	bsetb	#signan_bit,ETEMP_HI(%a6) //set SNAN bit in sop 
+	bsetb	#signan_bit,ETEMP_HI(%a6) //set SNAN bit in sop
 	fmovel	%d1,%fpcr			//restore user's rmode/prec
-	fmovex ETEMP(%a6),%fp0		//load non-sign. nan 
+	fmovex ETEMP(%a6),%fp0		//load non-sign. nan
 	orl	#snaniop_mask,USER_FPSR(%a6) //set NAN, SNAN, AIOP
 	rts
@@ -370,5 +370,5 @@
 //
 // Entry point for scale with extended denorm.  The function does
-// not set inex2, aunfl, or ainex.  
+// not set inex2, aunfl, or ainex.
 //
 t_resdnrm:
@@ -405,5 +405,5 @@
 	beqs	xdep
 	bsetb	#sign_bit,LOCAL_EX(%a0)
-xdep:	
+xdep:
 	bfclr	STAG(%a6){#5:#3}		//clear wbtm66,wbtm1,wbtm0
 	bsetb	#wbtemp15_bit,WB_BYTE(%a6) //set wbtemp15
@@ -442,5 +442,5 @@
 	.global	t_avoid_unsupp
 t_avoid_unsupp:
-	link	%a2,#-LOCAL_SIZE		//so that a2 fpsp.h negative 
+	link	%a2,#-LOCAL_SIZE		//so that a2 fpsp.h negative
 //					;offsets may be used
 	fsave	-(%a7)
Index: c/src/lib/libcpu/m68k/m68040/fpsp/res_func.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/res_func.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/res_func.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -11,5 +11,5 @@
 //
 // For packed move out (fmove.p fpm,<ea>) the operation is
-// completed here; data is packed and moved to user memory. 
+// completed here; data is packed and moved to user memory.
 // The stack is restored to the 040 only in the case of a
 // reportable exception in the conversion.
@@ -19,6 +19,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -103,5 +103,5 @@
 	andil	#0x7f,%d0			//strip to only command word
 //
-// At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and 
+// At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and
 // fdsqrt are possible.
 // For cases fabs, fneg, fsmove, and fdmove goto spos (do not normalize)
@@ -146,5 +146,5 @@
 cu_ntn:
 	orl	#nan_mask,USER_FPSR(%a6)
-	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for 
+	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for
 //						;snan handler
 
@@ -209,5 +209,5 @@
 	movel	#2,%d0			//set up the size for denorm
 	movew	LOCAL_EX(%a0),%d1		//compare exponent to double threshold
-	andw	#0x7fff,%d1	
+	andw	#0x7fff,%d1
 	cmpw	#0x3c01,%d1
 	bls	cu_nunfl
@@ -362,5 +362,5 @@
 mon_dnrm:
 //
-// At this point, check for the cases in which normalizing the 
+// At this point, check for the cases in which normalizing the
 // denorm produces incorrect results.
 //
@@ -377,5 +377,5 @@
 	andil	#0x7f,%d0			//strip to only command word
 //
-// At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and 
+// At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and
 // fdsqrt are possible.
 // For cases fabs, fneg, fsmove, and fdmove goto spos (do not normalize)
@@ -385,10 +385,10 @@
 	bnes	nrm_src		//weed out fsqrt instructions
 	st	CU_ONLY(%a6)	//set cu-only inst flag
-	bra	cu_dnrm		//fmove, fabs, fneg, ftst 
+	bra	cu_dnrm		//fmove, fabs, fneg, ftst
 //				;cases go to cu_dnrm
 nrm_src:
 	bclrb	#sign_bit,LOCAL_EX(%a0)
 	sne	LOCAL_SGN(%a0)
-	bsr	nrm_set		//normalize number (exponent will go 
+	bsr	nrm_set		//normalize number (exponent will go
 //				; negative)
 	bclrb	#sign_bit,LOCAL_EX(%a0) //get rid of false sign
@@ -416,5 +416,5 @@
 //
 // cu_dnrm handles all cu-only instructions (fmove, fabs, fneg, and
-// ftst) completely in software without an frestore to the 040. 
+// ftst) completely in software without an frestore to the 040.
 //
 cu_dnrm:
@@ -449,5 +449,5 @@
 cu_dtn:
 	orl	#nan_mask,USER_FPSR(%a6)
-	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for 
+	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for
 //						;snan handler
 	rts
@@ -528,5 +528,5 @@
 //
 // The precision is extended, so the result in etemp is correct.
-// Simply set unfl (not inex2 or aunfl) and write the result to 
+// Simply set unfl (not inex2 or aunfl) and write the result to
 // the correct fp register.
 cu_wrexd:
@@ -600,5 +600,5 @@
 	orl	#unfinx_mask,USER_FPSR(%a6)
 	bra	wr_etemp
-	
+
 //
 // This code checks for 16-bit overflow conditions on dyadic
@@ -616,5 +616,5 @@
 //
 // The wrap-around condition occurs for add, sub, div, and cmp
-// when 
+// when
 //
 //	abs(dest_exp - src_exp) >= $8000
@@ -630,5 +630,5 @@
 // No frestore is done unless an exception is to be reported.
 //
-// For fadd: 
+// For fadd:
 //	if(sign_of(dest) != sign_of(src))
 //		replace exponent of src with $3fff (keep sign)
@@ -692,8 +692,8 @@
 	beq	wrap_cmp
 //
-// Inst is fdiv.  
+// Inst is fdiv.
 //
 wrap_div:
-	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm, 
+	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm,
 	beq	fix_stk		 //restore to fpu
 //
@@ -725,5 +725,5 @@
 ckinf_nd:
 	moveb	DTAG(%a6),%d0		//check destination tag for inf or nan
-ck_in_com:	
+ck_in_com:
 	andib	#0x60,%d0			//isolate tag bits
 	cmpb	#0x40,%d0			//is it inf?
@@ -758,5 +758,5 @@
 	st	WBTEMP_SGN(%a6)
 //
-// This code handles the case of the instruction resulting in 
+// This code handles the case of the instruction resulting in
 // an overflow condition.
 //
@@ -780,5 +780,5 @@
 frcovf_rnd:
 
-// The 881/882 does not set inex2 for the following case, so the 
+// The 881/882 does not set inex2 for the following case, so the
 // line is commented out to be compatible with 881/882
 //	tst.b	%d0
@@ -788,5 +788,5 @@
 //frcovf_x:
 	bsrl	ovf_res			//get correct result based on
-//					;round precision/mode.  This 
+//					;round precision/mode.  This
 //					;sets FPSR_CC correctly
 //					;returns in external format
@@ -799,5 +799,5 @@
 //
 wrap_add:
-	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm, 
+	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm,
 	beq	fix_stk		 //restore to fpu
 //
@@ -967,5 +967,5 @@
 // round routine.)
 //
-	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)	
+	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)
 	clrl	4(%a0)
 	bra	frcfpnr
@@ -974,5 +974,5 @@
 //
 wrap_sub:
-	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm, 
+	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm,
 	beq	fix_stk		 //restore to fpu
 //
@@ -1148,5 +1148,5 @@
 // round routine.)
 //
-	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)	
+	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)
 	clrl	4(%a0)
 	bra	frcfpnr
@@ -1155,5 +1155,5 @@
 //
 wrap_cmp:
-	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm, 
+	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm,
 	beq	fix_stk		 //restore to fpu
 //
@@ -1193,5 +1193,5 @@
 //
 wrap_mul:
-	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm, 
+	cmpb	#0xff,DNRM_FLG(%a6) //if both ops denorm,
 	beq	force_unf	//force an underflow (really!)
 //
@@ -1216,7 +1216,7 @@
 	addl	%d1,%d0			//subtract src from dest
 	bgt	fix_stk
-	
-//
-// This code handles the case of the instruction resulting in 
+
+//
+// This code handles the case of the instruction resulting in
 // an underflow condition.
 //
@@ -1248,5 +1248,5 @@
 frcunf_rnd:
 	bsrl	unf_sub			//get correct result based on
-//					;round precision/mode.  This 
+//					;round precision/mode.  This
 //					;sets FPSR_CC correctly
 	bfclr	WBTEMP_SGN(%a6){#0:#8}	//convert back to IEEE ext format
@@ -1280,5 +1280,5 @@
 	sne	WBTEMP_SGN(%a6)
 	bsrl	ovf_res			//get correct result based on
-//					;round precision/mode.  This 
+//					;round precision/mode.  This
 //					;sets FPSR_CC correctly
 	bfclr	WBTEMP_SGN(%a6){#0:#8}	//convert back to IEEE ext format
@@ -1287,5 +1287,5 @@
 frcfpn_clr:
 	orl	#ovfinx_mask,USER_FPSR(%a6)
-// 
+//
 // Perform the write.
 //
@@ -1304,7 +1304,7 @@
 	beqs	frc0_dst
 	cmpib	#1,%d0
-	beqs	frc1_dst 
+	beqs	frc1_dst
 	cmpib	#2,%d0
-	beqs	frc2_dst 
+	beqs	frc2_dst
 frc3_dst:
 	movel	WBTEMP_EX(%a6),USER_FP3(%a6)
@@ -1340,5 +1340,5 @@
 	btstb	#snan_bit,FPCR_ENABLE(%a6) //and don't overwrite
 	beqs	fmoveinc		//the dest
-	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for 
+	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for
 //						;snan handler
 	tstb	ETEMP(%a6)		//check for negative
@@ -1364,5 +1364,5 @@
 	bnes	fminc_czero
 	orl	#nan_mask,USER_FPSR(%a6) //if nan, nothing yet has set NaN
-	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for 
+	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	//set up fptemp sign for
 //						;snan handler
 	tstw	LOCAL_EX(%a0)		//check sign
@@ -1392,7 +1392,7 @@
 	beqs	fp0_dst
 	cmpib	#1,%d0
-	beqs	fp1_dst 
+	beqs	fp1_dst
 	cmpib	#2,%d0
-	beqs	fp2_dst 
+	beqs	fp2_dst
 fp3_dst:
 	movel	ETEMP_EX(%a6),USER_FP3(%a6)
@@ -1424,5 +1424,5 @@
 	bra	mv_out
 
-	
+
 //
 //	MOVE OUT
@@ -1445,5 +1445,5 @@
 
 //
-// This exit is for move-out to memory.  The aunfl bit is 
+// This exit is for move-out to memory.  The aunfl bit is
 // set if the result is inex and unfl is signalled.
 //
@@ -1469,5 +1469,5 @@
 	rts
 //
-// This exit is for move-out to int register.  The aunfl bit is 
+// This exit is for move-out to int register.  The aunfl bit is
 // not set in any case for this move.
 //
@@ -1499,5 +1499,5 @@
 	fcmpd	#0x41dfffffffc00000,%fp0
 // 41dfffffffc00000 in dbl prec = 401d0000fffffffe00000000 in ext prec
-	fbge	lo_plrg	
+	fbge	lo_plrg
 	fcmpd	#0xc1e0000000000000,%fp0
 // c1e0000000000000 in dbl prec = c01e00008000000000000000 in ext prec
@@ -1544,5 +1544,5 @@
 	fcmps	#0x46fffe00,%fp0
 // 46fffe00 in sgl prec = 400d0000fffe000000000000 in ext prec
-	fbge	wo_plrg	
+	fbge	wo_plrg
 	fcmps	#0xc7000000,%fp0
 // c7000000 in sgl prec = c00e00008000000000000000 in ext prec
@@ -1589,5 +1589,5 @@
 	fcmps	#0x42fe0000,%fp0
 // 42fe0000 in sgl prec = 40050000fe00000000000000 in ext prec
-	fbge	by_plrg	
+	fbge	by_plrg
 	fcmps	#0xc3000000,%fp0
 // c3000000 in sgl prec = c00600008000000000000000 in ext prec
@@ -1632,5 +1632,5 @@
 	movel	#0,L_SCR1(%a6)	// initialize result to 0
 	bfextu	FPCR_MODE(%a6){#2:#2},%d1	// d1 is the rounding mode
-	cmpb	#2,%d1		
+	cmpb	#2,%d1
 	bmis	int_inx		// if RN or RZ, done
 	bnes	int_rp		// if RP, continue below
@@ -1645,5 +1645,5 @@
 	lea	L_SCR1(%a6),%a1	// a1 is address of L_SCR1
 	addal	%d0,%a1		// offset by destination width -1
-	subal	#1,%a1		
+	subal	#1,%a1
 	bsetb	#0,(%a1)		// set low bit at a1 address
 int_inx:
@@ -1659,8 +1659,8 @@
 	oril	#opaop_mask,USER_FPSR(%a6)
 //				;fall through to perform int_wrt
-int_wrt: 
+int_wrt:
 	movel	EXC_EA(%a6),%a1	//load destination address
 	tstl	%a1		//check to see if it is a dest register
-	beqs	wrt_dn		//write data register 
+	beqs	wrt_dn		//write data register
 	lea	L_SCR1(%a6),%a0	//point to supervisor source address
 	bsrl	mem_write
@@ -1683,5 +1683,5 @@
 	movel	%d0,%d1		//reg_dest expects size:reg in d1
 	bsrl	reg_dest	//load proper data register
-	bra	mvouti_end 
+	bra	mvouti_end
 xp:
 	lea	ETEMP(%a6),%a0
@@ -1721,5 +1721,5 @@
 	cmpw	2(%a1),%d0
 	bgt	dp_over
-	
+
 	movel	#2,%d0		//set destination format to double
 //				;fall through to do_fp
@@ -1729,8 +1729,8 @@
 	swap	%d0			//rnd prec in upper word
 	addl	%d0,%d1			//d1 has PREC/MODE info
-	
-	clrl	%d0			//clear g,r,s 
-
-	bsrl	round			//round 
+
+	clrl	%d0			//clear g,r,s
+
+	bsrl	round			//round
 
 	movel	%a0,%a1
@@ -1767,10 +1767,10 @@
 	bsetb	#unfl_bit,FPSR_EXCEPT(%a6)
 	bra	mvout_end
-	
+
 sp_under:
 	bsetb	#etemp15_bit,STAG(%a6)
 
 	cmpw	4(%a1),%d0
-	blts	sp_catas	//catastrophic underflow case	
+	blts	sp_catas	//catastrophic underflow case
 
 	movel	#1,%d0		//load in round precision
@@ -1787,7 +1787,7 @@
 	cmpw	4(%a1),%d0
 	blts	dp_catas	//catastrophic underflow case
-		
+
 	movel	#dbl_thresh,%d1	//load in double precision threshold
-	movel	#2,%d0		
+	movel	#2,%d0
 	bsrl	dpspdnrm	//expects d1 to have proper
 //				;denorm threshold
@@ -1816,9 +1816,9 @@
 	movel	%a0,%a1		//a1 has the operand input
 	movel	EXC_EA(%a6),%a0	//a0 has the destination pointer
-	
+
 	bsrl	dest_sgl	//store the result
 	oril	#unfinx_mask,USER_FPSR(%a6)
 	bra	mvout_end
-	
+
 dp_catas:
 // Temp fix for z bit set in unf_sub
@@ -1831,10 +1831,10 @@
 
 	movel	#1,%d0
-	subw	%d0,LOCAL_EX(%a0) //account for difference between 
+	subw	%d0,LOCAL_EX(%a0) //account for difference between
 //				;denorm/norm bias
 
 	movel	%a0,%a1		//a1 has the operand input
 	movel	EXC_EA(%a6),%a0	//a0 has the destination pointer
-	
+
 	bsrl	dest_dbl	//store the result
 	oril	#unfinx_mask,USER_FPSR(%a6)
@@ -1908,5 +1908,5 @@
 	bfextu	FPCR_MODE(%a6){#2:#2},%d1 //get rounding mode
 	swap	%d1
-	movew	2(%a7),%d1	//set rounding precision 
+	movew	2(%a7),%d1	//set rounding precision
 	swap	%d1		//at this point d1 has PREC/MODE info
 	bsrl	round		//round result, sets the inex bit in
@@ -1968,5 +1968,5 @@
 
 //
-// Also note that the dtag must be set to norm here - this is because 
+// Also note that the dtag must be set to norm here - this is because
 // the 040 uses the dtag to execute the correct microcode.
 //
Index: c/src/lib/libcpu/m68k/m68040/fpsp/round.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/round.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/round.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -11,6 +11,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -24,5 +24,5 @@
 //	round --- round result according to precision/mode
 //
-//	a0 points to the input operand in the internal extended format 
+//	a0 points to the input operand in the internal extended format
 //	d1(high word) contains rounding precision:
 //		ext = $0000xxxx
@@ -47,13 +47,13 @@
 	.global	round
 round:
-// If g=r=s=0 then result is exact and round is done, else set 
-// the inex flag in status reg and continue.  
-//
-	bsrs	ext_grs			//this subroutine looks at the 
-//					:rounding precision and sets 
+// If g=r=s=0 then result is exact and round is done, else set
+// the inex flag in status reg and continue.
+//
+	bsrs	ext_grs			//this subroutine looks at the
+//					:rounding precision and sets
 //					;the appropriate g-r-s bits.
 	tstl	%d0			//if grs are zero, go force
 	bne	rnd_cont		//lower bits to zero for size
-	
+
 	swap	%d1			//set up d1.w for round prec.
 	bra	truncate
@@ -96,5 +96,5 @@
 rnd_mnus:
 	swap 	%d1			//set up d1 for round prec.
-	tstb	LOCAL_SGN(%a0)		//check for sign	
+	tstb	LOCAL_SGN(%a0)		//check for sign
 	bpl	truncate		//if negative then truncate
 	movel	#0xffffffff,%d0		//force g,r,s to be all f's
@@ -132,5 +132,5 @@
 // The ext_grs extract the guard/round/sticky bits according to the
 // selected rounding precision. It is called by the round subroutine
-// only.  All registers except d0 are kept intact. d0 becomes an 
+// only.  All registers except d0 are kept intact. d0 becomes an
 // updated guard,round,sticky in d0{31:29}
 //
@@ -143,5 +143,5 @@
 	bnes	sgl_or_dbl
 	bras	end_ext_grs
- 
+
 sgl_or_dbl:
 	moveml	%d2/%d3,-(%a7)		//make some temp registers
@@ -153,5 +153,5 @@
 	lsll	%d2,%d3			//shift g-r bits to MSB of d3
 	movel	LOCAL_HI(%a0),%d2		//get word 2 for s-bit test
-	andil	#0x0000003f,%d2		//s bit is the or of all other 
+	andil	#0x0000003f,%d2		//s bit is the or of all other
 	bnes	st_stky			//bits to the right of g-r
 	tstl	LOCAL_LO(%a0)		//test lower mantissa
@@ -160,10 +160,10 @@
 	bnes	st_stky			//if any are set, set sticky
 	bras	end_sd			//if words 3 and 4 are clr, exit
-grs_dbl:    
+grs_dbl:
 	bfextu	LOCAL_LO(%a0){#21:#2},%d3	//dbl-prec. g-r are 2 bits right
 	movel	#30,%d2			//of the dbl prec. limits
 	lsll	%d2,%d3			//shift g-r bits to the MSB of d3
 	movel	LOCAL_LO(%a0),%d2		//get lower mantissa  for s-bit test
-	andil	#0x000001ff,%d2		//s bit is the or-ing of all 
+	andil	#0x000001ff,%d2		//s bit is the or-ing of all
 	bnes	st_stky			//other bits to the right of g-r
 	tstl	%d0			//test word original g,r,s
@@ -272,18 +272,18 @@
 //	NORMALIZE
 //
-// These routines (nrm_zero & nrm_set) normalize the unnorm.  This 
-// is done by shifting the mantissa left while decrementing the 
+// These routines (nrm_zero & nrm_set) normalize the unnorm.  This
+// is done by shifting the mantissa left while decrementing the
 // exponent.
 //
-// NRM_SET shifts and decrements until there is a 1 set in the integer 
+// NRM_SET shifts and decrements until there is a 1 set in the integer
 // bit of the mantissa (msb in d1).
 //
-// NRM_ZERO shifts and decrements until there is a 1 set in the integer 
-// bit of the mantissa (msb in d1) unless this would mean the exponent 
-// would go less than 0.  In that case the number becomes a denorm - the 
-// exponent (d0) is set to 0 and the mantissa (d1 & d2) is not 
+// NRM_ZERO shifts and decrements until there is a 1 set in the integer
+// bit of the mantissa (msb in d1) unless this would mean the exponent
+// would go less than 0.  In that case the number becomes a denorm - the
+// exponent (d0) is set to 0 and the mantissa (d1 & d2) is not
 // normalized.
 //
-// Note that both routines have been optimized (for the worst case) and 
+// Note that both routines have been optimized (for the worst case) and
 // therefore do not have the easy to follow decrement/shift loop.
 //
@@ -307,7 +307,7 @@
 nrm_zero:
 	movew	LOCAL_EX(%a0),%d0
-	cmpw   #64,%d0          //see if exp > 64 
+	cmpw   #64,%d0          //see if exp > 64
 	bmis	d0_less
-	bsr	nrm_set		//exp > 64 so exp won't exceed 0 
+	bsr	nrm_set		//exp > 64 so exp won't exceed 0
 	rts
 d0_less:
@@ -316,13 +316,13 @@
 	movel	LOCAL_LO(%a0),%d2
 
-	bfffo	%d1{#0:#32},%d3	//get the distance to the first 1 
+	bfffo	%d1{#0:#32},%d3	//get the distance to the first 1
 //				;in ms mant
 	beqs	ms_clr		//branch if no bits were set
 	cmpw	%d3,%d0		//of X>Y
-	bmis	greater		//then exp will go past 0 (neg) if 
+	bmis	greater		//then exp will go past 0 (neg) if
 //				;it is just shifted
 	bsr	nrm_set		//else exp won't go past 0
 	moveml	(%a7)+,%d2/%d3/%d5/%d6
-	rts	
+	rts
 greater:
 	movel	%d2,%d6		//save ls mant in d6
@@ -330,9 +330,9 @@
 	lsll	%d0,%d1		//shift ms mant by count
 	movel	#32,%d5
-	subl	%d0,%d5		//make op a denorm by shifting bits 
-	lsrl	%d5,%d6		//by the number in the exp, then 
+	subl	%d0,%d5		//make op a denorm by shifting bits
+	lsrl	%d5,%d6		//by the number in the exp, then
 //				;set exp = 0.
 	orl	%d6,%d1		//shift the ls mant bits into the ms mant
-	movel	#0,%d0		//same as if decremented exp to 0 
+	movel	#0,%d0		//same as if decremented exp to 0
 //				;while shifting
 	movew	%d0,LOCAL_EX(%a0)
@@ -383,5 +383,5 @@
 
 //
-// We get here if ms mant was = 0, and we assume ls mant has bits 
+// We get here if ms mant was = 0, and we assume ls mant has bits
 // set (otherwise this would have been tagged a zero not a denorm).
 //
@@ -403,8 +403,8 @@
 //	Used by underflow.
 //
-// Input: 
+// Input:
 //	a0	 points to the operand to be denormalized
 //		 (in the internal extended format)
-//		 
+//
 //	d0: 	 rounding precision
 // Output:
@@ -414,6 +414,6 @@
 //	d0 	is guard,round,sticky
 //
-// d0 comes into this routine with the rounding precision. It 
-// is then loaded with the denormalized exponent threshold for the 
+// d0 comes into this routine with the rounding precision. It
+// is then loaded with the denormalized exponent threshold for the
 // rounding precision.
 //
@@ -422,5 +422,5 @@
 denorm:
 	btstb	#6,LOCAL_EX(%a0)	//check for exponents between $7fff-$4000
-	beqs	no_sgn_ext	
+	beqs	no_sgn_ext
 	bsetb	#7,LOCAL_EX(%a0)	//sign extend if it is so
 no_sgn_ext:
@@ -445,5 +445,5 @@
 	subw	LOCAL_EX(%a0),%d0	//diff = threshold - exp
 	cmpw	#67,%d0		//if diff > 67 (mant + grs bits)
-	bpls	chk_stky	//then branch (all bits would be 
+	bpls	chk_stky	//then branch (all bits would be
 //				; shifted off in denorm routine)
 	clrl	%d0		//else clear the sticky flag
@@ -458,5 +458,5 @@
 	subw	LOCAL_EX(%a0),%d0	//diff = threshold - exp
 	cmpw	#67,%d0		//if diff > 67 (mant + grs bits)
-	bpls	chk_stky	//then branch (all bits would be 
+	bpls	chk_stky	//then branch (all bits would be
 //				; shifted off in denorm routine)
 	clrl	%d0		//else clear the sticky flag
@@ -499,5 +499,5 @@
 // The LOCAL_LO and LOCAL_GRS parts of the value are copied to FP_SCR2
 // so that bfext can be used to extract the new low part of the mantissa.
-// Dnrm_lp can be called with a0 pointing to ETEMP or WBTEMP and there 
+// Dnrm_lp can be called with a0 pointing to ETEMP or WBTEMP and there
 // is no LOCAL_GRS scratch word following it on the fsave frame.
 //
@@ -518,6 +518,6 @@
 	subw	LOCAL_EX(%a0),%d1		//d1 = threshold - uns exponent
 	bles	no_lp			//d1 <= 0
-	cmpw	#32,%d1			
-	blts	case_1			//0 = d1 < 32 
+	cmpw	#32,%d1
+	blts	case_1			//0 = d1 < 32
 	cmpw	#64,%d1
 	blts	case_2			//32 <= d1 < 64
@@ -545,5 +545,5 @@
 	movel	%d1,LOCAL_LO(%a0)		//store new LOCAL_LO
 	clrb	%d1
-	bftst	%d0{#2:#30}	
+	bftst	%d0{#2:#30}
 	beqs	c1nstky
 	bsetl	#rnd_stky_bit,%d0
@@ -588,5 +588,5 @@
 	andil	#0xe0000000,%d2		//clear all but G,R,S
 	tstl	%d2			//test if original G,R,S are clear
-	beqs	clear_grs		
+	beqs	clear_grs
 	orl	#0x20000000,%d0		//set sticky bit in d0
 clear_grs:
@@ -624,5 +624,5 @@
 	andil	#0xc0000000,%d0
 	bras	c3com
-	
+
 sixty_five:
 	movel	LOCAL_HI(%a0),%d0
Index: c/src/lib/libcpu/m68k/m68040/fpsp/rtems_skel.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/rtems_skel.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/rtems_skel.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -21,5 +21,5 @@
 //
 //	If the exception was completely handled by the package, then
-//	the return will be via a 'jmp fpsp_done'.  Unless there is 
+//	the return will be via a 'jmp fpsp_done'.  Unless there is
 //	OS specific work to be done (such as handling a context switch or
 //	interrupt) the user program can be resumed via 'rte'.
@@ -28,11 +28,11 @@
 //	code is shown.  This code may need to be moved to an appropriate
 //	place in the target system, or rewritten.
-//	
+//
 
 //		Copyright (C) Motorola, Inc. 1990
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -69,5 +69,5 @@
 //	All inexact exceptions are real, but the 'real' handler
 //	will probably want to clear the pending exception.
-//	The provided code will clear the E3 exception (if pending), 
+//	The provided code will clear the E3 exception (if pending),
 //	otherwise clear the E1 exception.  The frestore is not really
 //	necessary for E1 exceptions.
@@ -83,5 +83,5 @@
 // that this fix is only for d43b parts, and is skipped if the
 // version number is not $40.
-// 
+//
 //
 	.global	SYM(_fpspEntry_inex)
@@ -103,5 +103,5 @@
 inex_ckofl:
 	btstb		#ovfl_bit,2(sp) //test for ovfl
-	beq		inex_ckufl 
+	beq		inex_ckufl
 	addl		#4,sp
 	frestore	(sp)+
@@ -147,5 +147,5 @@
 	unlk		a6
 	jmp	([SYM(M68040FPSPUserExceptionHandlers)+2*4],%za0)
-	
+
 //
 //	Overflow exception
@@ -165,5 +165,5 @@
 	unlk		a6
 	jmp	([SYM(M68040FPSPUserExceptionHandlers)+6*4],%za0)
-	
+
 //
 //	Underflow exception
@@ -183,5 +183,5 @@
 	unlk		a6
 	jmp	([SYM(M68040FPSPUserExceptionHandlers)+4*4],%za0)
-	
+
 //
 //	Signalling NAN exception
@@ -214,5 +214,5 @@
 	unlk		a6
 	jmp	([SYM(M68040FPSPUserExceptionHandlers)+5*4],%za0)
-	
+
 //
 //	BSUN exception
@@ -238,5 +238,5 @@
 //	F-line exception
 //
-//	A 'real' F-line exception is one that the FPSP is not supposed to 
+//	A 'real' F-line exception is one that the FPSP is not supposed to
 //	handle. E.g. an instruction with a co-processor ID that is not 1.
 //
@@ -342,5 +342,5 @@
 //	d0 - number of bytes to read (maximum count is 12)
 //
-// Like mem_write, mem_read always reads with a supervisor 
+// Like mem_write, mem_read always reads with a supervisor
 // destination address on the supervisor stack.  Also like mem_write,
 // the EXC_SR is checked and a simple memory copy is done if reading
Index: c/src/lib/libcpu/m68k/m68040/fpsp/sacos.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/sacos.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/sacos.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -15,5 +15,5 @@
 //	Accuracy and Monotonicity: The returned result is within 3 ulps in
 //		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
-//		result is subsequently rounded to double precision. The 
+//		result is subsequently rounded to double precision. The
 //		result is provably monotonic in double precision.
 //
@@ -41,6 +41,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -113,5 +113,5 @@
 	fmovel		%d1,%FPCR
 	fmoves		#0x00000000,%fp0
-	rts				//Facos ; of +1 is exact	
+	rts				//Facos ; of +1 is exact
 
 	|end
Index: c/src/lib/libcpu/m68k/m68040/fpsp/sasin.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/sasin.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/sasin.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -15,5 +15,5 @@
 //	Accuracy and Monotonicity: The returned result is within 3 ulps in
 //		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
-//		result is subsequently rounded to double precision. The 
+//		result is subsequently rounded to double precision. The
 //		result is provably monotonic in double precision.
 //
@@ -41,6 +41,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -100,5 +100,5 @@
 	oril		#0x3F800000,%d0	// ...+-1 IN SGL FORMAT
 	movel		%d0,-(%sp)	// ...push SIGN(X) IN SGL-FMT
-	fmovel		%d1,%FPCR		
+	fmovel		%d1,%FPCR
 	fmuls		(%sp)+,%fp0
 	bra		t_frcinx
Index: c/src/lib/libcpu/m68k/m68040/fpsp/satan.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/satan.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/satan.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -46,6 +46,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -55,5 +55,5 @@
 
 #include "fpsp.defs"
-	
+
 BOUNDS1:	.long 0x3FFB8000,0x4002FFFF
 
@@ -325,5 +325,5 @@
 //--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
 
-	
+
 	fmovex		%fp0,%fp1
 	fmulx		%fp1,%fp1
@@ -335,5 +335,5 @@
 	fmuld		ATANA1,%fp1	// ...A1*U*V
 	fmulx		%fp2,%fp1		// ...A1*U*V*(A2+V*(A3+V))
-	
+
 	faddx		%fp1,%fp0		// ...ATAN(U), FP1 RELEASED
 	fmovel		%d1,%FPCR		//restore users exceptions
@@ -359,5 +359,5 @@
 	fmulx		%fp0,%fp0	// ...FP0 IS Y = X*X
 
-	
+
 	movew		#0x0000,XDCARE(%a6)
 
@@ -384,5 +384,5 @@
 
 	faddx		%fp2,%fp1		// ...[B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))]
-	
+
 
 	fmulx		%fp1,%fp0	// ...X*Y*([B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))])
@@ -416,5 +416,5 @@
 	fdivx		%fp0,%fp1		// ...FP1 IS -1/X
 
-	
+
 //--DIVIDE IS STILL CRANKING
 
@@ -442,5 +442,5 @@
 
 	faddx		%fp2,%fp1		// ...[Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
-	
+
 
 	fmulx		%fp1,%fp0		// ...X'*Y*([B1+Z*(B3+Z*B5)]
@@ -449,5 +449,5 @@
 
 	fmovel		%d1,%FPCR		//restore users exceptions
-	
+
 	btstb		#7,(%a0)
 	beqs		pos_big
@@ -477,4 +477,4 @@
 	fsubx		PTINY,%fp0
 	bra		t_frcinx
-	
+
 	|end
Index: c/src/lib/libcpu/m68k/m68040/fpsp/satanh.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/satanh.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/satanh.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -16,5 +16,5 @@
 //	Accuracy and Monotonicity: The returned result is within 3 ulps in
 //		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
-//		result is subsequently rounded to double precision. The 
+//		result is subsequently rounded to double precision. The
 //		result is provably monotonic in double precision.
 //
@@ -36,5 +36,5 @@
 //
 //	4. (|X| = 1) Generate infinity with an appropriate sign and
-//		divide-by-zero by	
+//		divide-by-zero by
 //		sgn := sign(X)
 //		atan(X) := sgn / (+0).
@@ -48,6 +48,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/scale.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/scale.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/scale.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -12,5 +12,5 @@
 //	the fscale unimplemented instruction.
 //
-//	Input: Double-extended destination operand in FPTEMP, 
+//	Input: Double-extended destination operand in FPTEMP,
 //		double-extended source operand in ETEMP.
 //
@@ -20,10 +20,10 @@
 //
 //	Algorithm:
-//		
+//
 //		Copyright (C) Motorola, Inc. 1990
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -150,5 +150,5 @@
 	addl		%d0,%d1		//add src to dest
 	beqs		denorm		//if zero, result is denorm
-	blts		fix_dnrm	//if negative, result is 
+	blts		fix_dnrm	//if negative, result is
 //					;needing denormalization
 	tstb		L_SCR1(%a6)
@@ -164,5 +164,5 @@
 //
 // The result exponent is below denorm value.  Test for catastrophic
-// underflow and force zero if true.  If not, try to shift the 
+// underflow and force zero if true.  If not, try to shift the
 // mantissa right until a zero exponent exists.
 //
@@ -232,5 +232,5 @@
 
 //
-// The rounding mode changed the zero to a smallest denorm. Call 
+// The rounding mode changed the zero to a smallest denorm. Call
 // t_resdnrm with exceptional operand in ETEMP.
 //
@@ -253,5 +253,5 @@
 	bras		sm_dnrm
 
-	
+
 //
 // The result has underflowed to zero. Return zero and set
@@ -287,5 +287,5 @@
 	clrl		FP_SCR1+4(%a6)	//for gen_except.
 	clrl		FP_SCR1+8(%a6)
-	fmoves		#0x80000000,%fp0	
+	fmoves		#0x80000000,%fp0
 	rts
 pos_zero:
@@ -302,5 +302,5 @@
 //
 dst_dnrm:
-	moveml		%d2/%d3,-(%a7)	
+	moveml		%d2/%d3,-(%a7)
 	movew		FPTEMP_EX(%a6),%d1
 	movel		FPTEMP_HI(%a6),%d2
@@ -316,5 +316,5 @@
 	bras		dst_loop
 //
-// Destination became normalized.  Simply add the remaining 
+// Destination became normalized.  Simply add the remaining
 // portion of the src to the exponent.
 //
Index: c/src/lib/libcpu/m68k/m68040/fpsp/scosh.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/scosh.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/scosh.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -52,6 +52,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/setox.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/setox.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/setox.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -334,6 +334,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/sgetem.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/sgetem.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/sgetem.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -4,12 +4,12 @@
 //	sgetem.sa 3.1 12/10/90
 //
-//	The entry point sGETEXP returns the exponent portion 
+//	The entry point sGETEXP returns the exponent portion
 //	of the input argument.  The exponent bias is removed
-//	and the exponent value is returned as an extended 
+//	and the exponent value is returned as an extended
 //	precision number in fp0.  sGETEXPD handles denormalized
 //	numbers.
 //
-//	The entry point sGETMAN extracts the mantissa of the 
-//	input argument.  The mantissa is converted to an 
+//	The entry point sGETMAN extracts the mantissa of the
+//	input argument.  The mantissa is converted to an
 //	extended precision number and returned in fp0.  The
 //	range of the result is [1.0 - 2.0).
@@ -27,6 +27,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/sint.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/sint.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/sint.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -4,6 +4,6 @@
 //	sint.sa 3.1 12/10/90
 //
-//	The entry point sINT computes the rounded integer 
-//	equivalent of the input argument, sINTRZ computes 
+//	The entry point sINT computes the rounded integer
+//	equivalent of the input argument, sINTRZ computes
 //	the integer rounded to zero of the input argument.
 //
@@ -27,8 +27,8 @@
 //	Algorithm: (sint and sintrz)
 //
-//	1. If exp(X) >= 63, return X. 
+//	1. If exp(X) >= 63, return X.
 //	   If exp(X) < 0, return +/- 0 or +/- 1, according to
 //	   the rounding mode.
-//	
+//
 //	2. (X is in range) set rsc = 63 - exp(X). Unnormalize the
 //	   result to the exponent $403e.
@@ -54,6 +54,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -81,7 +81,7 @@
 	bfextu	FPCR_MODE(%a6){#2:#2},%d1	//use user's mode for rounding
 //					;implicitly has extend precision
-//					;in upper word. 
+//					;in upper word.
 	movel	%d1,L_SCR1(%a6)		//save mode bits
-	bras	sintexc			
+	bras	sintexc
 
 //
@@ -118,11 +118,11 @@
 	movel	#1,L_SCR1(%a6)		//use rz mode for rounding
 //					;implicitly has extend precision
-//					;in upper word. 
-	bras	sintexc			
+//					;in upper word.
+	bras	sintexc
 //
 //	SINTDO
 //
 //	Input:	a0 points to an IEEE extended format operand
-// 	Output:	fp0 has the result 
+// 	Output:	fp0 has the result
 //
 // Exceptions:
@@ -136,5 +136,5 @@
 	bfextu	FPCR_MODE(%a6){#2:#2},%d1	//use user's mode for rounding
 //					;implicitly has ext precision
-//					;in upper word. 
+//					;in upper word.
 	movel	%d1,L_SCR1(%a6)		//save mode bits
 //
@@ -144,5 +144,5 @@
 	bclrb	#sign_bit,LOCAL_EX(%a0)	//convert to internal extended
 //					;format
-	sne	LOCAL_SGN(%a0)		
+	sne	LOCAL_SGN(%a0)
 	cmpw	#0x403e,LOCAL_EX(%a0)	//check if (unbiased) exp > 63
 	bgts	out_rnge			//branch if exp < 63
@@ -190,5 +190,5 @@
 	bsr	ld_mzero
 	bra	t_inx2
-	
+
 //
 // Input is greater than 2^63.  All bits are significant.  Return
Index: c/src/lib/libcpu/m68k/m68040/fpsp/slog2.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/slog2.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/slog2.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -4,26 +4,26 @@
 //	slog2.sa 3.1 12/10/90
 //
-//       The entry point slog10 computes the base-10 
+//       The entry point slog10 computes the base-10
 //	logarithm of an input argument X.
-//	slog10d does the same except the input value is a 
-//	denormalized number.  
+//	slog10d does the same except the input value is a
+//	denormalized number.
 //	sLog2 and sLog2d are the base-2 analogues.
 //
-//       INPUT:	Double-extended value in memory location pointed to 
+//       INPUT:	Double-extended value in memory location pointed to
 //		by address register a0.
 //
-//       OUTPUT: log_10(X) or log_2(X) returned in floating-point 
+//       OUTPUT: log_10(X) or log_2(X) returned in floating-point
 //		register fp0.
 //
-//       ACCURACY and MONOTONICITY: The returned result is within 1.7 
-//		ulps in 64 significant bit, i.e. within 0.5003 ulp 
-//		to 53 bits if the result is subsequently rounded 
-//		to double precision. The result is provably monotonic 
+//       ACCURACY and MONOTONICITY: The returned result is within 1.7
+//		ulps in 64 significant bit, i.e. within 0.5003 ulp
+//		to 53 bits if the result is subsequently rounded
+//		to double precision. The result is provably monotonic
 //		in double precision.
 //
-//       SPEED:	Two timings are measured, both in the copy-back mode. 
-//		The first one is measured when the function is invoked 
-//		the first time (so the instructions and data are not 
-//		in cache), and the second one is measured when the 
+//       SPEED:	Two timings are measured, both in the copy-back mode.
+//		The first one is measured when the function is invoked
+//		the first time (so the instructions and data are not
+//		in cache), and the second one is measured when the
 //		function is reinvoked at the same input argument.
 //
@@ -45,5 +45,5 @@
 //
 //
-//       slog10: 
+//       slog10:
 //
 //       Step 0.   If X < 0, create a NaN and raise the invalid operation
@@ -99,6 +99,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -107,5 +107,5 @@
 	|section	8
 
-	|xref	t_frcinx	
+	|xref	t_frcinx
 	|xref	t_operr
 	|xref	slogn
Index: c/src/lib/libcpu/m68k/m68040/fpsp/slogn.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/slogn.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/slogn.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -16,9 +16,9 @@
 //	Accuracy and Monotonicity: The returned result is within 2 ulps in
 //		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
-//		result is subsequently rounded to double precision. The 
+//		result is subsequently rounded to double precision. The
 //		result is provably monotonic in double precision.
 //
-//	Speed: The program slogn takes approximately 190 cycles for input 
-//		argument X such that |X-1| >= 1/16, which is the the usual 
+//	Speed: The program slogn takes approximately 190 cycles for input
+//		argument X such that |X-1| >= 1/16, which is the the usual
 //		situation. For those arguments, slognp1 takes approximately
 //		 210 cycles. For the less common arguments, the program will
@@ -48,24 +48,24 @@
 //		of the algorithm for LOGN and compute log(1+X) as
 //		k*log(2) + log(F) + poly where poly approximates log(1+u),
-//		u = (Y-F)/F. 
+//		u = (Y-F)/F.
 //
 //	Implementation Notes:
 //	Note 1. There are 64 different possible values for F, thus 64 log(F)'s
-//		need to be tabulated. Moreover, the values of 1/F are also 
+//		need to be tabulated. Moreover, the values of 1/F are also
 //		tabulated so that the division in (Y-F)/F can be performed by a
 //		multiplication.
 //
 //	Note 2. In Step 2 of lognp1, in order to preserved accuracy, the value
-//		Y-F has to be calculated carefully when 1/2 <= X < 3/2. 
+//		Y-F has to be calculated carefully when 1/2 <= X < 3/2.
 //
 //	Note 3. To fully exploit the pipeline, polynomials are usually separated
 //		into two parts evaluated independently before being added up.
-//	
+//
 
 //		Copyright (C) Motorola, Inc. 1990
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -265,5 +265,5 @@
 //----Note that this code assumes the denormalized input is NON-ZERO.
 
-     moveml	%d2-%d7,-(%a7)		// ...save some registers 
+     moveml	%d2-%d7,-(%a7)		// ...save some registers
      movel	#0x00000000,%d3		// ...D3 is exponent of smallest norm. #
      movel	4(%a0),%d4
@@ -350,5 +350,5 @@
 //--LOG(1+U) CAN BE VERY EFFICIENT.
 //--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
-//--DIVISION IS NEEDED TO CALCULATE (Y-F)/F. 
+//--DIVISION IS NEEDED TO CALCULATE (Y-F)/F.
 
 //--GET K, Y, F, AND ADDRESS OF 1/F.
@@ -366,5 +366,5 @@
 	oril	#0x01000000,FFRAC(%a6) // ...GET F: ATTACH A 1 AT THE EIGHTH BIT
 	movel	FFRAC(%a6),%d0	// ...READY TO GET ADDRESS OF 1/F
-	andil	#0x7E000000,%d0	
+	andil	#0x7E000000,%d0
 	asrl	#8,%d0
 	asrl	#8,%d0
@@ -393,5 +393,5 @@
 
 	fmovex	%fp2,%fp3
-	fmovex	%fp2,%fp1	
+	fmovex	%fp2,%fp1
 
 	fmuld	LOGA6,%fp1	// ...V*A6
@@ -443,5 +443,5 @@
 	fmulx	%fp0,%fp0	// ...FP0 IS V
 	fmovex	%fp1,SAVEU(%a6) // ...STORE U IN MEMORY, FREE FP1
-	fmovex	%fp0,%fp1	
+	fmovex	%fp0,%fp1
 	fmulx	%fp1,%fp1	// ...FP1 IS W
 
@@ -468,5 +468,5 @@
 
 	fmovel	%d1,%fpcr
-	faddx	SAVEU(%a6),%fp0		
+	faddx	SAVEU(%a6),%fp0
 	bra	t_frcinx
 	rts
@@ -552,5 +552,5 @@
 	asrl	#4,%d0		// ...D0 CONTAINS DISPLACEMENT FOR 1/F
 	faddx	%fp1,%fp1		// ...GET 2Z
-	fmovemx %fp2-%fp2/%fp3,-(%sp)	// ...SAVE FP2 
+	fmovemx %fp2-%fp2/%fp3,-(%sp)	// ...SAVE FP2
 	faddx	%fp1,%fp0		// ...FP0 IS Y-F = (2-F)+2Z
 	lea	LOGTBL,%a0	// ...A0 IS ADDRESS OF 1/F
Index: c/src/lib/libcpu/m68k/m68040/fpsp/smovecr.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/smovecr.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/smovecr.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -18,6 +18,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -42,5 +42,5 @@
 FZERO:	.long	00000000
 //
-//	FMOVECR 
+//	FMOVECR
 //
 	.global	smovcr
@@ -58,5 +58,5 @@
 	bles	SM_TBL		//valid constants in this range
 	cmpib	#0x2f,%d0		//check range $10 - $2f
-	bles	Z_VAL		//if in this range, return zero 
+	bles	Z_VAL		//if in this range, return zero
 	cmpib	#0x3f,%d0		//check range $30 - $3f
 	ble  	BG_TBL		//valid constants in this range
@@ -152,5 +152,5 @@
 	btstb	#sign_bit,LOCAL_EX(%a0)
 	sne	LOCAL_SGN(%a0)		//convert to internal ext. format
-	
+
 	bsr	round			//go round the mantissa
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/srem_mod.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/srem_mod.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/srem_mod.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -24,5 +24,5 @@
 //
 //       Step 1.  Save and strip signs of X and Y: signX := sign(X),
-//                signY := sign(Y), X := |X|, Y := |Y|, 
+//                signY := sign(Y), X := |X|, Y := |Y|,
 //                signQ := signX EOR signY. Record whether MOD or REM
 //                is requested.
@@ -44,5 +44,5 @@
 //       Step 4.  At this point, R = X - QY = MOD(X,Y). Set
 //                Last_Subtract := false (used in Step 7 below). If
-//                MOD is requested, go to Step 6. 
+//                MOD is requested, go to Step 6.
 //
 //       Step 5.  R = MOD(X,Y), but REM(X,Y) is requested.
@@ -64,11 +64,11 @@
 //                R := 0. Return signQ, last 7 bits of Q, and R.
 //
-//                
-             
+//
+
 //		Copyright (C) Motorola, Inc. 1990
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -365,8 +365,8 @@
 //
 Get_Q:
-   clrl		%d6		
+   clrl		%d6
    movew               SignQ(%a6),%d6        // ...D6 is sign(Q)
    movel               #8,%d7
-   lsrl                %d7,%d6           
+   lsrl                %d7,%d6
    andil               #0x0000007F,%d3   // ...7 bits of Q
    orl                 %d6,%d3           // ...sign and bits of Q
@@ -394,5 +394,5 @@
 //..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
    addql               #1,%d3
-   cmpil               #8,%d0           // ...D0 is j 
+   cmpil               #8,%d0           // ...D0 is j
    bges                Q_Big
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/ssin.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/ssin.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/ssin.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -86,6 +86,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -207,5 +207,5 @@
 //--HIDE THE NEXT THREE INSTRUCTIONS
 	lea		PITBL+0x200,%a1 // ...TABLE OF N*PI/2, N = -32,...,32
-	
+
 
 //--FP1 IS NOW READY
@@ -276,5 +276,5 @@
 //--FP3 RELEASED, RESTORE NOW AND TAKE SOME ADVANTAGE OF HIDING
 //--FP2 RELEASED, RESTORE NOW AND TAKE FULL ADVANTAGE OF HIDING
-	
+
 
 	fmulx		%fp1,%fp0		// ...SIN(R')-R'
@@ -338,5 +338,5 @@
 //--FP3 RELEASED, RESTORE NOW AND TAKE SOME ADVANTAGE OF HIDING
 //--FP2 RELEASED.
-	
+
 
 	faddx		%fp1,%fp0
@@ -355,5 +355,5 @@
 	cmpil		#0x3FFF8000,%d0
 	bgts		REDUCEX
-        
+
 
 SINSM:
@@ -469,5 +469,5 @@
 	clrw           FP_SCR2+2(%a6)
 	movel		#0xC90FDAA2,FP_SCR2+4(%a6)
-	clrl		FP_SCR2+8(%a6)		// ...FP_SCR2 is  2**(L) * Piby2_1	
+	clrl		FP_SCR2+8(%a6)		// ...FP_SCR2 is  2**(L) * Piby2_1
 
 //--FP2 IS READY
@@ -517,5 +517,5 @@
 	fmovemx	(%a7)+,%fp2-%fp5
 
-	
+
 	movel		ADJN(%a6),%d0
 	cmpil		#4,%d0
@@ -562,5 +562,5 @@
 //--HIDE THE NEXT THREE INSTRUCTIONS
 	lea		PITBL+0x200,%a1 // ...TABLE OF N*PI/2, N = -32,...,32
-	
+
 
 //--FP1 IS NOW READY
@@ -580,5 +580,5 @@
 	movel		N(%a6),%d0
 	rorl		#1,%d0
-	
+
 	cmpil		#0,%d0		// ...D0 < 0 IFF N IS ODD
 	bge		NEVEN
@@ -644,5 +644,5 @@
 	fmulx		%fp2,%fp0	 // ...S(B2+...)
 
-	
+
 
 	fmulx		RPRIME(%a6),%fp1	// ...R'S(A1+...)
@@ -712,5 +712,5 @@
 	fmulx		%fp2,%fp0	 // ...s(a1+...)
 
-	
+
 
 	fadds		COSB1,%fp1	// ...B1+S(B2...)
@@ -731,5 +731,5 @@
 	cmpil		#0x3FFF8000,%d0
 	bgt		REDUCEX
-        
+
 
 SCSM:
Index: c/src/lib/libcpu/m68k/m68040/fpsp/ssinh.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/ssinh.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/ssinh.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -8,5 +8,5 @@
 //       input.
 //
-//       Input: Double-extended number X in location pointed to 
+//       Input: Double-extended number X in location pointed to
 //		by address register a0.
 //
@@ -52,6 +52,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/stan.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/stan.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/stan.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -53,6 +53,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -240,8 +240,8 @@
 
 	fmulx		%fp3,%fp1	 	// ...S(Q1+S(Q2+S(Q3+SQ4)))
-	
+
 
 	faddx		%fp2,%fp0	 	// ...R+RS(P1+S(P2+SP3))
-	
+
 
 	fadds		#0x3F800000,%fp1	// ...1+S(Q1+...)
@@ -278,9 +278,9 @@
 
 	fmulx		%fp3,%fp0	 	// ...S(Q1+S(Q2+S(Q3+SQ4)))
-	
+
 
 	faddx		%fp2,%fp1	 	// ...R+RS(P1+S(P2+SP3))
 	fadds		#0x3F800000,%fp0	// ...1+S(Q1+...)
-	
+
 
 	fmovex		%fp1,-(%sp)
@@ -400,5 +400,5 @@
 	clrw           FP_SCR2+2(%a6)
 	movel		#0xC90FDAA2,FP_SCR2+4(%a6)
-	clrl		FP_SCR2+8(%a6)		// ...FP_SCR2 is  2**(L) * Piby2_1	
+	clrl		FP_SCR2+8(%a6)		// ...FP_SCR2 is  2**(L) * Piby2_1
 
 //--FP2 IS READY
@@ -448,5 +448,5 @@
 	fmovemx	(%a7)+,%fp2-%fp5
 
-	
+
 	movel		N(%a6),%d0
         rorl		#1,%d0
Index: c/src/lib/libcpu/m68k/m68040/fpsp/stanh.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/stanh.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/stanh.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -52,6 +52,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -59,5 +59,5 @@
 
 	|section	8
-	
+
 #include "fpsp.defs"
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/sto_res.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/sto_res.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/sto_res.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -8,7 +8,7 @@
 //	users destination register then fp0 is moved to the the
 //	correct floating-point destination register.  fp0 and fp1
-//	are then restored to the original contents. 
+//	are then restored to the original contents.
 //
-//	Input:	result in fp0,fp1 
+//	Input:	result in fp0,fp1
 //
 //		d2 & a0 should be kept unmodified
@@ -22,6 +22,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/stwotox.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/stwotox.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/stwotox.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -79,6 +79,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -225,5 +225,5 @@
 	bles		TWOMAIN
 	bra		EXPBORS
-	
+
 
 TWOMAIN:
@@ -232,5 +232,5 @@
 	fmovex		%fp0,%fp1
 	fmuls		#0x42800000,%fp1  // ...64 * X
-	
+
 	fmovel		%fp1,N(%a6)		// ...N = ROUND-TO-INT(64 X)
 	movel		%d2,-(%sp)
@@ -267,5 +267,5 @@
 	clrl		FACT2LOW(%a6)
 	addw		%d0,FACT1(%a6)
-	
+
 	fmulx		LOG2,%fp0	// ...FP0 IS R
 	addw		%d0,FACT2(%a6)
@@ -335,5 +335,5 @@
 	fmovex		%fp0,%fp1
 	fmuld		L2TEN64,%fp1	// ...X*64*LOG10/LOG2
-	
+
 	fmovel		%fp1,N(%a6)		// ...N=INT(X*64*LOG10/LOG2)
 	movel		%d2,-(%sp)
@@ -378,5 +378,5 @@
 
 	fmulx		LOG10,%fp0	// ...FP0 IS R
-	
+
 	addw		%d0,FACT1(%a6)
 	addw		%d0,FACT2(%a6)
@@ -408,7 +408,7 @@
 	fmulx		%fp1,%fp2		// ...FP2 IS S*(A1+S*(A3+S*A5))
 	faddx		%fp3,%fp0		// ...FP0 IS R+R*S*(A2+S*A4)
-	
+
 	faddx		%fp2,%fp0		// ...FP0 IS EXP(R) - 1
-	
+
 
 //--FINAL RECONSTRUCTION PROCESS
Index: c/src/lib/libcpu/m68k/m68040/fpsp/tbldo.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/tbldo.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/tbldo.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -9,10 +9,10 @@
 //			functions.  Dyadic functions require two
 //			levels, and the tables are still contained
-//			in do_func.  The table is arranged for 
+//			in do_func.  The table is arranged for
 //			index with a 10-bit index, with the first
 //			7 bits the opcode, and the remaining 3
 //			the stag.  For dyadic functions, all
 //			valid addresses are to the generic entry
-//			point. 
+//			point.
 //
 
@@ -20,6 +20,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -60,5 +60,5 @@
 
 	.long	sint		//$01-0 fint norm
-	.long	szero		//$01-1 fint zero 
+	.long	szero		//$01-1 fint zero
 	.long	sinf		//$01-2 fint inf
 	.long	src_nan		//$01-3 fint nan
Index: c/src/lib/libcpu/m68k/m68040/fpsp/util.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/util.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/util.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -7,10 +7,10 @@
 //
 //	ovf_res: used by overflow to force the correct
-//		 result. ovf_r_k, ovf_r_x2, ovf_r_x3 are 
+//		 result. ovf_r_k, ovf_r_x2, ovf_r_x3 are
 //		 derivatives of this routine.
 //	get_fline: get user's opcode word
 //	g_dfmtou: returns the destination format.
 //	g_opcls: returns the opclass of the float instruction.
-//	g_rndpr: returns the rounding precision. 
+//	g_rndpr: returns the rounding precision.
 //	reg_dest: write byte, word, or long data to Dn
 //
@@ -19,6 +19,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -42,11 +42,11 @@
 // the exponent.
 //					;+inf
-EXT_PINF:	.long	0x7fff0000,0x00000000,0x00000000,0x00000000	
+EXT_PINF:	.long	0x7fff0000,0x00000000,0x00000000,0x00000000
 //					;largest +ext
-EXT_PLRG:	.long	0x7ffe0000,0xffffffff,0xffffffff,0x00000000	
+EXT_PLRG:	.long	0x7ffe0000,0xffffffff,0xffffffff,0x00000000
 //					;largest magnitude +sgl in ext
-SGL_PLRG:	.long	0x407e0000,0xffffff00,0x00000000,0x00000000	
+SGL_PLRG:	.long	0x407e0000,0xffffff00,0x00000000,0x00000000
 //					;largest magnitude +dbl in ext
-DBL_PLRG:	.long	0x43fe0000,0xffffffff,0xfffff800,0x00000000	
+DBL_PLRG:	.long	0x43fe0000,0xffffffff,0xfffff800,0x00000000
 //					;largest -ext
 
@@ -73,5 +73,5 @@
 //	ovf_r_k --- overflow result calculation
 //
-// This entry point is used by kernel_ex.  
+// This entry point is used by kernel_ex.
 //
 // This forces the destination precision to be extended
@@ -82,5 +82,5 @@
 	.global	ovf_r_k
 ovf_r_k:
-	lea	ETEMP(%a6),%a0	//a0 points to source operand	
+	lea	ETEMP(%a6),%a0	//a0 points to source operand
 	bclrb	#sign_bit,ETEMP_EX(%a6)
 	sne	ETEMP_SGN(%a6)	//convert to internal IEEE format
@@ -115,8 +115,8 @@
 	movew	CMDREG3B(%a6),%d0		//get the command word again
 	andil	#0x7f,%d0			//clear all except operation
-	cmpil	#0x33,%d0			
+	cmpil	#0x33,%d0
 	beql	ovf_fsgl		//fsglmul or fsgldiv
 	cmpil	#0x30,%d0
-	beql	ovf_fsgl		
+	beql	ovf_fsgl
 	bra	ovf_fpcr		//instruction is none of the above
 //					;use FPCR
@@ -135,5 +135,5 @@
 	beql	ovf_fsgl		//fsgldiv
 	bra	ovf_fpcr		//none of the above, use FPCR
-// 
+//
 //
 // Inst is either fsgldiv or fsglmul.  Force extended precision.
@@ -155,5 +155,5 @@
 	bfextu	FPCR_MODE(%a6){#0:#2},%d0 //set round precision
 	bra	ovf_res
-	
+
 //
 //
@@ -195,5 +195,5 @@
 	leal	EXT_PINF,%a1	//answer is +/- infinity
 	bsetb	#inf_bit,FPSR_CC(%a6)
-	bra	set_sign	//now go set the sign	
+	bra	set_sign	//now go set the sign
 EXT_RZ:
 	leal	EXT_PLRG,%a1	//answer is +/- large number
@@ -316,7 +316,7 @@
 //
 // 	g_rndpr --- put rounding precision in d0{1:0}
-//	
+//
 //	valid return codes are:
-//		00 - extended 
+//		00 - extended
 //		01 - single
 //		10 - double
@@ -353,5 +353,5 @@
 // is the same as the rounding precision.  Pass results from g_dfmtou.
 //
-	bsr 	g_dfmtou	
+	bsr 	g_dfmtou
 	rts
 op_0x0:
@@ -367,5 +367,5 @@
 	movew	CMDREG3B(%a6),%d0	//get the command word again
 	andil	#0x7f,%d0		//clear all except operation
-	cmpil	#0x33,%d0			
+	cmpil	#0x33,%d0
 	beql	unf_fsgl	//fsglmul or fsgldiv
 	cmpil	#0x30,%d0
@@ -411,5 +411,5 @@
 //
 unf_fsgl:
-	movel	#0,%d0		
+	movel	#0,%d0
 	rts
 //
@@ -439,5 +439,5 @@
 //	If E3, the format is extended.
 //
-//	Dest. Fmt.	
+//	Dest. Fmt.
 //		extended  010 -> 00
 //		single    001 -> 01
@@ -471,15 +471,15 @@
 // the exponent.
 //					;+zero
-EXT_PZRO:	.long	0x00000000,0x00000000,0x00000000,0x00000000	
+EXT_PZRO:	.long	0x00000000,0x00000000,0x00000000,0x00000000
 //					;+zero
-SGL_PZRO:	.long	0x3f810000,0x00000000,0x00000000,0x00000000	
+SGL_PZRO:	.long	0x3f810000,0x00000000,0x00000000,0x00000000
 //					;+zero
-DBL_PZRO:	.long	0x3c010000,0x00000000,0x00000000,0x00000000	
+DBL_PZRO:	.long	0x3c010000,0x00000000,0x00000000,0x00000000
 //					;smallest +ext denorm
-EXT_PSML:	.long	0x00000000,0x00000000,0x00000001,0x00000000	
+EXT_PSML:	.long	0x00000000,0x00000000,0x00000001,0x00000000
 //					;smallest +sgl denorm
-SGL_PSML:	.long	0x3f810000,0x00000100,0x00000000,0x00000000	
+SGL_PSML:	.long	0x3f810000,0x00000100,0x00000000,0x00000000
 //					;smallest +dbl denorm
-DBL_PSML:	.long	0x3c010000,0x00000000,0x00000800,0x00000000	
+DBL_PSML:	.long	0x3c010000,0x00000000,0x00000800,0x00000000
 //
 //	UNF_SUB --- underflow result calculation
@@ -525,5 +525,5 @@
 	leal	EXT_PZRO,%a1	//answer is +/- zero
 	bsetb	#z_bit,FPSR_CC(%a6)
-	bra	uset_sign	//now go set the sign	
+	bra	uset_sign	//now go set the sign
 uEXT_RZ:
 	leal	EXT_PZRO,%a1	//answer is +/- zero
@@ -632,5 +632,5 @@
 //
 // Input:
-//	L_SCR1: Data 
+//	L_SCR1: Data
 //	d1:     data size and dest register number formatted as:
 //
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_bsun.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_bsun.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_bsun.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -16,6 +16,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_fline.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_fline.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_fline.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -16,6 +16,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -55,5 +55,5 @@
 	movel	#4,%d0
 	addl	#4,%a6		//to offset the sub.l #4,a7 above so that
-//				;a6 can point correctly to the stack frame 
+//				;a6 can point correctly to the stack frame
 //				;before branching to mem_read
 	bsrl	mem_read
@@ -65,5 +65,5 @@
 	bfextu	%d0{#16:#6},%d1
 	cmpib	#0x17,%d1		//check if it is an FMOVECR encoding
-	bne	not_mvcr	
+	bne	not_mvcr
 //				;if an FMOVECR instruction, fix stack
 //				;and go to FPSP_UNIMP
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_operr.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_operr.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_operr.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -16,6 +16,6 @@
 // integer overflow, or the source op is inf, then the result stored is
 // garbage.
-// There are three cases in which operr is incorrectly signaled on the 
-// 040.  This occurs for move_out of format b, w, or l for the largest 
+// There are three cases in which operr is incorrectly signaled on the
+// 040.  This occurs for move_out of format b, w, or l for the largest
 // negative integer (-2^7 for b, -2^15 for w, -2^31 for l).
 //
@@ -39,5 +39,5 @@
 // If the inst is move_out, then same as Note 1.
 // If the inst is not move_out, the dest is not modified.
-// The exceptional operand is not defined for integer overflow 
+// The exceptional operand is not defined for integer overflow
 // during a move_out.
 //
@@ -46,6 +46,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -80,5 +80,5 @@
 
 //
-// If the destination size is B,W,or L, the operr must be 
+// If the destination size is B,W,or L, the operr must be
 // handled here.
 //
@@ -93,7 +93,7 @@
 
 //
-// The size is not B,W,or L, so the operr is handled by the 
+// The size is not B,W,or L, so the operr is handled by the
 // kernel handler.  Set the operr bits and clean up, leaving
-// only the integer exception frame on the stack, and the 
+// only the integer exception frame on the stack, and the
 // fpu in the original exceptional state.
 //
@@ -114,5 +114,5 @@
 	andib	#0xe0,%d0		//clr all but tag
 	cmpib	#0x60,%d0		//check for nan
-	beq	operr_nan	
+	beq	operr_nan
 	cmpil	#0x80000000,FPTEMP_LO(%a6) //test if ls lword is special
 	bnes	chklerr		//if not equal, check for incorrect operr
@@ -161,5 +161,5 @@
 	andib	#0xe0,%d0		//clr all but tag
 	cmpib	#0x60,%d0		//check for nan
-	beq	operr_nan	
+	beq	operr_nan
 	cmpil	#0xffff8000,FPTEMP_LO(%a6) //test if ls lword is special
 	bnes	chkwerr		//if not equal, check for incorrect operr
@@ -188,5 +188,5 @@
 	andib	#0xe0,%d0		//clr all but tag
 	cmpib	#0x60,%d0		//check for nan
-	beqs	operr_nan	
+	beqs	operr_nan
 	cmpil	#0xffffff80,FPTEMP_LO(%a6) //test if ls lword is special
 	bnes	chkberr		//if not equal, check for incorrect operr
@@ -232,5 +232,5 @@
 	bclrb	#ainex_bit,FPSR_AEXCEPT(%a6)
 	fmovel	#0,%FPSR
-	
+
 	tstw	FPTEMP_EX(%a6)	//check sign
 	blts	load_neg
@@ -283,5 +283,5 @@
 	rts
 //
-// Check the exponent for $c000 and the upper 32 bits of the 
+// Check the exponent for $c000 and the upper 32 bits of the
 // mantissa for $ffffffff.  If both are true, return d0 clr
 // and store the lower n bits of the least lword of FPTEMP
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_ovfl.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_ovfl.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_ovfl.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -11,5 +11,5 @@
 //	data register are too large to be represented in the
 //	destination format.
-//		
+//
 // Trap disabled results
 //
@@ -38,6 +38,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -76,5 +76,5 @@
 //
 	btstb	#ovfl_bit,FPCR_ENABLE(%a6)
-	beqs	ck_inex	
+	beqs	ck_inex
 //
 	btstb		#E3,E_BYTE(%a6)
@@ -123,5 +123,5 @@
 	unlk		%a6
 	bral		real_inex
-	
+
 ovfl_exit:
 	bclrb	#E3,E_BYTE(%a6)	//test and clear E3 bit
@@ -155,5 +155,5 @@
 ovf_adj:
 //
-// Have a0 point to the correct operand. 
+// Have a0 point to the correct operand.
 //
 	btstb	#E3,E_BYTE(%a6)	//test E3 bit
@@ -181,5 +181,5 @@
 	moveb	L_SCR1(%a6),FPSR_CC(%a6)
 	bral	store		//stores to memory or register
-	
+
 not_opc011:
 	bsrl	ovf_r_x2	//returns a0 pointing to result
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_snan.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_snan.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_snan.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -17,5 +17,5 @@
 //
 // For trap enabled the 040 does the following:
-// If the inst is move_out, then the results are the same as for trap 
+// If the inst is move_out, then the results are the same as for trap
 // disabled with the exception posted.  If the instruction is not move_
 // out, the dest. is not modified, and the exception is posted.
@@ -25,6 +25,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -142,5 +142,5 @@
 
 //
-// Move_out 
+// Move_out
 //
 move_out:
@@ -150,16 +150,16 @@
 	cmpil		#0,%d0		//check for long
 	beqs		sto_long	//branch if move_out long
-	
+
 	cmpil		#4,%d0		//check for word
 	beqs		sto_word	//branch if move_out word
-	
+
 	cmpil		#6,%d0		//check for byte
 	beqs		sto_byte	//branch if move_out byte
-	
+
 //
 // Not byte, word or long
 //
 	rts
-//	
+//
 // Get the 32 most significant bits of etemp mantissa
 //
@@ -170,5 +170,5 @@
 // Set signalling nan bit
 //
-	bsetl		#30,%d1			
+	bsetl		#30,%d1
 //
 // Store to the users destination address
@@ -176,5 +176,5 @@
 	tstl		%a0		//check if <ea> is 0
 	beqs		wrt_dn		//destination is a data register
-	
+
 	movel		%d1,-(%a7)	//move the snan onto the stack
 	movel		%a0,%a1		//load dest addr into a1
@@ -192,5 +192,5 @@
 // Set signalling nan bit
 //
-	bsetl		#30,%d1			
+	bsetl		#30,%d1
 //
 // Store to the users destination address
@@ -214,5 +214,5 @@
 // Set signalling nan bit
 //
-	bsetl		#30,%d1			
+	bsetl		#30,%d1
 //
 // Store to the users destination address
@@ -256,5 +256,5 @@
 //
 not_out:
-	movel		DTAG(%a6),%d0	
+	movel		DTAG(%a6),%d0
 	bfextu		%d0{#0:#3},%d0	//isolate dtag in lsbs
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_store.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_store.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_store.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -14,6 +14,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -57,5 +57,5 @@
 //	handlers restore fp0-fp3 from there.
 //
-	cmpb	#0x80,%d0		
+	cmpb	#0x80,%d0
 	bnes	not_fp0
 	fmovemx %fp0-%fp0,USER_FP0(%a6)
@@ -140,5 +140,5 @@
 	swap	%d0		//d0 now in upper word
 	lsll	#4,%d0		//d0 now in proper place for dbl prec exp
-	tstb	LOCAL_SGN(%a1)	
+	tstb	LOCAL_SGN(%a1)
 	beqs	get_mant	//if positive, go process mantissa
 	bsetl	#31,%d0		//if negative, put in sign information
@@ -211,5 +211,5 @@
 	swap	%d0		//put exp in upper word of d0
 	lsll	#7,%d0		//shift it into single exp bits
-	tstb	LOCAL_SGN(%a1)	
+	tstb	LOCAL_SGN(%a1)
 	beqs	get_sman	//if positive, continue
 	bsetl	#31,%d0		//if negative, put in sign first
@@ -243,5 +243,5 @@
 	bral	reg_dest	//size is X, rts in reg_dest will
 //				;return to caller of dest_sgl
-	
+
 dest_ext:
 	tstb	LOCAL_SGN(%a1)	//put back sign into exponent word
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_unfl.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_unfl.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_unfl.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -7,15 +7,15 @@
 //
 // Trap disabled results
-//	For 881/2 compatibility, sw must denormalize the intermediate 
-// result, then store the result.  Denormalization is accomplished 
-// by taking the intermediate result (which is always normalized) and 
-// shifting the mantissa right while incrementing the exponent until 
-// it is equal to the denormalized exponent for the destination 
-// format.  After denormalization, the result is rounded to the 
+//	For 881/2 compatibility, sw must denormalize the intermediate
+// result, then store the result.  Denormalization is accomplished
+// by taking the intermediate result (which is always normalized) and
+// shifting the mantissa right while incrementing the exponent until
+// it is equal to the denormalized exponent for the destination
+// format.  After denormalization, the result is rounded to the
 // destination format.
-//		
+//
 // Trap enabled results
-// 	All trap disabled code applies.	In addition the exceptional 
-// operand needs to made available to the user with a bias of $6000 
+// 	All trap disabled code applies.	In addition the exceptional
+// operand needs to made available to the user with a bias of $6000
 // added to the exponent.
 //
@@ -24,6 +24,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
@@ -94,5 +94,5 @@
 //
 // Inexact enabled and reported, and we must take an inexact exception
-//	
+//
 take_inex:
 	btstb		#E3,E_BYTE(%a6)
@@ -148,5 +148,5 @@
 //					;we need the RND_PREC in the
 //					;upper word for round
-	movew		#0,-(%a7)	
+	movew		#0,-(%a7)
 	movew		%d0,-(%a7)	//copy RND_PREC to stack
 //
@@ -202,5 +202,5 @@
 //
 //
-// Perform Round	
+// Perform Round
 //	Input:		a0 points to input operand
 //			d0{31:29} has guard, round, sticky
@@ -225,5 +225,5 @@
 	tstb		%d0
 	beqs		ext_opc011	//If extended, do not subtract
-// 				;If destination format is sgl/dbl, 
+// 				;If destination format is sgl/dbl,
 	tstb		LOCAL_HI(%a0)	//If rounded result is normal,don't
 //					;subtract
@@ -260,5 +260,5 @@
 
 //
-// Finish.  
+// Finish.
 //
 unf_done:
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_unimp.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_unimp.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_unimp.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -4,5 +4,5 @@
 //	x_unimp.sa 3.3 7/1/91
 //
-//	fpsp_unimp --- FPSP handler for unimplemented instruction	
+//	fpsp_unimp --- FPSP handler for unimplemented instruction
 //	exception.
 //
@@ -11,5 +11,5 @@
 // (See table 8-1 MC68030 User's Manual).
 //
-// 
+//
 // Note: An fsave for an unimplemented inst. will create a short
 // fsave stack.
@@ -25,6 +25,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
Index: c/src/lib/libcpu/m68k/m68040/fpsp/x_unsupp.S
===================================================================
--- c/src/lib/libcpu/m68k/m68040/fpsp/x_unsupp.S	(revision 06731d6b708cf302c6f846b2d7e5dec805a3c8b9)
+++ c/src/lib/libcpu/m68k/m68040/fpsp/x_unsupp.S	(revision 42e243eeef1dd20a5053dbe53ed9ef5eebd7d181)
@@ -6,10 +6,10 @@
 //	fpsp_unsupp --- FPSP handler for unsupported data type exception
 //
-// Trap vector #55	(See table 8-1 Mc68030 User's manual).	
+// Trap vector #55	(See table 8-1 Mc68030 User's manual).
 // Invoked when the user program encounters a data format (packed) that
 // hardware does not support or a data type (denormalized numbers or un-
 // normalized numbers).
-// Normalizes denorms and unnorms, unpacks packed numbers then stores 
-// them back into the machine to let the 040 finish the operation.  
+// Normalizes denorms and unnorms, unpacks packed numbers then stores
+// them back into the machine to let the 040 finish the operation.
 //
 // Unsupp calls two routines:
@@ -26,6 +26,6 @@
 //			All Rights Reserved
 //
-//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
-//	The copyright notice above does not evidence any  
+//	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
+//	The copyright notice above does not evidence any
 //	actual or intended publication of such source code.
 
