Changeset 41d2eaca in rtems
- Timestamp:
- 11/09/99 04:31:26 (24 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 27eb3ec
- Parents:
- a0af97d
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
doc/itron3.0/status.t
ra0af97d r41d2eaca 512 512 @item chg_iXX - Stub, Needs to be Fleshed Out 513 513 @item ref_iXX - Stub, Needs to be Fleshed Out 514 515 @item Notes: 516 @itemize @bullet 517 @item This quote from the ITRON specification needs to be thought about:@* 518 @*@i{"When an interrupt is invoked, the interrupt handler defined with 519 this system call is started directly by the 520 interrupt processing mechanism of the CPU hardware. Accordingly, code at the 521 beginning and end of an interrupt handler must save and restore any registers 522 used by the interrupt handler."}@*@* 523 Based on another comment, in the ret_int description, I think this means 524 that RTEMS will not support the TA_ASM style of interrupt handlers -- 525 only the TA_HLNG style.@*@* 526 @i{When TA_HLNG is specified, a high-level language environment setting 527 program (a high-level language support routine) is called before branching 528 to the inthdr address. The least significant bit (LSB) of the system 529 attribute bits is used for this specification.} 530 531 @item Specification allows special "interrupt-only" versions of system 532 calls named i???_??? (i.e. sig_sem and isig_sem). This does not seem 533 to be something that would be implemented with RTEMS. We could provide 534 macros mapping them onto the default versions if this is an issue. 535 536 @item How this operates versus the behavior of a true TRON chip is 537 up for discussion. 538 539 @item ret_wup is questionable in only high-level language ISRs. 540 541 @item dis_int and ena_int refer to a specific interrupt number. These 542 may require hooking back out to the BSP. 543 544 @item for chg_iXX and reg_iXX, the XX should be replaced with something 545 that is meaningful on a particular CPU. 546 @end itemize 547 514 548 @end itemize 515 549 … … 566 600 @item rel_blk - Stub, Needs to be Fleshed Out 567 601 @item ref_mpl - Stub, Needs to be Fleshed Out 602 603 @item Notes: 604 @itemize @bullet 605 @item Implement Using SuperCore Heap Handler 606 @item Similar to Region in Classic API with Blocking 607 @item FIFO or Priority Task Blocking 608 @item Specification Deliberately Open on Allocation Algorithm 609 @item Multiple Tasks Can be Unblocked by a single rel_blk 610 @end itemize 611 568 612 @end itemize 569 613 … … 620 664 @item rel_blf - Stub, Needs to be Fleshed Out 621 665 @item ref_mpf - Stub, Needs to be Fleshed Out 666 667 @item Notes: 668 @itemize @bullet 669 @item Implement Using SuperCore Chain Handler 670 @item Similar to Partition in Classic API with Blocking 671 @item FIFO or Priority Task Blocking 672 @item Specification Deliberately Open on Allocation Algorithm 673 @item Should add Blocking to Classic API Partition at Same Time 674 @end itemize 675 622 676 @end itemize 623 677 … … 676 730 @item ref_alm - Stub, Needs to be Fleshed Out 677 731 @item ret_tmr - Stub, Needs to be Fleshed Out 732 733 @item Notes: 734 @itemize @bullet 735 @item Need to Implement Time Conversion Routines 736 @item Epoch is January 1, 1985, 00:00:00 am (GMT). 737 @item Cyclic and Alarm Handlers may be TA_ASM or TA_HLNG. 738 @item Alarms may be Absolute or Relative Time based. 739 @item May Want to Implement a Timer Server Task 740 @item Termination via ret_tmr is Not Consistent with Current RTEMS Timers. 741 @end itemize 742 678 743 @end itemize 679 744 … … 728 793 @item def_svc - Stub, Needs to be Fleshed Out 729 794 @item def_exc - Stub, Needs to be Fleshed Out 795 796 @item Notes: 797 @itemize @bullet 798 @item May Have to Obtain ITRON "OS Maker" Id 799 @item - def_svc seems to imply a trap handler interface 800 @item - def_exc needs to be examined. 801 @end itemize 802 730 803 @end itemize 731 804 … … 779 852 @item nget_nod - Stub, Needs to be Fleshed Out 780 853 @item nget_ver - Stub, Needs to be Fleshed Out 854 855 @item Notes: 856 @itemize @bullet 857 @item None of these are difficult to implement on top of MPCI 858 @item MP Packet formats are well-defined. 859 @end itemize 860 781 861 @end itemize 782 862
Note: See TracChangeset
for help on using the changeset viewer.