Changeset 40ae1fd in rtems


Ignore:
Timestamp:
08/09/11 10:28:09 (11 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
3ee5a2e
Parents:
2a514e80
Message:

2011-08-09 Sebastian Huber <sebastian.huber@…>

  • cpu_asm.S, rtems/score/cpu.h: There is no need to save the global pointer (gp) in the thread register context since it is a system wide constant and set-up with the C runtime environment.
Location:
cpukit/score/cpu/nios2
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/nios2/ChangeLog

    r2a514e80 r40ae1fd  
     12011-08-09      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * cpu_asm.S, rtems/score/cpu.h: There is no need to save the global
     4        pointer (gp) in the thread register context since it is a system wide
     5        constant and set-up with the C runtime environment.
     6
    172011-07-24      Joel Sherrill <joel.sherrill@oarcorp.com>
    28
  • cpukit/score/cpu/nios2/cpu_asm.S

    r2a514e80 r40ae1fd  
    4747    stw r22, 24(r4)
    4848    stw r23, 28(r4)
    49     stw gp,  32(r4)
    50     stw fp,  36(r4)
    51     stw sp,  40(r4)
    52     stw ra,  44(r4)
     49    stw fp,  32(r4)
     50    stw sp,  36(r4)
     51    stw ra,  40(r4)
    5352    /* r6 saved status */
    54     stw r6,  48(r4)
     53    stw r6,  44(r4)
    5554
    5655_CPU_Context_switch_restore:
     
    6463    ldw r22, 24(r5)
    6564    ldw r23, 28(r5)
    66     ldw gp,  32(r5)
    67     ldw fp,  36(r5)
    68     ldw sp,  40(r5)
     65    ldw fp,  32(r5)
     66    ldw sp,  36(r5)
    6967
    7068    /* Disable interrupts */
    7169    wrctl status, r0
    7270
    73     ldw ea,  44(r5)
    74     ldw at,  48(r5)
     71    ldw ea,  40(r5)
     72    ldw at,  44(r5)
    7573    /* FIXME: Always have interrupts enabled when we return from Context_switch */
    7674    ori at, at, 1
  • cpukit/score/cpu/nios2/rtems/score/cpu.h

    r2a514e80 r40ae1fd  
    454454
    455455/**
    456  *  @ingroup CPUContext Management
    457  *  This defines the minimal set of integer and processor state registers
    458  *  that must be saved during a voluntary context switch from one thread
    459  *  to another.
     456 * @brief Thread register context.
     457 *
     458 * The thread register context covers the non-volatile registers, the thread
     459 * stack pointer, the return address, and the processor status.
     460 *
     461 * There is no need to save the global pointer (gp) since it is a system wide
     462 * constant and set-up with the C runtime environment.
    460463 */
    461464typedef struct {
    462     uint32_t r16;
    463     uint32_t r17;
    464     uint32_t r18;
    465     uint32_t r19;
    466     uint32_t r20;
    467     uint32_t r21;
    468     uint32_t r22;
    469     uint32_t r23;
    470     uint32_t gp;
    471     uint32_t fp;
    472     uint32_t sp;
    473     uint32_t ra;
    474     uint32_t status;
    475     /* ienable? */
    476     /* ipending? */
     465  uint32_t r16;
     466  uint32_t r17;
     467  uint32_t r18;
     468  uint32_t r19;
     469  uint32_t r20;
     470  uint32_t r21;
     471  uint32_t r22;
     472  uint32_t r23;
     473  uint32_t fp;
     474  uint32_t sp;
     475  uint32_t ra;
     476  uint32_t status;
    477477} Context_Control;
    478478
     
    867867                                 _isr, _entry_point, _is_fp ) \
    868868   do { \
    869      extern char _gp[]; \
    870869     uint32_t _stack = (uint32_t)(_stack_base) + (_size) - 4; \
    871      (_the_context)->gp = (void *)_gp; \
    872870     (_the_context)->fp = (void *)_stack; \
    873871     (_the_context)->sp = (void *)_stack; \
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