Changeset 3f6b1ba in rtems


Ignore:
Timestamp:
Aug 20, 1998, 10:37:47 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
fd808ba
Parents:
1e291bb
Message:

Made the description of timeing generation more accurate.

Location:
doc/supplements/powerpc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • doc/supplements/powerpc/timeDMV177.t

    r1e291bb r3f6b1ba  
    6161
    6262All times reported in this chapter were measured using a RTEMS_BSP board.
     63All data and code caching was disabled.  This results in very deterministic
     64times which represent the worst possible performance.  Many embedded
     65applications disable caching to insure that execution times are
     66repeatable.  Moreover, the JTAG port on certain revisions of the PowerPC
     67603e does not operate properly if caching is enabled.  Thus during
     68development and debug, caching must be off.
    6369
    6470The PowerPC decrementer register was was used to gather
     
    6672this register typically counts
    6773something like CPU cycles or is a function of the clock
    68 speed.  On the PPC603e decrements based on bus cycles.
    69 This is a very accurate number and given the high clock
    70 speed of the PowerPC family, Thus all measurements in this
     74speed.  On the PPC603e decrements once for every four (4) bus cycles.
     75On the RTEMS_BSP, the bus operates at a clock speed of
     7633 Mhz.  This result in a very accurate number since it is a function of the
     77microprocessor itself.  Thus all measurements in this
    7178chapter are reported as the actual number of decrementer
    72 clicks reported.  All sources of hardware interrupts were disabled,
     79clicks reported. 
     80
     81To convert the numbers reported to microseconds, one should
     82divide the number reported by 8.650752.  This number was derived as
     83shown below:
     84
     85@example
     86((33 * 1048576) / 1000000) / 4 = 8.650752
     87@end example
     88
     89All sources of hardware interrupts were disabled,
    7390although traps were enabled and the interrupt level of the
    7491PowerPC allows all interrupts.
  • doc/supplements/powerpc/timedatadmv177.t

    r1e291bb r3f6b1ba  
    6161
    6262All times reported in this chapter were measured using a RTEMS_BSP board.
     63All data and code caching was disabled.  This results in very deterministic
     64times which represent the worst possible performance.  Many embedded
     65applications disable caching to insure that execution times are
     66repeatable.  Moreover, the JTAG port on certain revisions of the PowerPC
     67603e does not operate properly if caching is enabled.  Thus during
     68development and debug, caching must be off.
    6369
    6470The PowerPC decrementer register was was used to gather
     
    6672this register typically counts
    6773something like CPU cycles or is a function of the clock
    68 speed.  On the PPC603e decrements based on bus cycles.
    69 This is a very accurate number and given the high clock
    70 speed of the PowerPC family, Thus all measurements in this
     74speed.  On the PPC603e decrements once for every four (4) bus cycles.
     75On the RTEMS_BSP, the bus operates at a clock speed of
     7633 Mhz.  This result in a very accurate number since it is a function of the
     77microprocessor itself.  Thus all measurements in this
    7178chapter are reported as the actual number of decrementer
    72 clicks reported.  All sources of hardware interrupts were disabled,
     79clicks reported. 
     80
     81To convert the numbers reported to microseconds, one should
     82divide the number reported by 8.650752.  This number was derived as
     83shown below:
     84
     85@example
     86((33 * 1048576) / 1000000) / 4 = 8.650752
     87@end example
     88
     89All sources of hardware interrupts were disabled,
    7390although traps were enabled and the interrupt level of the
    7491PowerPC allows all interrupts.
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