- Timestamp:
- 03/04/11 16:03:46 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 8179916
- Parents:
- c0640a2
- Location:
- c/src/lib/libbsp/m68k/uC5282
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/m68k/uC5282/ChangeLog
rc0640a2 r3f60fb4f 1 2011-03-04 Till Straumann <strauman@slac.stanford.edu> 2 3 PR 1738/bsps 4 * clock/clock.c, include/bsp.h, network/network.c: system clock driver 5 programs the PIT w/o assuming the CPU clock frequency being a power 6 of two. 7 1 8 2011-02-17 Till Straumann <strauman@slac.stanford.edu> 2 9 -
c/src/lib/libbsp/m68k/uC5282/clock/clock.c
rc0640a2 r3f60fb4f 27 27 * Place in static RAM so updates don't hit the SDRAM 28 28 */ 29 extern int __SRAMBASE[]; 30 #define IDLE_COUNTER __SRAMBASE[0]31 #define FILTERED_IDLE __SRAMBASE[1]32 #define MAX_IDLE_COUNT __SRAMBASE[2]33 #define USEC_PER_TICK __SRAMBASE[3]29 #define IDLE_COUNTER __SRAMBASE.idle_counter 30 #define FILTERED_IDLE __SRAMBASE.filtered_idle 31 #define MAX_IDLE_COUNT __SRAMBASE.max_idle_count 32 #define PITC_PER_TICK __SRAMBASE.pitc_per_tick 33 #define NSEC_PER_PITC __SRAMBASE.nsec_per_pitc 34 34 #define FILTER_SHIFT 6 35 35 … … 38 38 int i = MCF5282_PIT3_PCNTR; 39 39 if (MCF5282_PIT3_PCSR & MCF5282_PIT_PCSR_PIF) 40 i = MCF5282_PIT3_PCNTR - USEC_PER_TICK;41 return ( USEC_PER_TICK - i) * 1000;40 i = MCF5282_PIT3_PCNTR - PITC_PER_TICK; 41 return (PITC_PER_TICK - i) * NSEC_PER_PITC; 42 42 } 43 43 … … 49 49 #define Clock_driver_support_at_tick() \ 50 50 do { \ 51 int idle = IDLE_COUNTER;\51 unsigned idle = IDLE_COUNTER; \ 52 52 IDLE_COUNTER = 0; \ 53 53 if (idle > MAX_IDLE_COUNT) \ … … 76 76 * Set up the clock hardware 77 77 * 78 * Prescale so that it counts in microseconds 79 * System clock frequency better be 2**n (1<=n<=16) MHz! 78 * f_pit = f_clk / 2^(preScaleCode+1) / N = 1/(us_per_tick/us_per_s) 79 * 80 * N = f_clk / 2^(preScaleCode+1) * us_per_tick / us_per_s 81 * 82 * ns_per_pit_clk = ns_per_s / (f_clk / 2^(preScaleCode+1)) 83 * = ns_per_s * 2^(preScaleCode+1) / f_clk; 80 84 */ 81 85 #define Clock_driver_support_initialize_hardware() \ 82 86 do { \ 87 unsigned long long N; \ 83 88 int level; \ 84 int preScaleCode = -2; \ 85 int preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000; \ 86 while (preScaleDivisor) { \ 87 preScaleDivisor >>= 1; \ 88 preScaleCode++; \ 89 } \ 90 IDLE_COUNTER = 0; \ 91 FILTERED_IDLE = 0; \ 89 int preScaleCode = 0; \ 90 N = bsp_get_CPU_clock_speed(); \ 91 N *= rtems_configuration_get_microseconds_per_tick(); \ 92 N /= 2*1000000; /* min_prescale * us_per_s */ \ 93 while ( N > 0x10000 ) { \ 94 preScaleCode++; \ 95 N >>= 1; \ 96 } \ 97 PITC_PER_TICK = N; \ 98 N = 2000000000ULL << preScaleCode; \ 99 N /= bsp_get_CPU_clock_speed(); \ 100 NSEC_PER_PITC = N; \ 101 IDLE_COUNTER = 0; \ 102 FILTERED_IDLE = 0; \ 92 103 MAX_IDLE_COUNT = 0; \ 93 104 bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY); \ … … 102 113 MCF5282_PIT_PCSR_PIE | \ 103 114 MCF5282_PIT_PCSR_RLD; \ 104 USEC_PER_TICK = rtems_configuration_get_microseconds_per_tick(); \ 105 MCF5282_PIT3_PMR = USEC_PER_TICK - 1; \ 115 MCF5282_PIT3_PMR = PITC_PER_TICK - 1; \ 106 116 MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \ 107 117 MCF5282_PIT_PCSR_PIE | \ … … 115 125 Thread bsp_idle_thread(uint32_t ignored) 116 126 { 117 for(;;) 118 __asm__ volatile ("addq.l #1,__SRAMBASE"); /* Atomic increment */ 127 /* Atomic increment */ 128 for(;;) 129 __asm__ volatile ("addq.l #1,%0"::"m"(IDLE_COUNTER)); 119 130 } 120 131 -
c/src/lib/libbsp/m68k/uC5282/include/bsp.h
rc0640a2 r3f60fb4f 135 135 #define BSP_IDLE_TASK_BODY bsp_idle_thread 136 136 137 /* 138 * SRAM. The BSP uses SRAM for maintaining some clock-driver data 139 * and for ethernet descriptors (and the initial stack during 140 * early boot). 141 */ 142 143 typedef struct mcf5282BufferDescriptor_ { 144 volatile uint16_t status; 145 uint16_t length; 146 volatile void *buffer; 147 } mcf5282BufferDescriptor_t; 148 149 extern struct { 150 uint32_t idle_counter; 151 uint32_t filtered_idle; 152 uint32_t max_idle_count; 153 uint32_t pitc_per_tick; 154 uint32_t nsec_per_pitc; 155 uint32_t pad[3]; /* align to 16-bytes for descriptors */ 156 mcf5282BufferDescriptor_t fec_descriptors[]; 157 /* buffer descriptors are allocated from here */ 158 159 /* initial stack is at top of SRAM (start.S) */ 160 } __SRAMBASE; 161 137 162 #ifdef __cplusplus 138 163 } -
c/src/lib/libbsp/m68k/uC5282/network/network.c
rc0640a2 r3f60fb4f 81 81 #error "Driver must have MCLBYTES > RBUF_SIZE" 82 82 #endif 83 84 typedef struct mcf5282BufferDescriptor_ {85 volatile uint16_t status;86 uint16_t length;87 volatile void *buffer;88 } mcf5282BufferDescriptor_t;89 83 90 84 /* … … 198 192 * Allow some space at the beginning for other diagnostic counters 199 193 */ 200 extern char __SRAMBASE[];201 194 static mcf5282BufferDescriptor_t * 202 195 mcf5282_bd_allocate(unsigned int count) 203 196 { 204 static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)(__SRAMBASE+16);197 static mcf5282BufferDescriptor_t *bdp = __SRAMBASE.fec_descriptors; 205 198 mcf5282BufferDescriptor_t *p = bdp; 206 199
Note: See TracChangeset
for help on using the changeset viewer.