Changeset 3bfb6ef in rtems


Ignore:
Timestamp:
May 10, 2005, 6:24:35 PM (16 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
34e458a3
Parents:
cc21289
Message:

2005-05-10 Jennifer Averett <jennifer.averett@…>

  • network/GT64260eth.c: Fixed warning.
  • pci/pci.c, pci/pci.h: Modified to depend upon rtems/pci.h
Location:
c/src/lib/libbsp/powerpc/mvme5500
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mvme5500/ChangeLog

    rcc21289 r3bfb6ef  
     12005-05-10      Jennifer Averett <jennifer.averett@oarcorp.com>
     2
     3        * network/GT64260eth.c: Fixed warning.
     4        *  pci/pci.c, pci/pci.h: Modified to depend upon rtems/pci.h
     5
    162005-05-04      Jennifer Averett <jennifer.averett@oarcorp.com>
    27
  • c/src/lib/libbsp/powerpc/mvme5500/network/GT64260eth.c

    rcc21289 r3bfb6ef  
    127127#define ET_MINLEN 64            /* minimum message length */
    128128
    129 static int GTeth_ifioctl(struct ifnet *ifp, int cmd, caddr_t data);
     129static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
    130130static void GTeth_ifstart (struct ifnet *);
    131131static void GTeth_ifchange(struct GTeth_softc *sc);
     
    542542}
    543543
    544 static int GTeth_ifioctl(struct ifnet *ifp, int cmd, caddr_t data)
     544static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
    545545{
    546546  struct GTeth_softc *sc = ifp->if_softc;
  • c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c

    rcc21289 r3bfb6ef  
    127127}
    128128
    129 /* backwards compatible with other PPC board for the vmeUniverse.c */
    130 int pci_read_config_byte(unchar bus, unchar dev,unchar func,unchar offset,
     129/* backwards compatible with other PPC board for the vmeUniverse.c
     130 * Note: We must override the default with these in pci.h
     131 */
     132int pci_bsp_read_config_byte(unchar bus, unchar dev,unchar func,unchar offset,
    131133unchar *val)
    132134{
     
    134136}
    135137
    136 int pci_read_config_word(unchar bus, unchar dev,
     138int pci_bsp_read_config_word(unchar bus, unchar dev,
    137139unchar func, unchar offset, unsigned short *val)
    138140{
     
    140142}
    141143
    142 int pci_read_config_dword(unchar bus, unchar dev,
     144int pci_bsp_read_config_dword(unchar bus, unchar dev,
    143145unchar func, unchar offset, unsigned int *val)
    144146{
     
    146148}
    147149
    148 int pci_write_config_byte(unchar bus, unchar dev,
     150int pci_bsp_write_config_byte(unchar bus, unchar dev,
    149151unchar func, unchar offset, unchar val)
    150152{
     
    152154}
    153155
    154 int pci_write_config_word(unchar bus, unchar dev,
     156int pci_bsp_write_config_word(unchar bus, unchar dev,
    155157unchar func, unchar offset, unsigned short val)
    156158{
     
    158160}
    159161
    160 int pci_write_config_dword(unchar bus,unchar dev,
     162int pci_bsp_write_config_dword(unchar bus,unchar dev,
    161163unchar func, unchar offset, unsigned int val)
    162164{
     
    165167
    166168
    167 pci_config BSP_pci_config[2] = {
     169pci_bsp_config BSP_pci_config[2] = {
    168170  {PCI0_CONFIG_ADDR,PCI0_CONFIG_DATA/*,&pci_functions*/},
    169171       {PCI1_CONFIG_ADDR,PCI1_CONFIG_DATA/*,&pci_functions*/}
     
    173175 * This routine determines the maximum bus number in the system
    174176 */
    175 void pci_initialize()
     177int pci_initialize()
    176178{
    177179  int PciNumber;
     
    369371    }
    370372  } /* PCI number */
     373
     374  return PCIB_ERR_SUCCESS;
    371375}
    372376
  • c/src/lib/libbsp/powerpc/mvme5500/pci/pci.h

    rcc21289 r3bfb6ef  
    2020 */
    2121
    22 #ifndef RTEMS_PCI_H
    23 #define RTEMS_PCI_H
     22#ifndef BSP_PCI_H
     23#define BSP_PCI_H
    2424
    25 /*
    26  * Under PCI0, each device has 256 bytes of configuration address space,
    27  * of which the first 64 bytes are standardized as follows:
    28  */
    29 #define PCI0_VENDOR_ID          0x00    /* 16 bits */
    30 #define PCI0_DEVICE_ID          0x02    /* 16 bits */
    31 #define PCI0_COMMAND            0x04    /* 16 bits */
    32 #define  PCI_COMMAND_IO         0x1     /* Enable response in I/O space */
    33 #define  PCI_COMMAND_MEMORY     0x2     /* Enable response in Memory space */
    34 #define  PCI_COMMAND_MASTER     0x4     /* Enable bus mastering */
    35 #define  PCI_COMMAND_SPECIAL    0x8     /* Enable response to special cycles */
    36 #define  PCI_COMMAND_INVALIDATE 0x10    /* Use memory write and invalidate */
    37 #define  PCI_COMMAND_VGA_PALETTE 0x20   /* Enable palette snooping */
    38 #define  PCI_COMMAND_PARITY     0x40    /* Enable parity checking */
    39 #define  PCI_COMMAND_WAIT       0x80    /* Enable address/data stepping */
    40 #define  PCI_COMMAND_SERR       0x100   /* Enable SERR */
    41 #define  PCI_COMMAND_FAST_BACK  0x200   /* Enable back-to-back writes */
     25#include <rtems/pci.h>
     26
     27#define PCI0_VENDOR_ID          0x00    /* 16 bits */
     28#define PCI0_DEVICE_ID          0x02    /* 16 bits */
     29#define PCI0_COMMAND            0x04    /* 16 bits */
     30
    4231#define  PCI_COMMAND_SB_DIS     0x2000  /* PCI configuration read will stop
    4332                                         * acting as sync barrier transaction
    4433                                         */
    45 #define PCI0_STATUS             0x06    /* 16 bits */
    46 #define  PCI_STATUS_66MHZ       0x20    /* Support 66 Mhz PCI 2.1 bus */
    47 #define  PCI_STATUS_UDF         0x40    /* Support User Definable Features */
    48 
    49 #define  PCI_STATUS_FAST_BACK   0x80    /* Accept fast-back to back */
    50 #define  PCI_STATUS_PARITY      0x100   /* Detected parity error */
    51 #define  PCI_STATUS_DEVSEL_MASK 0x600   /* DEVSEL timing */
    52 #define  PCI_STATUS_DEVSEL_FAST 0x000   
    53 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
    54 #define  PCI_STATUS_DEVSEL_SLOW 0x400
    55 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
    56 #define  PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
    57 #define  PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
    58 #define  PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
    59 #define  PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
    6034#define  PCI_STATUS_CLRERR_MASK 0xf9000000 /* <SKF> */
    6135 
     
    6943#define PCI0_LATENCY_TIMER      0x0d    /* 8 bits */
    7044#define PCI0_HEADER_TYPE        0x0e    /* 8 bits */
    71 #define  PCI_HEADER_TYPE_NORMAL 0
    72 #define  PCI_HEADER_TYPE_BRIDGE 1
    73 #define  PCI_HEADER_TYPE_CARDBUS 2
    74 
    75 #define PCI0_BIST               0x0f    /* 8 bits */
    76 #define PCI_BIST_CODE_MASK      0x0f    /* Return result */
    77 #define PCI_BIST_START          0x40    /* 1 to start BIST, 2 secs or less */
    78 #define PCI_BIST_CAPABLE        0x80    /* 1 if BIST capable */
    79 
    80 /*
    81  * Base addresses specify locations in memory or I/O space.
    82  * Decoded size can be determined by writing a value of
    83  * 0xffffffff to the register, and reading it back.  Only
    84  * 1 bits are decoded.
    85  */
    86 #define PCI0_BASE_ADDRESS_0     0x10    /* 32 bits */
    87 #define PCI0_BASE_ADDRESS_1     0x14    /* 32 bits [htype 0,1 only] */
    88 #define PCI0_BASE_ADDRESS_2     0x18    /* 32 bits [htype 0 only] */
    89 #define PCI0_BASE_ADDRESS_3     0x1c    /* 32 bits */
    90 #define PCI0_MEM_BASE_ADDR      0x20    /* 32 bits */
    91 #define PCI0_IO_BASE_ADDR       0x24    /* 32 bits */
    92 #define  PCI_BASE_ADDRESS_SPACE 0x01    /* 0 = memory, 1 = I/O */
    93 #define  PCI_BASE_ADDRESS_SPACE_IO 0x01
    94 #define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
    95 #define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
    96 #define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00    /* 32 bit address */
    97 #define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02    /* Below 1M */
    98 #define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04    /* 64 bit address */
    99 #define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08    /* prefetchable? */
    100 #define  PCI_BASE_ADDRESS_MEM_MASK      (~0x0fUL)
    101 #define  PCI_BASE_ADDRESS_IO_MASK       (~0x03UL)
    102 /* bit 1 is reserved if address_space = 1 */
    103 
    104 /* Header type 0 (normal devices) */
    105 #define PCI0_CARDBUS_CIS                0x28
    106 #define PCI0_SUBSYSTEM_VENDOR_ID        0x2c
    107 #define PCI0_SUBSYSTEM_ID               0x2e 
    108 #define PCI0_ROM_ADDRESS                0x30    /* Bits 31..11 are address, 10..1 reserved */
    109 #define  PCI_ROM_ADDRESS_ENABLE 0x01
    110 #define PCI_ROM_ADDRESS_MASK    (~0x7ffUL)
    11145
    11246#define PCI0_CAPABILITY_LIST_POINTER    0x34
     
    15791#define PCI1_MAX_LAT            0xbf    /* 8 bits */
    15892
    159 /* Header type 1 (PCI-to-PCI bridges) */
    160 #define PCI_PRIMARY_BUS         0x18    /* Primary bus number */
    161 #define PCI_SECONDARY_BUS       0x19    /* Secondary bus number */
    162 #define PCI_SUBORDINATE_BUS     0x1a    /* Highest bus number behind the bridge */
    163 #define PCI_SEC_LATENCY_TIMER   0x1b    /* Latency timer for secondary interface */
    164 #define PCI_IO_BASE             0x1c    /* I/O range behind the bridge */
    165 #define PCI_IO_LIMIT            0x1d
    166 #define  PCI_IO_RANGE_TYPE_MASK 0x0f    /* I/O bridging type */
    167 #define  PCI_IO_RANGE_TYPE_16   0x00
    168 #define  PCI_IO_RANGE_TYPE_32   0x01
    169 #define  PCI_IO_RANGE_MASK      ~0x0f
    170 #define PCI_SEC_STATUS          0x1e    /* Secondary status register, only bit 14 used */
    171 #define PCI_MEMORY_BASE         0x20    /* Memory range behind */
    172 #define PCI_MEMORY_LIMIT        0x22
    173 #define  PCI_MEMORY_RANGE_TYPE_MASK 0x0f
    174 #define  PCI_MEMORY_RANGE_MASK  ~0x0f
    175 #define PCI_PREF_MEMORY_BASE    0x24    /* Prefetchable memory range behind */
    176 #define PCI_PREF_MEMORY_LIMIT   0x26
    177 #define  PCI_PREF_RANGE_TYPE_MASK 0x0f
    178 #define  PCI_PREF_RANGE_TYPE_32 0x00
    179 #define  PCI_PREF_RANGE_TYPE_64 0x01
    180 #define  PCI_PREF_RANGE_MASK    ~0x0f
    181 #define PCI_PREF_BASE_UPPER32   0x28    /* Upper half of prefetchable memory range */
    182 #define PCI_PREF_LIMIT_UPPER32  0x2c
    183 #define PCI_IO_BASE_UPPER16     0x30    /* Upper half of I/O addresses */
    184 #define PCI_IO_LIMIT_UPPER16    0x32
    185 /* 0x34-0x3b is reserved */
    186 #define PCI_ROM_ADDRESS1        0x38    /* Same as PCI_ROM_ADDRESS, but for htype 1 */
    187 /* 0x3c-0x3d are same as for htype 0 */
    188 #define PCI_BRIDGE_CONTROL      0x3e
    189 #define  PCI_BRIDGE_CTL_PARITY  0x01    /* Enable parity detection on secondary interface */
    190 #define  PCI_BRIDGE_CTL_SERR    0x02    /* The same for SERR forwarding */
    191 #define  PCI_BRIDGE_CTL_NO_ISA  0x04    /* Disable bridging of ISA ports */
    192 #define  PCI_BRIDGE_CTL_VGA     0x08    /* Forward VGA addresses */
    193 #define  PCI_BRIDGE_CTL_MASTER_ABORT 0x20  /* Report master aborts */
    194 #define  PCI_BRIDGE_CTL_BUS_RESET 0x40  /* Secondary bus reset */
    195 #define  PCI_BRIDGE_CTL_FAST_BACK 0x80  /* Fast Back2Back enabled on secondary interface */
    196 
    197 /* Header type 2 (CardBus bridges) */
    198 /* 0x14-0x15 reserved */
    199 #define PCI_CB_SEC_STATUS       0x16    /* Secondary status */
    200 #define PCI_CB_PRIMARY_BUS      0x18    /* PCI bus number */
    201 #define PCI_CB_CARD_BUS         0x19    /* CardBus bus number */
    202 #define PCI_CB_SUBORDINATE_BUS  0x1a    /* Subordinate bus number */
    203 #define PCI_CB_LATENCY_TIMER    0x1b    /* CardBus latency timer */
    204 #define PCI_CB_MEMORY_BASE_0    0x1c
    205 #define PCI_CB_MEMORY_LIMIT_0   0x20
    206 #define PCI_CB_MEMORY_BASE_1    0x24
    207 #define PCI_CB_MEMORY_LIMIT_1   0x28
    208 #define PCI_CB_IO_BASE_0        0x2c
    209 #define PCI_CB_IO_BASE_0_HI     0x2e
    210 #define PCI_CB_IO_LIMIT_0       0x30
    211 #define PCI_CB_IO_LIMIT_0_HI    0x32
    212 #define PCI_CB_IO_BASE_1        0x34
    213 #define PCI_CB_IO_BASE_1_HI     0x36
    214 #define PCI_CB_IO_LIMIT_1       0x38
    215 #define PCI_CB_IO_LIMIT_1_HI    0x3a
    216 #define  PCI_CB_IO_RANGE_MASK   ~0x03
    217 /* 0x3c-0x3d are same as for htype 0 */
    218 #define PCI_CB_BRIDGE_CONTROL   0x3e
    219 #define  PCI_CB_BRIDGE_CTL_PARITY       0x01    /* Similar to standard bridge control register */
    220 #define  PCI_CB_BRIDGE_CTL_SERR         0x02
    221 #define  PCI_CB_BRIDGE_CTL_ISA          0x04
    222 #define  PCI_CB_BRIDGE_CTL_VGA          0x08
    223 #define  PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
    224 #define  PCI_CB_BRIDGE_CTL_CB_RESET     0x40    /* CardBus reset */
    225 #define  PCI_CB_BRIDGE_CTL_16BIT_INT    0x80    /* Enable interrupt for 16-bit cards */
    226 #define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100  /* Prefetch enable for both memory regions */
    227 #define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
    228 #define  PCI_CB_BRIDGE_CTL_POST_WRITES  0x400
    229 #define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
    230 #define PCI_CB_SUBSYSTEM_ID     0x42
    231 #define PCI_CB_LEGACY_MODE_BASE 0x44    /* 16-bit PC Card legacy mode base address (ExCa) */
    232 /* 0x48-0x7f reserved */
    233 
    23493/* Device classes and subclasses */
    23594#define PCI_CLASS_GT6426xAB             0x0580    /* <SKF> */
    23695             
    237 #define PCI_CLASS_NOT_DEFINED           0x0000
    238 #define PCI_CLASS_NOT_DEFINED_VGA       0x0001
    239 
    240 #define PCI_BASE_CLASS_STORAGE          0x01
    241 #define PCI_CLASS_STORAGE_SCSI          0x0100
    242 #define PCI_CLASS_STORAGE_IDE           0x0101
    243 #define PCI_CLASS_STORAGE_FLOPPY        0x0102
    244 #define PCI_CLASS_STORAGE_IPI           0x0103
    245 #define PCI_CLASS_STORAGE_RAID          0x0104
    246 #define PCI_CLASS_STORAGE_OTHER         0x0180
    247 
    248 #define PCI_BASE_CLASS_NETWORK          0x02
    249 #define PCI_CLASS_NETWORK_ETHERNET      0x0200
    250 #define PCI_CLASS_NETWORK_TOKEN_RING    0x0201
    251 #define PCI_CLASS_NETWORK_FDDI          0x0202
    252 #define PCI_CLASS_NETWORK_ATM           0x0203
    253 #define PCI_CLASS_NETWORK_OTHER         0x0280
    254 
    255 #define PCI_BASE_CLASS_DISPLAY          0x03
    256 #define PCI_CLASS_DISPLAY_VGA           0x0300
    257 #define PCI_CLASS_DISPLAY_XGA           0x0301
    258 #define PCI_CLASS_DISPLAY_OTHER         0x0380
    259 
    260 #define PCI_BASE_CLASS_MULTIMEDIA       0x04
    261 #define PCI_CLASS_MULTIMEDIA_VIDEO      0x0400
    262 #define PCI_CLASS_MULTIMEDIA_AUDIO      0x0401
    263 #define PCI_CLASS_MULTIMEDIA_OTHER      0x0480
    264 
    265 #define PCI_BASE_CLASS_MEMORY           0x05
    266 #define  PCI_CLASS_MEMORY_RAM           0x0500
    267 #define  PCI_CLASS_MEMORY_FLASH         0x0501
    268 #define  PCI_CLASS_MEMORY_OTHER         0x0580
    269 
    270 #define PCI_BASE_CLASS_BRIDGE           0x06
    271 #define  PCI_CLASS_BRIDGE_HOST          0x0600
    272 #define  PCI_CLASS_BRIDGE_ISA           0x0601
    273 #define  PCI_CLASS_BRIDGE_EISA          0x0602
    274 #define  PCI_CLASS_BRIDGE_MC            0x0603
    275 #define  PCI_CLASS_BRIDGE_PCI           0x0604
    276 #define  PCI_CLASS_BRIDGE_PCMCIA        0x0605
    277 #define  PCI_CLASS_BRIDGE_NUBUS         0x0606
    278 #define  PCI_CLASS_BRIDGE_CARDBUS       0x0607
    279 #define  PCI_CLASS_BRIDGE_OTHER         0x0680
    280 
    281 #define PCI_BASE_CLASS_COMMUNICATION    0x07
    282 #define PCI_CLASS_COMMUNICATION_SERIAL  0x0700
    283 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
    284 #define PCI_CLASS_COMMUNICATION_OTHER   0x0780
    285 
    286 #define PCI_BASE_CLASS_SYSTEM           0x08
    287 #define PCI_CLASS_SYSTEM_PIC            0x0800
    288 #define PCI_CLASS_SYSTEM_DMA            0x0801
    289 #define PCI_CLASS_SYSTEM_TIMER          0x0802
    290 #define PCI_CLASS_SYSTEM_RTC            0x0803
    291 #define PCI_CLASS_SYSTEM_OTHER          0x0880
    292 
    293 #define PCI_BASE_CLASS_INPUT            0x09
    294 #define PCI_CLASS_INPUT_KEYBOARD        0x0900
    295 #define PCI_CLASS_INPUT_PEN             0x0901
    296 #define PCI_CLASS_INPUT_MOUSE           0x0902
    297 #define PCI_CLASS_INPUT_OTHER           0x0980
    298 
    299 #define PCI_BASE_CLASS_DOCKING          0x0a
    300 #define PCI_CLASS_DOCKING_GENERIC       0x0a00
    301 #define PCI_CLASS_DOCKING_OTHER         0x0a01
    302 
    303 #define PCI_BASE_CLASS_PROCESSOR        0x0b
    304 #define PCI_CLASS_PROCESSOR_386         0x0b00
    305 #define PCI_CLASS_PROCESSOR_486         0x0b01
    306 #define PCI_CLASS_PROCESSOR_PENTIUM     0x0b02
    307 #define PCI_CLASS_PROCESSOR_ALPHA       0x0b10
    308 #define PCI_CLASS_PROCESSOR_POWERPC     0x0b20
    309 #define PCI_CLASS_PROCESSOR_CO          0x0b40
    310 
    311 #define PCI_BASE_CLASS_SERIAL           0x0c
    312 #define PCI_CLASS_SERIAL_FIREWIRE       0x0c00
    313 #define PCI_CLASS_SERIAL_ACCESS         0x0c01
    314 #define PCI_CLASS_SERIAL_SSA            0x0c02
    315 #define PCI_CLASS_SERIAL_USB            0x0c03
    316 #define PCI_CLASS_SERIAL_FIBER          0x0c04
    317 
    318 #define PCI_CLASS_OTHERS                0xff
    319 
    32096/*
    32197 * Vendor and card ID's: sort these numerically according to vendor
     
    332108#define PCI_DEVICE_ID_PLX2_PCI6154_HB2  0x26     /* <SKF> */
    333109
    334 #define PCI_VENDOR_ID_COMPAQ            0x0e11
    335 #define PCI_DEVICE_ID_COMPAQ_1280       0x3033
    336 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX    0x4000
    337 #define PCI_DEVICE_ID_COMPAQ_SMART2P    0xae10
    338 #define PCI_DEVICE_ID_COMPAQ_NETEL100   0xae32
    339 #define PCI_DEVICE_ID_COMPAQ_NETEL10    0xae34
    340 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I  0xae35
    341 #define PCI_DEVICE_ID_COMPAQ_NETEL100D  0xae40
    342 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43
    343 #define PCI_DEVICE_ID_COMPAQ_NETEL100I  0xb011
    344 #define PCI_DEVICE_ID_COMPAQ_THUNDER    0xf130
    345 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B  0xf150
    346 
    347 #define PCI_VENDOR_ID_NCR               0x1000
    348 #define PCI_DEVICE_ID_NCR_53C810        0x0001
    349 #define PCI_DEVICE_ID_NCR_53C820        0x0002
    350 #define PCI_DEVICE_ID_NCR_53C825        0x0003
    351 #define PCI_DEVICE_ID_NCR_53C815        0x0004
    352 #define PCI_DEVICE_ID_NCR_53C860        0x0006
    353 #define PCI_DEVICE_ID_NCR_53C896        0x000b
    354 #define PCI_DEVICE_ID_NCR_53C895        0x000c
    355 #define PCI_DEVICE_ID_NCR_53C885        0x000d
    356 #define PCI_DEVICE_ID_NCR_53C875        0x000f
    357 #define PCI_DEVICE_ID_NCR_53C875J       0x008f
    358 
    359 #define PCI_VENDOR_ID_ATI               0x1002
    360 #define PCI_DEVICE_ID_ATI_68800         0x4158
    361 #define PCI_DEVICE_ID_ATI_215CT222      0x4354
    362 #define PCI_DEVICE_ID_ATI_210888CX      0x4358
    363 #define PCI_DEVICE_ID_ATI_215GB         0x4742
    364 #define PCI_DEVICE_ID_ATI_215GD         0x4744
    365 #define PCI_DEVICE_ID_ATI_215GI         0x4749
    366 #define PCI_DEVICE_ID_ATI_215GP         0x4750
    367 #define PCI_DEVICE_ID_ATI_215GQ         0x4751
    368 #define PCI_DEVICE_ID_ATI_215GT         0x4754
    369 #define PCI_DEVICE_ID_ATI_215GTB        0x4755
    370 #define PCI_DEVICE_ID_ATI_210888GX      0x4758
    371 #define PCI_DEVICE_ID_ATI_215LG         0x4c47
    372 #define PCI_DEVICE_ID_ATI_264LT         0x4c54
    373 #define PCI_DEVICE_ID_ATI_264VT         0x5654
    374 
    375 #define PCI_VENDOR_ID_VLSI              0x1004
    376 #define PCI_DEVICE_ID_VLSI_82C592       0x0005
    377 #define PCI_DEVICE_ID_VLSI_82C593       0x0006
    378 #define PCI_DEVICE_ID_VLSI_82C594       0x0007
    379 #define PCI_DEVICE_ID_VLSI_82C597       0x0009
    380 #define PCI_DEVICE_ID_VLSI_82C541       0x000c
    381 #define PCI_DEVICE_ID_VLSI_82C543       0x000d
    382 #define PCI_DEVICE_ID_VLSI_82C532       0x0101
    383 #define PCI_DEVICE_ID_VLSI_82C534       0x0102
    384 #define PCI_DEVICE_ID_VLSI_82C535       0x0104
    385 #define PCI_DEVICE_ID_VLSI_82C147       0x0105
    386 #define PCI_DEVICE_ID_VLSI_VAS96011     0x0702
    387 
    388 #define PCI_VENDOR_ID_ADL               0x1005
    389 #define PCI_DEVICE_ID_ADL_2301          0x2301
    390 
    391 #define PCI_VENDOR_ID_NS                0x100b
    392 #define PCI_DEVICE_ID_NS_87415          0x0002
    393 #define PCI_DEVICE_ID_NS_87410          0xd001
    394 
    395 #define PCI_VENDOR_ID_TSENG             0x100c
    396 #define PCI_DEVICE_ID_TSENG_W32P_2      0x3202
    397 #define PCI_DEVICE_ID_TSENG_W32P_b      0x3205
    398 #define PCI_DEVICE_ID_TSENG_W32P_c      0x3206
    399 #define PCI_DEVICE_ID_TSENG_W32P_d      0x3207
    400 #define PCI_DEVICE_ID_TSENG_ET6000      0x3208
    401 
    402 #define PCI_VENDOR_ID_WEITEK            0x100e
    403 #define PCI_DEVICE_ID_WEITEK_P9000      0x9001
    404 #define PCI_DEVICE_ID_WEITEK_P9100      0x9100
    405 
    406 #define PCI_VENDOR_ID_DEC               0x1011
    407 #define PCI_DEVICE_ID_DEC_BRD           0x0001
    408 #define PCI_DEVICE_ID_DEC_TULIP         0x0002
    409 #define PCI_DEVICE_ID_DEC_TGA           0x0004
    410 #define PCI_DEVICE_ID_DEC_TULIP_FAST    0x0009
    411 #define PCI_DEVICE_ID_DEC_TGA2          0x000D
    412 #define PCI_DEVICE_ID_DEC_FDDI          0x000F
    413 #define PCI_DEVICE_ID_DEC_TULIP_PLUS    0x0014
    414 #define PCI_DEVICE_ID_DEC_21142         0x0019
    415 #define PCI_DEVICE_ID_DEC_21052         0x0021
    416 #define PCI_DEVICE_ID_DEC_21150         0x0022
    417 #define PCI_DEVICE_ID_DEC_21152         0x0024
    418 
    419 #define PCI_VENDOR_ID_CIRRUS            0x1013
    420 #define PCI_DEVICE_ID_CIRRUS_7548       0x0038
    421 #define PCI_DEVICE_ID_CIRRUS_5430       0x00a0
    422 #define PCI_DEVICE_ID_CIRRUS_5434_4     0x00a4
    423 #define PCI_DEVICE_ID_CIRRUS_5434_8     0x00a8
    424 #define PCI_DEVICE_ID_CIRRUS_5436       0x00ac
    425 #define PCI_DEVICE_ID_CIRRUS_5446       0x00b8
    426 #define PCI_DEVICE_ID_CIRRUS_5480       0x00bc
    427 #define PCI_DEVICE_ID_CIRRUS_5464       0x00d4
    428 #define PCI_DEVICE_ID_CIRRUS_5465       0x00d6
    429 #define PCI_DEVICE_ID_CIRRUS_6729       0x1100
    430 #define PCI_DEVICE_ID_CIRRUS_6832       0x1110
    431 #define PCI_DEVICE_ID_CIRRUS_7542       0x1200
    432 #define PCI_DEVICE_ID_CIRRUS_7543       0x1202
    433 #define PCI_DEVICE_ID_CIRRUS_7541       0x1204
    434 
    435 #define PCI_VENDOR_ID_IBM               0x1014
    436 #define PCI_DEVICE_ID_IBM_FIRE_CORAL    0x000a
    437 #define PCI_DEVICE_ID_IBM_TR            0x0018
    438 #define PCI_DEVICE_ID_IBM_82G2675       0x001d
    439 #define PCI_DEVICE_ID_IBM_MCA           0x0020
    440 #define PCI_DEVICE_ID_IBM_82351         0x0022
    441 #define PCI_DEVICE_ID_IBM_SERVERAID     0x002e
    442 #define PCI_DEVICE_ID_IBM_TR_WAKE       0x003e
    443 #define PCI_DEVICE_ID_IBM_MPIC          0x0046
    444 #define PCI_DEVICE_ID_IBM_3780IDSP      0x007d
    445 #define PCI_DEVICE_ID_IBM_MPIC_2        0xffff
    446 
    447 #define PCI_VENDOR_ID_WD                0x101c
    448 #define PCI_DEVICE_ID_WD_7197           0x3296
    449 
    450 #define PCI_VENDOR_ID_AMD               0x1022
    451 #define PCI_DEVICE_ID_AMD_LANCE         0x2000
    452 #define PCI_DEVICE_ID_AMD_SCSI          0x2020
    453 
    454 #define PCI_VENDOR_ID_TRIDENT           0x1023
    455 #define PCI_DEVICE_ID_TRIDENT_9397      0x9397
    456 #define PCI_DEVICE_ID_TRIDENT_9420      0x9420
    457 #define PCI_DEVICE_ID_TRIDENT_9440      0x9440
    458 #define PCI_DEVICE_ID_TRIDENT_9660      0x9660
    459 #define PCI_DEVICE_ID_TRIDENT_9750      0x9750
    460 
    461 #define PCI_VENDOR_ID_AI                0x1025
    462 #define PCI_DEVICE_ID_AI_M1435          0x1435
    463 
    464 #define PCI_VENDOR_ID_MATROX            0x102B
    465 #define PCI_DEVICE_ID_MATROX_MGA_2      0x0518
    466 #define PCI_DEVICE_ID_MATROX_MIL        0x0519
    467 #define PCI_DEVICE_ID_MATROX_MYS        0x051A
    468 #define PCI_DEVICE_ID_MATROX_MIL_2      0x051b
    469 #define PCI_DEVICE_ID_MATROX_MIL_2_AGP  0x051f
    470 #define PCI_DEVICE_ID_MATROX_MGA_IMP    0x0d10
    471 
    472 #define PCI_VENDOR_ID_CT                0x102c
    473 #define PCI_DEVICE_ID_CT_65545          0x00d8
    474 #define PCI_DEVICE_ID_CT_65548          0x00dc
    475 #define PCI_DEVICE_ID_CT_65550          0x00e0
    476 #define PCI_DEVICE_ID_CT_65554          0x00e4
    477 #define PCI_DEVICE_ID_CT_65555          0x00e5
    478 
    479 #define PCI_VENDOR_ID_MIRO              0x1031
    480 #define PCI_DEVICE_ID_MIRO_36050        0x5601
    481 
    482 #define PCI_VENDOR_ID_NEC               0x1033
    483 #define PCI_DEVICE_ID_NEC_PCX2          0x0046
    484 
    485 #define PCI_VENDOR_ID_FD                0x1036
    486 #define PCI_DEVICE_ID_FD_36C70          0x0000
    487 
    488 #define PCI_VENDOR_ID_SI                0x1039
    489 #define PCI_DEVICE_ID_SI_5591_AGP       0x0001
    490 #define PCI_DEVICE_ID_SI_6202           0x0002
    491 #define PCI_DEVICE_ID_SI_503            0x0008
    492 #define PCI_DEVICE_ID_SI_ACPI           0x0009
    493 #define PCI_DEVICE_ID_SI_5597_VGA       0x0200
    494 #define PCI_DEVICE_ID_SI_6205           0x0205
    495 #define PCI_DEVICE_ID_SI_501            0x0406
    496 #define PCI_DEVICE_ID_SI_496            0x0496
    497 #define PCI_DEVICE_ID_SI_601            0x0601
    498 #define PCI_DEVICE_ID_SI_5107           0x5107
    499 #define PCI_DEVICE_ID_SI_5511           0x5511
    500 #define PCI_DEVICE_ID_SI_5513           0x5513
    501 #define PCI_DEVICE_ID_SI_5571           0x5571
    502 #define PCI_DEVICE_ID_SI_5591           0x5591
    503 #define PCI_DEVICE_ID_SI_5597           0x5597
    504 #define PCI_DEVICE_ID_SI_7001           0x7001
    505 
    506 #define PCI_VENDOR_ID_HP                0x103c
    507 #define PCI_DEVICE_ID_HP_J2585A         0x1030
    508 #define PCI_DEVICE_ID_HP_J2585B         0x1031
    509 
    510 #define PCI_VENDOR_ID_PCTECH            0x1042
    511 #define PCI_DEVICE_ID_PCTECH_RZ1000     0x1000
    512 #define PCI_DEVICE_ID_PCTECH_RZ1001     0x1001
    513 #define PCI_DEVICE_ID_PCTECH_SAMURAI_0  0x3000
    514 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1  0x3010
    515 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
    516 
    517 #define PCI_VENDOR_ID_DPT               0x1044   
    518 #define PCI_DEVICE_ID_DPT               0xa400 
    519 
    520 #define PCI_VENDOR_ID_OPTI              0x1045
    521 #define PCI_DEVICE_ID_OPTI_92C178       0xc178
    522 #define PCI_DEVICE_ID_OPTI_82C557       0xc557
    523 #define PCI_DEVICE_ID_OPTI_82C558       0xc558
    524 #define PCI_DEVICE_ID_OPTI_82C621       0xc621
    525 #define PCI_DEVICE_ID_OPTI_82C700       0xc700
    526 #define PCI_DEVICE_ID_OPTI_82C701       0xc701
    527 #define PCI_DEVICE_ID_OPTI_82C814       0xc814
    528 #define PCI_DEVICE_ID_OPTI_82C822       0xc822
    529 #define PCI_DEVICE_ID_OPTI_82C825       0xd568
    530 
    531 #define PCI_VENDOR_ID_SGS               0x104a
    532 #define PCI_DEVICE_ID_SGS_2000          0x0008
    533 #define PCI_DEVICE_ID_SGS_1764          0x0009
    534 
    535 #define PCI_VENDOR_ID_BUSLOGIC                0x104B
    536 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
    537 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER    0x1040
    538 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT     0x8130
    539 
    540 #define PCI_VENDOR_ID_TI                0x104c
    541 #define PCI_DEVICE_ID_TI_TVP4010        0x3d04
    542 #define PCI_DEVICE_ID_TI_TVP4020        0x3d07
    543 #define PCI_DEVICE_ID_TI_PCI1130        0xac12
    544 #define PCI_DEVICE_ID_TI_PCI1031        0xac13
    545 #define PCI_DEVICE_ID_TI_PCI1131        0xac15
    546 #define PCI_DEVICE_ID_TI_PCI1250        0xac16
    547 #define PCI_DEVICE_ID_TI_PCI1220        0xac17
    548 
    549 #define PCI_VENDOR_ID_OAK               0x104e
    550 #define PCI_DEVICE_ID_OAK_OTI107        0x0107
    551 
    552 /* Winbond have two vendor IDs! See 0x10ad as well */
    553 #define PCI_VENDOR_ID_WINBOND2          0x1050
    554 #define PCI_DEVICE_ID_WINBOND2_89C940   0x0940
    555 
    556 #define PCI_VENDOR_ID_MOTOROLA          0x1057
    557 #define PCI_DEVICE_ID_MOTOROLA_MPC105   0x0001
    558 #define PCI_DEVICE_ID_MOTOROLA_MPC106   0x0002
    559 #define PCI_DEVICE_ID_MOTOROLA_RAVEN    0x4801
    560 
    561 #define PCI_VENDOR_ID_PROMISE           0x105a
    562 #define PCI_DEVICE_ID_PROMISE_20246     0x4d33
    563 #define PCI_DEVICE_ID_PROMISE_5300      0x5300
    564 
    565 #define PCI_VENDOR_ID_N9                0x105d
    566 #define PCI_DEVICE_ID_N9_I128           0x2309
    567 #define PCI_DEVICE_ID_N9_I128_2         0x2339
    568 #define PCI_DEVICE_ID_N9_I128_T2R       0x493d
    569 
    570 #define PCI_VENDOR_ID_UMC               0x1060
    571 #define PCI_DEVICE_ID_UMC_UM8673F       0x0101
    572 #define PCI_DEVICE_ID_UMC_UM8891A       0x0891
    573 #define PCI_DEVICE_ID_UMC_UM8886BF      0x673a
    574 #define PCI_DEVICE_ID_UMC_UM8886A       0x886a
    575 #define PCI_DEVICE_ID_UMC_UM8881F       0x8881
    576 #define PCI_DEVICE_ID_UMC_UM8886F       0x8886
    577 #define PCI_DEVICE_ID_UMC_UM9017F       0x9017
    578 #define PCI_DEVICE_ID_UMC_UM8886N       0xe886
    579 #define PCI_DEVICE_ID_UMC_UM8891N       0xe891
    580 
    581 #define PCI_VENDOR_ID_X                 0x1061
    582 #define PCI_DEVICE_ID_X_AGX016          0x0001
    583 
    584 #define PCI_VENDOR_ID_PICOP             0x1066
    585 #define PCI_DEVICE_ID_PICOP_PT86C52X    0x0001
    586 #define PCI_DEVICE_ID_PICOP_PT80C524    0x8002
    587 
    588 #define PCI_VENDOR_ID_APPLE             0x106b
    589 #define PCI_DEVICE_ID_APPLE_BANDIT      0x0001
    590 #define PCI_DEVICE_ID_APPLE_GC          0x0002
    591 #define PCI_DEVICE_ID_APPLE_HYDRA       0x000e
    592 
    593 #define PCI_VENDOR_ID_NEXGEN            0x1074
    594 #define PCI_DEVICE_ID_NEXGEN_82C501     0x4e78
    595 
    596 #define PCI_VENDOR_ID_QLOGIC            0x1077
    597 #define PCI_DEVICE_ID_QLOGIC_ISP1020    0x1020
    598 #define PCI_DEVICE_ID_QLOGIC_ISP1022    0x1022
    599 
    600 #define PCI_VENDOR_ID_CYRIX             0x1078
    601 #define PCI_DEVICE_ID_CYRIX_5510        0x0000
    602 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER  0x0001
    603 #define PCI_DEVICE_ID_CYRIX_5520        0x0002
    604 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
    605 #define PCI_DEVICE_ID_CYRIX_5530_SMI    0x0101
    606 #define PCI_DEVICE_ID_CYRIX_5530_IDE    0x0102
    607 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO  0x0103
    608 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO  0x0104
    609 
    610 #define PCI_VENDOR_ID_LEADTEK           0x107d
    611 #define PCI_DEVICE_ID_LEADTEK_805       0x0000
    612 
    613 #define PCI_VENDOR_ID_CONTAQ            0x1080
    614 #define PCI_DEVICE_ID_CONTAQ_82C599     0x0600
    615 #define PCI_DEVICE_ID_CONTAQ_82C693     0xc693
    616 
    617 #define PCI_VENDOR_ID_FOREX             0x1083
    618 
    619 #define PCI_VENDOR_ID_OLICOM            0x108d
    620 #define PCI_DEVICE_ID_OLICOM_OC3136     0x0001
    621 #define PCI_DEVICE_ID_OLICOM_OC2315     0x0011
    622 #define PCI_DEVICE_ID_OLICOM_OC2325     0x0012
    623 #define PCI_DEVICE_ID_OLICOM_OC2183     0x0013
    624 #define PCI_DEVICE_ID_OLICOM_OC2326     0x0014
    625 #define PCI_DEVICE_ID_OLICOM_OC6151     0x0021
    626 
    627 #define PCI_VENDOR_ID_SUN               0x108e
    628 #define PCI_DEVICE_ID_SUN_EBUS          0x1000
    629 #define PCI_DEVICE_ID_SUN_HAPPYMEAL     0x1001
    630 #define PCI_DEVICE_ID_SUN_SIMBA         0x5000
    631 #define PCI_DEVICE_ID_SUN_PBM           0x8000
    632 #define PCI_DEVICE_ID_SUN_SABRE         0xa000
    633 
    634 #define PCI_VENDOR_ID_CMD               0x1095
    635 #define PCI_DEVICE_ID_CMD_640           0x0640
    636 #define PCI_DEVICE_ID_CMD_643           0x0643
    637 #define PCI_DEVICE_ID_CMD_646           0x0646
    638 #define PCI_DEVICE_ID_CMD_647           0x0647
    639 #define PCI_DEVICE_ID_CMD_670           0x0670
    640 
    641 #define PCI_VENDOR_ID_VISION            0x1098
    642 #define PCI_DEVICE_ID_VISION_QD8500     0x0001
    643 #define PCI_DEVICE_ID_VISION_QD8580     0x0002
    644 
    645 #define PCI_VENDOR_ID_BROOKTREE         0x109e
    646 #define PCI_DEVICE_ID_BROOKTREE_848     0x0350
    647 #define PCI_DEVICE_ID_BROOKTREE_849A    0x0351
    648 #define PCI_DEVICE_ID_BROOKTREE_8474    0x8474
    649 
    650 #define PCI_VENDOR_ID_SIERRA            0x10a8
    651 #define PCI_DEVICE_ID_SIERRA_STB        0x0000
    652 
    653 #define PCI_VENDOR_ID_ACC               0x10aa
    654 #define PCI_DEVICE_ID_ACC_2056          0x0000
    655 
    656 #define PCI_VENDOR_ID_WINBOND           0x10ad
    657 #define PCI_DEVICE_ID_WINBOND_83769     0x0001
    658 #define PCI_DEVICE_ID_WINBOND_82C105    0x0105
    659 #define PCI_DEVICE_ID_WINBOND_83C553    0x0565
    660 
    661 #define PCI_VENDOR_ID_DATABOOK          0x10b3
    662 #define PCI_DEVICE_ID_DATABOOK_87144    0xb106
    663 
    664 #define PCI_VENDOR_ID_PLX               0x10b5
    665 #define PCI_DEVICE_ID_PLX_9050          0x9050
    666 #define PCI_DEVICE_ID_PLX_9060          0x9060
    667 #define PCI_DEVICE_ID_PLX_9060ES        0x906E
    668 #define PCI_DEVICE_ID_PLX_9060SD        0x906D
    669 #define PCI_DEVICE_ID_PLX_9080          0x9080
    670 
    671 #define PCI_VENDOR_ID_MADGE             0x10b6
    672 #define PCI_DEVICE_ID_MADGE_MK2         0x0002
    673 #define PCI_DEVICE_ID_MADGE_C155S       0x1001
    674 
    675 #define PCI_VENDOR_ID_3COM              0x10b7
    676 #define PCI_DEVICE_ID_3COM_3C339        0x3390
    677 #define PCI_DEVICE_ID_3COM_3C590        0x5900
    678 #define PCI_DEVICE_ID_3COM_3C595TX      0x5950
    679 #define PCI_DEVICE_ID_3COM_3C595T4      0x5951
    680 #define PCI_DEVICE_ID_3COM_3C595MII     0x5952
    681 #define PCI_DEVICE_ID_3COM_3C900TPO     0x9000
    682 #define PCI_DEVICE_ID_3COM_3C900COMBO   0x9001
    683 #define PCI_DEVICE_ID_3COM_3C905TX      0x9050
    684 #define PCI_DEVICE_ID_3COM_3C905T4      0x9051
    685 #define PCI_DEVICE_ID_3COM_3C905B_TX    0x9055
    686 
    687 #define PCI_VENDOR_ID_SMC               0x10b8
    688 #define PCI_DEVICE_ID_SMC_EPIC100       0x0005
    689 
    690 #define PCI_VENDOR_ID_AL                0x10b9
    691 #define PCI_DEVICE_ID_AL_M1445          0x1445
    692 #define PCI_DEVICE_ID_AL_M1449          0x1449
    693 #define PCI_DEVICE_ID_AL_M1451          0x1451
    694 #define PCI_DEVICE_ID_AL_M1461          0x1461
    695 #define PCI_DEVICE_ID_AL_M1489          0x1489
    696 #define PCI_DEVICE_ID_AL_M1511          0x1511
    697 #define PCI_DEVICE_ID_AL_M1513          0x1513
    698 #define PCI_DEVICE_ID_AL_M1521          0x1521
    699 #define PCI_DEVICE_ID_AL_M1523          0x1523
    700 #define PCI_DEVICE_ID_AL_M1531          0x1531
    701 #define PCI_DEVICE_ID_AL_M1533          0x1533
    702 #define PCI_DEVICE_ID_AL_M3307          0x3307
    703 #define PCI_DEVICE_ID_AL_M4803          0x5215
    704 #define PCI_DEVICE_ID_AL_M5219          0x5219
    705 #define PCI_DEVICE_ID_AL_M5229          0x5229
    706 #define PCI_DEVICE_ID_AL_M5237          0x5237
    707 #define PCI_DEVICE_ID_AL_M7101          0x7101
    708 
    709 #define PCI_VENDOR_ID_MITSUBISHI        0x10ba
    710 
    711 #define PCI_VENDOR_ID_SURECOM           0x10bd
    712 #define PCI_DEVICE_ID_SURECOM_NE34      0x0e34
    713 
    714 #define PCI_VENDOR_ID_NEOMAGIC          0x10c8
    715 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
    716 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
    717 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
    718 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
    719 
    720 #define PCI_VENDOR_ID_ASP               0x10cd
    721 #define PCI_DEVICE_ID_ASP_ABP940        0x1200
    722 #define PCI_DEVICE_ID_ASP_ABP940U       0x1300
    723 #define PCI_DEVICE_ID_ASP_ABP940UW      0x2300
    724 
    725 #define PCI_VENDOR_ID_MACRONIX          0x10d9
    726 #define PCI_DEVICE_ID_MACRONIX_MX98713  0x0512
    727 #define PCI_DEVICE_ID_MACRONIX_MX987x5  0x0531
    728 
    729 #define PCI_VENDOR_ID_CERN              0x10dc
    730 #define PCI_DEVICE_ID_CERN_SPSB_PMC     0x0001
    731 #define PCI_DEVICE_ID_CERN_SPSB_PCI     0x0002
    732 #define PCI_DEVICE_ID_CERN_HIPPI_DST    0x0021
    733 #define PCI_DEVICE_ID_CERN_HIPPI_SRC    0x0022
    734 
    735 #define PCI_VENDOR_ID_NVIDIA            0x10de
    736 
    737 #define PCI_VENDOR_ID_IMS               0x10e0
    738 #define PCI_DEVICE_ID_IMS_8849          0x8849
    739 
    740 #define PCI_VENDOR_ID_TEKRAM2           0x10e1
    741 #define PCI_DEVICE_ID_TEKRAM2_690c      0x690c
    742 
    743 #define PCI_VENDOR_ID_TUNDRA            0x10e3
    744 #define PCI_DEVICE_ID_TUNDRA_CA91C042   0x0000
    745 
    746 #define PCI_VENDOR_ID_AMCC              0x10e8
    747 #define PCI_DEVICE_ID_AMCC_MYRINET      0x8043
    748 #define PCI_DEVICE_ID_AMCC_PARASTATION  0x8062
    749 #define PCI_DEVICE_ID_AMCC_S5933        0x807d
    750 #define PCI_DEVICE_ID_AMCC_S5933_HEPC3  0x809c
    751 
    752 #define PCI_VENDOR_ID_INTERG            0x10ea
    753 #define PCI_DEVICE_ID_INTERG_1680       0x1680
    754 #define PCI_DEVICE_ID_INTERG_1682       0x1682
    755 
    756 #define PCI_VENDOR_ID_REALTEK           0x10ec
    757 #define PCI_DEVICE_ID_REALTEK_8029      0x8029
    758 #define PCI_DEVICE_ID_REALTEK_8129      0x8129
    759 #define PCI_DEVICE_ID_REALTEK_8139      0x8139
    760 
    761 #define PCI_VENDOR_ID_TRUEVISION        0x10fa
    762 #define PCI_DEVICE_ID_TRUEVISION_T1000  0x000c
    763 
    764 #define PCI_VENDOR_ID_INIT              0x1101
    765 #define PCI_DEVICE_ID_INIT_320P         0x9100
    766 #define PCI_DEVICE_ID_INIT_360P         0x9500
    767 
    768 #define PCI_VENDOR_ID_TTI               0x1103
    769 #define PCI_DEVICE_ID_TTI_HPT343        0x0003
    770 
    771 #define PCI_VENDOR_ID_VIA               0x1106
    772 #define PCI_DEVICE_ID_VIA_82C505        0x0505
    773 #define PCI_DEVICE_ID_VIA_82C561        0x0561
    774 #define PCI_DEVICE_ID_VIA_82C586_1      0x0571
    775 #define PCI_DEVICE_ID_VIA_82C576        0x0576
    776 #define PCI_DEVICE_ID_VIA_82C585        0x0585
    777 #define PCI_DEVICE_ID_VIA_82C586_0      0x0586
    778 #define PCI_DEVICE_ID_VIA_82C595        0x0595
    779 #define PCI_DEVICE_ID_VIA_82C597_0      0x0597
    780 #define PCI_DEVICE_ID_VIA_82C926        0x0926
    781 #define PCI_DEVICE_ID_VIA_82C416        0x1571
    782 #define PCI_DEVICE_ID_VIA_82C595_97     0x1595
    783 #define PCI_DEVICE_ID_VIA_82C586_2      0x3038
    784 #define PCI_DEVICE_ID_VIA_82C586_3      0x3040
    785 #define PCI_DEVICE_ID_VIA_86C100A       0x6100
    786 #define PCI_DEVICE_ID_VIA_82C597_1      0x8597
    787 
    788 #define PCI_VENDOR_ID_VORTEX            0x1119
    789 #define PCI_DEVICE_ID_VORTEX_GDT60x0    0x0000
    790 #define PCI_DEVICE_ID_VORTEX_GDT6000B   0x0001
    791 #define PCI_DEVICE_ID_VORTEX_GDT6x10    0x0002
    792 #define PCI_DEVICE_ID_VORTEX_GDT6x20    0x0003
    793 #define PCI_DEVICE_ID_VORTEX_GDT6530    0x0004
    794 #define PCI_DEVICE_ID_VORTEX_GDT6550    0x0005
    795 #define PCI_DEVICE_ID_VORTEX_GDT6x17    0x0006
    796 #define PCI_DEVICE_ID_VORTEX_GDT6x27    0x0007
    797 #define PCI_DEVICE_ID_VORTEX_GDT6537    0x0008
    798 #define PCI_DEVICE_ID_VORTEX_GDT6557    0x0009
    799 #define PCI_DEVICE_ID_VORTEX_GDT6x15    0x000a
    800 #define PCI_DEVICE_ID_VORTEX_GDT6x25    0x000b
    801 #define PCI_DEVICE_ID_VORTEX_GDT6535    0x000c
    802 #define PCI_DEVICE_ID_VORTEX_GDT6555    0x000d
    803 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP  0x0100
    804 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP  0x0101
    805 #define PCI_DEVICE_ID_VORTEX_GDT6537RP  0x0102
    806 #define PCI_DEVICE_ID_VORTEX_GDT6557RP  0x0103
    807 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP  0x0104
    808 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP  0x0105
    809 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
    810 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
    811 #define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
    812 #define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
    813 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
    814 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
    815 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
    816 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
    817 #define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
    818 #define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
    819 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
    820 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
    821 
    822 #define PCI_VENDOR_ID_EF                0x111a
    823 #define PCI_DEVICE_ID_EF_ATM_FPGA       0x0000
    824 #define PCI_DEVICE_ID_EF_ATM_ASIC       0x0002
    825 
    826 #define PCI_VENDOR_ID_FORE              0x1127
    827 #define PCI_DEVICE_ID_FORE_PCA200PC     0x0210
    828 #define PCI_DEVICE_ID_FORE_PCA200E      0x0300
    829 
    830 #define PCI_VENDOR_ID_IMAGINGTECH       0x112f
    831 #define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
    832 
    833 #define PCI_VENDOR_ID_PHILIPS           0x1131
    834 #define PCI_DEVICE_ID_PHILIPS_SAA7145   0x7145
    835 #define PCI_DEVICE_ID_PHILIPS_SAA7146   0x7146
    836 
    837 #define PCI_VENDOR_ID_CYCLONE           0x113c
    838 #define PCI_DEVICE_ID_CYCLONE_SDK       0x0001
    839 
    840 #define PCI_VENDOR_ID_ALLIANCE          0x1142
    841 #define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
    842 #define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
    843 #define PCI_DEVICE_ID_ALLIANCE_AT24     0x6424
    844 #define PCI_DEVICE_ID_ALLIANCE_AT3D     0x643d
    845 
    846 #define PCI_VENDOR_ID_SK                0x1148
    847 #define PCI_DEVICE_ID_SK_FP             0x4000
    848 #define PCI_DEVICE_ID_SK_TR             0x4200
    849 #define PCI_DEVICE_ID_SK_GE             0x4300
    850 
    851 #define PCI_VENDOR_ID_VMIC              0x114a
    852 #define PCI_DEVICE_ID_VMIC_VME          0x7587
    853 
    854 #define PCI_VENDOR_ID_DIGI              0x114f
    855 #define PCI_DEVICE_ID_DIGI_EPC          0x0002
    856 #define PCI_DEVICE_ID_DIGI_RIGHTSWITCH  0x0003
    857 #define PCI_DEVICE_ID_DIGI_XEM          0x0004
    858 #define PCI_DEVICE_ID_DIGI_XR           0x0005
    859 #define PCI_DEVICE_ID_DIGI_CX           0x0006
    860 #define PCI_DEVICE_ID_DIGI_XRJ          0x0009
    861 #define PCI_DEVICE_ID_DIGI_EPCJ         0x000a
    862 #define PCI_DEVICE_ID_DIGI_XR_920       0x0027
    863 
    864 #define PCI_VENDOR_ID_MUTECH            0x1159
    865 #define PCI_DEVICE_ID_MUTECH_MV1000     0x0001
    866 
    867 #define PCI_VENDOR_ID_RENDITION         0x1163
    868 #define PCI_DEVICE_ID_RENDITION_VERITE  0x0001
    869 #define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
    870 
    871 #define PCI_VENDOR_ID_TOSHIBA           0x1179
    872 #define PCI_DEVICE_ID_TOSHIBA_601       0x0601
    873 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95   0x060a
    874 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97   0x060f
    875 
    876 #define PCI_VENDOR_ID_RICOH             0x1180
    877 #define PCI_DEVICE_ID_RICOH_RL5C465     0x0465
    878 #define PCI_DEVICE_ID_RICOH_RL5C466     0x0466
    879 #define PCI_DEVICE_ID_RICOH_RL5C475     0x0475
    880 #define PCI_DEVICE_ID_RICOH_RL5C478     0x0478
    881 
    882 #define PCI_VENDOR_ID_ARTOP             0x1191
    883 #define PCI_DEVICE_ID_ARTOP_ATP8400     0x0004
    884 #define PCI_DEVICE_ID_ARTOP_ATP850UF    0x0005
    885 
    886 #define PCI_VENDOR_ID_ZEITNET           0x1193
    887 #define PCI_DEVICE_ID_ZEITNET_1221      0x0001
    888 #define PCI_DEVICE_ID_ZEITNET_1225      0x0002
    889 
    890 #define PCI_VENDOR_ID_OMEGA             0x119b
    891 #define PCI_DEVICE_ID_OMEGA_82C092G     0x1221
    892 
    893 #define PCI_VENDOR_ID_LITEON            0x11ad
    894 #define PCI_DEVICE_ID_LITEON_LNE100TX   0x0002
    895 
    896 #define PCI_VENDOR_ID_NP                0x11bc
    897 #define PCI_DEVICE_ID_NP_PCI_FDDI       0x0001
    898 
    899 #define PCI_VENDOR_ID_ATT               0x11c1
    900 #define PCI_DEVICE_ID_ATT_L56XMF        0x0440
    901 
    902 #define PCI_VENDOR_ID_SPECIALIX         0x11cb
    903 #define PCI_DEVICE_ID_SPECIALIX_IO8     0x2000
    904 #define PCI_DEVICE_ID_SPECIALIX_XIO     0x4000
    905 #define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
    906 
    907 #define PCI_VENDOR_ID_AURAVISION        0x11d1
    908 #define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
    909 
    910 #define PCI_VENDOR_ID_IKON              0x11d5
    911 #define PCI_DEVICE_ID_IKON_10115        0x0115
    912 #define PCI_DEVICE_ID_IKON_10117        0x0117
    913 
    914 #define PCI_VENDOR_ID_ZORAN             0x11de
    915 #define PCI_DEVICE_ID_ZORAN_36057       0x6057
    916 #define PCI_DEVICE_ID_ZORAN_36120       0x6120
    917 
    918 #define PCI_VENDOR_ID_KINETIC           0x11f4
    919 #define PCI_DEVICE_ID_KINETIC_2915      0x2915
    920 
    921 #define PCI_VENDOR_ID_COMPEX            0x11f6
    922 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
    923 #define PCI_DEVICE_ID_COMPEX_RL2000     0x1401
    924 
    925 #define PCI_VENDOR_ID_RP               0x11fe
    926 #define PCI_DEVICE_ID_RP32INTF         0x0001
    927 #define PCI_DEVICE_ID_RP8INTF          0x0002
    928 #define PCI_DEVICE_ID_RP16INTF         0x0003
    929 #define PCI_DEVICE_ID_RP4QUAD          0x0004
    930 #define PCI_DEVICE_ID_RP8OCTA          0x0005
    931 #define PCI_DEVICE_ID_RP8J             0x0006
    932 #define PCI_DEVICE_ID_RPP4             0x000A
    933 #define PCI_DEVICE_ID_RPP8             0x000B
    934 #define PCI_DEVICE_ID_RP8M             0x000C
    935 
    936 #define PCI_VENDOR_ID_CYCLADES          0x120e
    937 #define PCI_DEVICE_ID_CYCLOM_Y_Lo       0x0100
    938 #define PCI_DEVICE_ID_CYCLOM_Y_Hi       0x0101
    939 #define PCI_DEVICE_ID_CYCLOM_Z_Lo       0x0200
    940 #define PCI_DEVICE_ID_CYCLOM_Z_Hi       0x0201
    941 
    942 #define PCI_VENDOR_ID_ESSENTIAL         0x120f
    943 #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER      0x0001
    944 
    945 #define PCI_VENDOR_ID_O2                0x1217
    946 #define PCI_DEVICE_ID_O2_6729           0x6729
    947 #define PCI_DEVICE_ID_O2_6730           0x673a
    948 #define PCI_DEVICE_ID_O2_6832           0x6832
    949 #define PCI_DEVICE_ID_O2_6836           0x6836
    950 
    951 #define PCI_VENDOR_ID_3DFX              0x121a
    952 #define PCI_DEVICE_ID_3DFX_VOODOO       0x0001
    953 #define PCI_DEVICE_ID_3DFX_VOODOO2      0x0002
    954 
    955 #define PCI_VENDOR_ID_SIGMADES          0x1236
    956 #define PCI_DEVICE_ID_SIGMADES_6425     0x6401
    957 
    958 #define PCI_VENDOR_ID_CCUBE             0x123f
    959 
    960 #define PCI_VENDOR_ID_DIPIX             0x1246
    961 
    962 #define PCI_VENDOR_ID_STALLION          0x124d
    963 #define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
    964 #define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
    965 #define PCI_DEVICE_ID_STALLION_EIOPCI   0x0003
    966 
    967 #define PCI_VENDOR_ID_OPTIBASE          0x1255
    968 #define PCI_DEVICE_ID_OPTIBASE_FORGE    0x1110
    969 #define PCI_DEVICE_ID_OPTIBASE_FUSION   0x1210
    970 #define PCI_DEVICE_ID_OPTIBASE_VPLEX    0x2110
    971 #define PCI_DEVICE_ID_OPTIBASE_VPLEXCC  0x2120
    972 #define PCI_DEVICE_ID_OPTIBASE_VQUEST   0x2130
    973 
    974 #define PCI_VENDOR_ID_SATSAGEM          0x1267
    975 #define PCI_DEVICE_ID_SATSAGEM_PCR2101  0x5352
    976 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
    977 
    978 #define PCI_VENDOR_ID_HUGHES            0x1273
    979 #define PCI_DEVICE_ID_HUGHES_DIRECPC    0x0002
    980 
    981 #define PCI_VENDOR_ID_ENSONIQ           0x1274
    982 #define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI  0x5000
    983 
    984 #define PCI_VENDOR_ID_ALTEON            0x12ae
    985 #define PCI_DEVICE_ID_ALTEON_ACENIC     0x0001
    986 
    987 #define PCI_VENDOR_ID_PICTUREL          0x12c5
    988 #define PCI_DEVICE_ID_PICTUREL_PCIVST   0x0081
    989 
    990 #define PCI_VENDOR_ID_NVIDIA_SGS        0x12d2
    991 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
    992 
    993 #define PCI_VENDOR_ID_CBOARDS           0x1307
    994 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
    995 
    996 #define PCI_VENDOR_ID_SYMPHONY          0x1c1c
    997 #define PCI_DEVICE_ID_SYMPHONY_101      0x0001
    998 
    999 #define PCI_VENDOR_ID_TEKRAM            0x1de1
    1000 #define PCI_DEVICE_ID_TEKRAM_DC290      0xdc29
    1001 
    1002 #define PCI_VENDOR_ID_3DLABS            0x3d3d
    1003 #define PCI_DEVICE_ID_3DLABS_300SX      0x0001
    1004 #define PCI_DEVICE_ID_3DLABS_500TX      0x0002
    1005 #define PCI_DEVICE_ID_3DLABS_DELTA      0x0003
    1006 #define PCI_DEVICE_ID_3DLABS_PERMEDIA   0x0004
    1007 #define PCI_DEVICE_ID_3DLABS_MX         0x0006
    1008 
    1009 #define PCI_VENDOR_ID_AVANCE            0x4005
    1010 #define PCI_DEVICE_ID_AVANCE_ALG2064    0x2064
    1011 #define PCI_DEVICE_ID_AVANCE_2302       0x2302
    1012 
    1013 #define PCI_VENDOR_ID_NETVIN            0x4a14
    1014 #define PCI_DEVICE_ID_NETVIN_NV5000SC   0x5000
    1015 
    1016 #define PCI_VENDOR_ID_S3                0x5333
    1017 #define PCI_DEVICE_ID_S3_PLATO_PXS      0x0551
    1018 #define PCI_DEVICE_ID_S3_ViRGE          0x5631
    1019 #define PCI_DEVICE_ID_S3_TRIO           0x8811
    1020 #define PCI_DEVICE_ID_S3_AURORA64VP     0x8812
    1021 #define PCI_DEVICE_ID_S3_TRIO64UVP      0x8814
    1022 #define PCI_DEVICE_ID_S3_ViRGE_VX       0x883d
    1023 #define PCI_DEVICE_ID_S3_868            0x8880
    1024 #define PCI_DEVICE_ID_S3_928            0x88b0
    1025 #define PCI_DEVICE_ID_S3_864_1          0x88c0
    1026 #define PCI_DEVICE_ID_S3_864_2          0x88c1
    1027 #define PCI_DEVICE_ID_S3_964_1          0x88d0
    1028 #define PCI_DEVICE_ID_S3_964_2          0x88d1
    1029 #define PCI_DEVICE_ID_S3_968            0x88f0
    1030 #define PCI_DEVICE_ID_S3_TRIO64V2       0x8901
    1031 #define PCI_DEVICE_ID_S3_PLATO_PXG      0x8902
    1032 #define PCI_DEVICE_ID_S3_ViRGE_DXGX     0x8a01
    1033 #define PCI_DEVICE_ID_S3_ViRGE_GX2      0x8a10
    1034 #define PCI_DEVICE_ID_S3_ViRGE_MX       0x8c01
    1035 #define PCI_DEVICE_ID_S3_ViRGE_MXP      0x8c02
    1036 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV    0x8c03
    1037 #define PCI_DEVICE_ID_S3_SONICVIBES     0xca00
    1038 
    1039 #define PCI_VENDOR_ID_INTEL             0x8086
    1040 #define PCI_DEVICE_INTEL_82544EI_COPPER 0x1008  /* <SKF> */
    1041 #define PCI_DEVICE_ID_INTEL_82375       0x0482
    1042 #define PCI_DEVICE_ID_INTEL_82424       0x0483
    1043 #define PCI_DEVICE_ID_INTEL_82378       0x0484
    1044 #define PCI_DEVICE_ID_INTEL_82430       0x0486
    1045 #define PCI_DEVICE_ID_INTEL_82434       0x04a3
    1046 #define PCI_DEVICE_ID_INTEL_82092AA_0   0x1221
    1047 #define PCI_DEVICE_ID_INTEL_82092AA_1   0x1222
    1048 #define PCI_DEVICE_ID_INTEL_7116        0x1223
    1049 #define PCI_DEVICE_ID_INTEL_82596       0x1226
    1050 #define PCI_DEVICE_ID_INTEL_82865       0x1227
    1051 #define PCI_DEVICE_ID_INTEL_82557       0x1229
    1052 #define PCI_DEVICE_ID_INTEL_82437       0x122d
    1053 #define PCI_DEVICE_ID_INTEL_82371FB_0   0x122e
    1054 #define PCI_DEVICE_ID_INTEL_82371FB_1   0x1230
    1055 #define PCI_DEVICE_ID_INTEL_82371MX     0x1234
    1056 #define PCI_DEVICE_ID_INTEL_82437MX     0x1235
    1057 #define PCI_DEVICE_ID_INTEL_82441       0x1237
    1058 #define PCI_DEVICE_ID_INTEL_82380FB     0x124b
    1059 #define PCI_DEVICE_ID_INTEL_82439       0x1250
    1060 #define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
    1061 #define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
    1062 #define PCI_DEVICE_ID_INTEL_82371SB_2   0x7020
    1063 #define PCI_DEVICE_ID_INTEL_82437VX     0x7030
    1064 #define PCI_DEVICE_ID_INTEL_82439TX     0x7100
    1065 #define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
    1066 #define PCI_DEVICE_ID_INTEL_82371AB     0x7111
    1067 #define PCI_DEVICE_ID_INTEL_82371AB_2   0x7112
    1068 #define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
    1069 #define PCI_DEVICE_ID_INTEL_82443LX_0   0x7180
    1070 #define PCI_DEVICE_ID_INTEL_82443LX_1   0x7181
    1071 #define PCI_DEVICE_ID_INTEL_82443BX_0   0x7190
    1072 #define PCI_DEVICE_ID_INTEL_82443BX_1   0x7191
    1073 #define PCI_DEVICE_ID_INTEL_82443BX_2   0x7192
    1074 #define PCI_DEVICE_ID_INTEL_P6          0x84c4
    1075 #define PCI_DEVICE_ID_INTEL_82450GX     0x84c5
    1076 
    1077 #define PCI_VENDOR_ID_KTI               0x8e2e
    1078 #define PCI_DEVICE_ID_KTI_ET32P2        0x3000
    1079 
    1080 #define PCI_VENDOR_ID_ADAPTEC           0x9004
    1081 #define PCI_DEVICE_ID_ADAPTEC_7810      0x1078
    1082 #define PCI_DEVICE_ID_ADAPTEC_7850      0x5078
    1083 #define PCI_DEVICE_ID_ADAPTEC_7855      0x5578
    1084 #define PCI_DEVICE_ID_ADAPTEC_5800      0x5800
    1085 #define PCI_DEVICE_ID_ADAPTEC_1480A     0x6075
    1086 #define PCI_DEVICE_ID_ADAPTEC_7860      0x6078
    1087 #define PCI_DEVICE_ID_ADAPTEC_7861      0x6178
    1088 #define PCI_DEVICE_ID_ADAPTEC_7870      0x7078
    1089 #define PCI_DEVICE_ID_ADAPTEC_7871      0x7178
    1090 #define PCI_DEVICE_ID_ADAPTEC_7872      0x7278
    1091 #define PCI_DEVICE_ID_ADAPTEC_7873      0x7378
    1092 #define PCI_DEVICE_ID_ADAPTEC_7874      0x7478
    1093 #define PCI_DEVICE_ID_ADAPTEC_7895      0x7895
    1094 #define PCI_DEVICE_ID_ADAPTEC_7880      0x8078
    1095 #define PCI_DEVICE_ID_ADAPTEC_7881      0x8178
    1096 #define PCI_DEVICE_ID_ADAPTEC_7882      0x8278
    1097 #define PCI_DEVICE_ID_ADAPTEC_7883      0x8378
    1098 #define PCI_DEVICE_ID_ADAPTEC_7884      0x8478
    1099 #define PCI_DEVICE_ID_ADAPTEC_1030      0x8b78
    1100 
    1101 #define PCI_VENDOR_ID_ADAPTEC2          0x9005
    1102 #define PCI_DEVICE_ID_ADAPTEC2_2940U2   0x0010
    1103 #define PCI_DEVICE_ID_ADAPTEC2_7890     0x001f
    1104 #define PCI_DEVICE_ID_ADAPTEC2_3940U2   0x0050
    1105 #define PCI_DEVICE_ID_ADAPTEC2_7896     0x005f
    1106 
    1107 #define PCI_VENDOR_ID_ATRONICS          0x907f
    1108 #define PCI_DEVICE_ID_ATRONICS_2015     0x2015
    1109 
    1110 #define PCI_VENDOR_ID_HOLTEK            0x9412
    1111 #define PCI_DEVICE_ID_HOLTEK_6565       0x6565
    1112 
    1113 #define PCI_VENDOR_ID_TIGERJET          0xe159
    1114 #define PCI_DEVICE_ID_TIGERJET_300      0x0001
    1115 
    1116 #define PCI_VENDOR_ID_ARK               0xedd8
    1117 #define PCI_DEVICE_ID_ARK_STING         0xa091
    1118 #define PCI_DEVICE_ID_ARK_STINGARK      0xa099
    1119 #define PCI_DEVICE_ID_ARK_2000MT        0xa0a1
    1120 
    1121 /*
    1122  * The PCI interface treats multi-function devices as independent
    1123  * devices.  The slot/function address of each device is encoded
    1124  * in a single byte as follows:
    1125  *
    1126  *      7:3 = slot
    1127  *      2:0 = function
    1128  */
    1129 #define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
    1130 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
    1131 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
    1132 
    1133 /*
    1134  * Error values that may be returned by the PCI bios.
    1135  */
    1136 #define PCIBIOS_SUCCESSFUL              0x00
    1137 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
    1138 #define PCIBIOS_BAD_VENDOR_ID           0x83
    1139 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
    1140 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
    1141 #define PCIBIOS_SET_FAILED              0x88
    1142 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
    1143 
    1144 /* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not
    1145  * scanned on mvme2306 otherwise
    1146  */
    1147 #define PCI_MAX_DEVICES                 32
    1148 #define PCI_MAX_FUNCTIONS               8
    1149 
    1150 typedef struct  {
    1151         int (*read_config_byte)(unsigned char, unsigned char,  unsigned char,
    1152                                unsigned char, unsigned char *);
    1153         int (*read_config_word)(unsigned char, unsigned char,  unsigned char,
    1154                                unsigned char, unsigned short *);
    1155         int (*read_config_dword)(unsigned char, unsigned char,  unsigned char,
    1156                                unsigned char, unsigned int *);
    1157         int (*write_config_byte)(unsigned char, unsigned char,  unsigned char,
    1158                                unsigned char, unsigned char);
    1159         int (*write_config_word)(unsigned char, unsigned char,  unsigned char,
    1160                                unsigned char, unsigned short);
    1161         int (*write_config_dword)(unsigned char, unsigned char,  unsigned char,
    1162                                unsigned char, unsigned int);
    1163 }pci_config_access_functions;
     110#define PCI_DEVICE_INTEL_82544EI_COPPER 0x1008  /* <SKF> */
    1164111
    1165112typedef struct {
     
    1167114  unsigned int  pci_config_data;
    1168115  /*  const pci_config_access_functions*        pci_functions;*/
    1169 } pci_config;
     116} pci_bsp_config;
    1170117
    1171 extern pci_config BSP_pci_config[2];
     118extern pci_bsp_config BSP_pci_config[2];
    1172119
    1173120#ifndef PCI_MAIN
     
    1178125extern int PCIx_write_config_word();
    1179126extern int PCIx_write_config_dword();
     127#endif
    1180128
    1181 extern int pci_read_config_byte(unsigned char bus, unsigned char dev,unsigned char func,unsigned char offset,unsigned char *val);
    1182 extern int pci_read_config_word(unsigned char bus, unsigned char dev,unsigned char func, unsigned char offset, unsigned short *val);
    1183 extern int pci_read_config_dword(unsigned char bus, unsigned char dev,unsigned char func, unsigned char offset, unsigned int *val);
    1184 extern int pci_write_config_byte();
    1185 extern int pci_write_config_word();
    1186 extern int pci_write_config_dword();
     129extern int pci_bsp_read_config_byte(
     130  unsigned char bus,
     131  unsigned char dev,
     132  unsigned char func,
     133  unsigned char offset,
     134  unsigned char *val
     135);
     136
     137extern int pci_bsp_read_config_word(
     138  unsigned char bus,
     139  unsigned char dev,
     140  unsigned char func,
     141  unsigned char offset,
     142  unsigned short *val
     143);
     144
     145extern int pci_bsp_read_config_dword(
     146  unsigned char bus,
     147  unsigned char dev,
     148  unsigned char func,
     149  unsigned char offset,
     150  unsigned int *val
     151);
     152
     153extern int pci_bsp_write_config_byte(
     154  unchar bus,
     155  unchar dev,
     156  unchar func,
     157  unchar offset,
     158  unchar val
     159);
     160
     161extern int pci_bsp_write_config_word(
     162  unchar bus,
     163  unchar dev,
     164  unchar func,
     165  unchar offset,
     166  unsigned short val
     167);
     168
     169extern int pci_bsp_write_config_dword(
     170  unchar bus,
     171  unchar dev,
     172  unchar func,
     173  unchar offset,
     174  unsigned int val
     175);
     176
    1187177
    1188178/*
    1189  * Return the number of PCI busses in the system
     179 * Override the default pci_read_config... for vmeUniverse.c
    1190180 */
    1191 extern unsigned char pci_bus_count();
    1192 extern void pci_initialize();
    1193 #endif
     181#define BSP_PCI_CONFIG_IN_LONG  pci_bsp_read_config_dword
     182#define BSP_PCI_CONFIG_IN_BYTE  pci_bsp_read_config_byte
     183
    1194184
    1195185int BSP_PCIxFindDevice(unsigned short vendorid, unsigned short deviceid,
    1196186                       int instance, int pciNum, int *pbus, int *pdev, int *pfun );
    1197 int pci_find_device(unsigned short vendorid, unsigned short deviceid,
    1198                 int instance, int *pbus, int *pdev, int *pfun);
    1199187
    1200 #endif /* RTEMS_PCI_H */
     188#endif /* BSP_PCI_H */
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