Changeset 3b392b6 in rtems for cpukit/libpci


Ignore:
Timestamp:
Jan 2, 2018, 10:45:42 AM (17 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
569fd50
Parents:
7190005
git-author:
Sebastian Huber <sebastian.huber@…> (01/02/18 10:45:42)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/02/18 13:49:56)
Message:

sparc: Remove BSP specifics from <pci/access.h>

Update #3254.
Update #3260.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/libpci/pci/access.h

    r7190005 r3b392b6  
    1717#include <rtems/score/basedefs.h>
    1818#include <pci.h>
    19 
    20 /* Let BSP configure load/store from PCI */
    21 #include <bsp.h>
    2219
    2320#ifdef __cplusplus
     
    204201        *addr = val;
    205202}
    206 
    207 #ifdef BSP_PCI_BIG_ENDIAN
    208 
    209 /* BSP has decided Big Endian PCI Bus (non-standard) */
    210 
    211 RTEMS_INLINE_ROUTINE uint16_t pci_ld_le16(volatile uint16_t *addr)
    212 {
    213         return ld_be16(addr);
    214 }
    215 
    216 RTEMS_INLINE_ROUTINE void pci_st_le16(volatile uint16_t *addr, uint16_t val)
    217 {
    218         st_be16(addr, val);
    219 }
    220 
    221 RTEMS_INLINE_ROUTINE uint32_t pci_ld_le32(volatile uint32_t *addr)
    222 {
    223         return ld_be32(addr);
    224 }
    225 
    226 RTEMS_INLINE_ROUTINE void pci_st_le32(volatile uint32_t *addr, uint32_t val)
    227 {
    228         st_be32(addr, val);
    229 }
    230 
    231 RTEMS_INLINE_ROUTINE uint16_t pci_ld_be16(volatile uint16_t *addr)
    232 {
    233         return ld_le16(addr);
    234 }
    235 
    236 RTEMS_INLINE_ROUTINE void pci_st_be16(volatile uint16_t *addr, uint16_t val)
    237 {
    238         st_le16(addr, val);
    239 }
    240 
    241 RTEMS_INLINE_ROUTINE uint32_t pci_ld_be32(volatile uint32_t *addr)
    242 {
    243         return ld_le32(addr);
    244 }
    245 
    246 RTEMS_INLINE_ROUTINE void pci_st_be32(volatile uint32_t *addr, uint32_t val)
    247 {
    248         st_le32(addr, val);
    249 }
    250 
    251 #else
    252 
    253 /* Little Endian PCI Bus */
    254 
    255 RTEMS_INLINE_ROUTINE uint16_t pci_ld_le16(volatile uint16_t *addr)
    256 {
    257         return ld_le16(addr);
    258 }
    259 
    260 RTEMS_INLINE_ROUTINE void pci_st_le16(volatile uint16_t *addr, uint16_t val)
    261 {
    262         st_le16(addr, val);
    263 }
    264 
    265 RTEMS_INLINE_ROUTINE uint32_t pci_ld_le32(volatile uint32_t *addr)
    266 {
    267         return ld_le32(addr);
    268 }
    269 
    270 RTEMS_INLINE_ROUTINE void pci_st_le32(volatile uint32_t *addr, uint32_t val)
    271 {
    272         st_le32(addr, val);
    273 }
    274 
    275 RTEMS_INLINE_ROUTINE uint16_t pci_ld_be16(volatile uint16_t *addr)
    276 {
    277         return ld_be16(addr);
    278 }
    279 
    280 RTEMS_INLINE_ROUTINE void pci_st_be16(volatile uint16_t *addr, uint16_t val)
    281 {
    282         st_be16(addr, val);
    283 }
    284 
    285 RTEMS_INLINE_ROUTINE uint32_t pci_ld_be32(volatile uint32_t *addr)
    286 {
    287         return ld_be32(addr);
    288 }
    289 
    290 RTEMS_INLINE_ROUTINE void pci_st_be32(volatile uint32_t *addr, uint32_t val)
    291 {
    292         st_be32(addr, val);
    293 }
    294 
    295 #endif
    296203
    297204/* Registers-over-Memory Space access routines. The routines are not inlined
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