Changeset 3a5676e in rtems


Ignore:
Timestamp:
Oct 19, 1998, 5:56:29 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
8eba470
Parents:
65d5650
Message:

All files as automatically generated as possible.

Location:
doc/supplements/hppa1_1
Files:
1 deleted
6 edited

Legend:

Unmodified
Added
Removed
  • doc/supplements/hppa1_1/Makefile

    r65d5650 r3a5676e  
    2323GENERATED_FILES=\
    2424  cpumodel.texi callconv.texi memmodel.texi intr.texi fatalerr.texi \
    25   bsp.texi cputable.texi wksheets.texi
    26 
    27 # timing.texi timeBSP.texi
     25  bsp.texi cputable.texi wksheets.texi timing.texi timeSIMHPPA.texi
    2826
    2927FILES= $(PROJECT).texi \
    30   preface.texi timetbl.texi timedata.texi \
     28  preface.texi \
    3129  $(GENERATED_FILES)
    3230
     
    4644$(PROJECT).dvi: $(FILES)
    4745        $(TEXI2DVI) $(PROJECT).texi
    48 
    49 replace: timedata.texi
    5046
    5147#
     
    7975        $(BMENU) -p "Memory Model Flat Memory Model" \
    8076            -u "Top" \
     77            -n "Default Fatal Error Processing" ${*}.t
     78
    8179
    8280fatalerr.texi: fatalerr.t Makefile
    83         $(BMENU) -p "Interrupt Processing Interrupt Stack" \
     81        $(BMENU) -p "Interrupt Processing Disabling of Interrupts by RTEMS" \
    8482            -u "Top" \
    8583            -n "Board Support Packages" ${*}.t
     
    9492            -u "Top" \
    9593            -n "Memory Requirements" ${*}.t
    96 
    9794
    9895# Worksheets Chapter:
     
    125122            -n "HP-7100 Timing Data" ${*}.t
    126123
    127 # Timing Chapter
     124# Timing Data for BSP Chapter:
     125#  1.  Copy the Shared File
     126#  2.  Replace Times and Sizes
     127#  3.  Build Node Structure
    128128
    129 timetbl.t: ../../common/timetbl.t
    130         sed -e 's/TIMETABLE_NEXT_LINK/Command and Variable Index/' \
    131             <../../common/timetbl.t >timetbl.t
    132 
    133 timetbl.texi: timetbl.t SIMHPPA_TIMES
    134         ${REPLACE} -p SIMHPPA_TIMES timetbl.t
    135         mv timetbl.t.fixed timetbl.texi
    136 
    137 timedata.texi: timedata.t SIMHPPA_TIMES
    138         ${REPLACE} -p SIMHPPA_TIMES timedata.t
    139         mv timedata.t.fixed timedata.texi
     129timeSIMHPPA.texi: timeSIMHPPA.t Makefile
     130        $(BMENU) -p "Timing Specification Terminology" \
     131            -u "Top" \
     132            -n "Command and Variable Index" ${*}.t
    140133
    141134html: dirs $(FILES)
     
    149142        rm -f $(PROJECT) $(PROJECT)-*
    150143        rm -f c_hppa1_1 c_hppa1_1-*
    151         rm -f timedata.texi timetbl.texi timetbl.t intr.t
     144        rm -f intr.t
    152145        rm -f timing.t timing.texi
    153146        rm -f wksheets.t wksheets_NOTIMES.t $(GENERATED_FILES)
  • doc/supplements/hppa1_1/bsp.t

    r65d5650 r3a5676e  
    77@c
    88
    9 @ifinfo
    10 @node Board Support Packages, Board Support Packages Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Top
    11 @end ifinfo
    129@chapter Board Support Packages
    13 @ifinfo
    14 @menu
    15 * Board Support Packages Introduction::
    16 * Board Support Packages System Reset::
    17 * Board Support Packages Processor Initialization::
    18 @end menu
    19 @end ifinfo
    2010
    21 @ifinfo
    22 @node Board Support Packages Introduction, Board Support Packages System Reset, Board Support Packages, Board Support Packages
    23 @end ifinfo
    2411@section Introduction
    2512
     
    3118Applications User's Guide.
    3219
    33 @ifinfo
    34 @node Board Support Packages System Reset, Board Support Packages Processor Initialization, Board Support Packages Introduction, Board Support Packages
    35 @end ifinfo
    3620@section System Reset
    3721
     
    4125beyond the scope of this manual.
    4226
    43 @ifinfo
    44 @node Board Support Packages Processor Initialization, Processor Dependent Information Table, Board Support Packages System Reset, Board Support Packages
    45 @end ifinfo
    4627@section Processor Initialization
    4728
  • doc/supplements/hppa1_1/cputable.t

    r65d5650 r3a5676e  
    77@c
    88
    9 @ifinfo
    10 @node Processor Dependent Information Table, Processor Dependent Information Table Introduction, Board Support Packages Processor Initialization, Top
    11 @end ifinfo
    12 @chapter  Processor Dependent Information Table
    13 @ifinfo
    14 @menu
    15 * Processor Dependent Information Table Introduction::
    16 * Processor Dependent Information Table CPU Dependent Information Table::
    17 @end menu
    18 @end ifinfo
     9@chapter Processor Dependent Information Table
    1910
    20 @ifinfo
    21 @node Processor Dependent Information Table Introduction, Processor Dependent Information Table CPU Dependent Information Table, Processor Dependent Information Table, Processor Dependent Information Table
    22 @end ifinfo
    2311@section Introduction
    2412
     
    2917contents, if any, for a particular processor type.
    3018
    31 @ifinfo
    32 @node Processor Dependent Information Table CPU Dependent Information Table, Memory Requirements, Processor Dependent Information Table Introduction, Processor Dependent Information Table
    33 @end ifinfo
    3419@section CPU Dependent Information Table
    3520
  • doc/supplements/hppa1_1/fatalerr.t

    r65d5650 r3a5676e  
    77@c
    88
    9 @ifinfo
    10 @node Default Fatal Error Processing, Default Fatal Error Processing Introduction, Interrupt Processing Disabling of Interrupts by RTEMS, Top
    11 @end ifinfo
    129@chapter Default Fatal Error Processing
    13 @ifinfo
    14 @menu
    15 * Default Fatal Error Processing Introduction::
    16 * Default Fatal Error Processing Default Fatal Error Handler Operations::
    17 @end menu
    18 @end ifinfo
    1910
    20 @ifinfo
    21 @node Default Fatal Error Processing Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Default Fatal Error Processing, Default Fatal Error Processing
    22 @end ifinfo
    2311@section Introduction
    2412
     
    3321handler.
    3422
    35 @ifinfo
    36 @node Default Fatal Error Processing Default Fatal Error Handler Operations, Board Support Packages, Default Fatal Error Processing Introduction, Default Fatal Error Processing
    37 @end ifinfo
    3823@section Default Fatal Error Handler Operations
    3924
  • doc/supplements/hppa1_1/hppa1_1.texi

    r65d5650 r3a5676e  
    7373@include wksheets.texi
    7474@include timing.texi
    75 @include timedata.texi
     75@include timeSIMHPPA.texi
    7676@ifinfo
    7777@node Top, Preface, (dir), (dir)
  • doc/supplements/hppa1_1/intr_NOTIMES.t

    r65d5650 r3a5676e  
    77@c
    88
    9 @ifinfo
    10 @node Interrupt Processing, Interrupt Processing Introduction, Memory Model Flat Memory Model, Top
    11 @end ifinfo
    129@chapter Interrupt Processing
    13 @ifinfo
    14 @menu
    15 * Interrupt Processing Introduction::
    16 * Interrupt Processing Vectoring of Interrupt Handler::
    17 * Interrupt Processing Interrupt Stack Frame::
    18 * Interrupt Processing External Interrupts and Traps::
    19 * Interrupt Processing Interrupt Levels::
    20 * Interrupt Processing Disabling of Interrupts by RTEMS::
    21 @end menu
    22 @end ifinfo
    2310
    24 @ifinfo
    25 @node Interrupt Processing Introduction, Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing, Interrupt Processing
    26 @end ifinfo
    2711@section Introduction
    2812
     
    4226RTEMS.
    4327
    44 @ifinfo
    45 @node Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing Interrupt Stack Frame, Interrupt Processing Introduction, Interrupt Processing
    46 @end ifinfo
    4728@section Vectoring of Interrupt Handler
    4829
     
    11697switched.
    11798
    118 @ifinfo
    119 @node Interrupt Processing Interrupt Stack Frame, Interrupt Processing External Interrupts and Traps, Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing
    120 @end ifinfo
    12199@section Interrupt Stack Frame
    122100
     
    139117@end example
    140118
    141 @ifinfo
    142 @node Interrupt Processing External Interrupts and Traps, Interrupt Processing Interrupt Levels, Interrupt Processing Interrupt Stack Frame, Interrupt Processing
    143 @end ifinfo
    144119@section External Interrupts and Traps
    145120
     
    172147also be specifiec by the user in the CPU Configuration Table.
    173148
    174 @ifinfo
    175 @node Interrupt Processing Interrupt Levels, Interrupt Processing Disabling of Interrupts by RTEMS, Interrupt Processing External Interrupts and Traps, Interrupt Processing
    176 @end ifinfo
    177149@section Interrupt Levels
    178150
     
    196168undefined and their behavior is unpredictable.
    197169
    198 @ifinfo
    199 @node Interrupt Processing Disabling of Interrupts by RTEMS, Default Fatal Error Processing, Interrupt Processing Interrupt Levels, Interrupt Processing
    200 @end ifinfo
    201170@section Disabling of Interrupts by RTEMS
    202171
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