Changeset 39c8fdb in rtems for c/src/lib/libbsp/arm/shared/abort/abort.c
- Timestamp:
- 01/12/10 15:03:22 (13 years ago)
- Branches:
- 4.10, 4.11, 5, master
- Children:
- 61df726
- Parents:
- 29a3d72
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/arm/shared/abort/abort.c
r29a3d72 r39c8fdb 64 64 { 65 65 char *mode; 66 uint32_t prev_sp,prev_lr,cpsr, tmp;66 uint32_t prev_sp,prev_lr,cpsr,arm_switch_reg; 67 67 int i; 68 68 … … 72 72 if(!mode) mode="unknown"; 73 73 74 asm volatile (" MRS %[cpsr], cpsr \n" 75 " ORR %[tmp], %[spsr], #0xc0 \n" 76 " MSR cpsr_c, %[tmp] \n" 74 asm volatile (ARM_SWITCH_TO_ARM 75 " MRS %[cpsr], cpsr \n" 76 " ORR %[arm_switch_reg], %[spsr], #0xc0 \n" 77 " MSR cpsr_c, %[arm_switch_reg] \n" 77 78 " MOV %[prev_sp], sp \n" 78 79 " MOV %[prev_lr], lr \n" 79 80 " MSR cpsr_c, %[cpsr] \n" 80 : [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr), 81 [cpsr] "=&r" (cpsr), [tmp] "=&r" (tmp) 81 ARM_SWITCH_BACK 82 : [arm_switch_reg] "=&r" (arm_switch_reg), [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr), 83 [cpsr] "=&r" (cpsr) 82 84 : [spsr] "r" (spsr) 83 85 : "cc");
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