Changeset 38ffa0c in rtems


Ignore:
Timestamp:
09/19/95 18:32:18 (28 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
84ee59f5
Parents:
3652ad35
Message:

Incorporated the submission from John S. Gwynne
<jsg@…> of the rest of the 68000-ish support
for interrupt handling and bfffo support, the two BSPs he submitted
(efi68k and efi332), and SGI Irix 5.3 host support.

Files:
6 added
8 edited

Legend:

Unmodified
Added
Removed

  • c/ACKNOWLEDGEMENTS

    r3652ad35 r38ffa0c  
    5555  as within the Internet community as a whole.
    5656
     57+ John S. Gwynne (jsg@coulomb.eng.ohio-state.edu) of Ohio State University
     58  submitted the support for the Motorola MC68332 CPU as well as completing
     59  the support for CPUs based on the MC68000 core.  This included the "efi68k"
     60  and "efi332" BSPs as well as completing the modifications to the m68k
     61  dependent executive code to support m68k family members based on the
     62  MC68000 core.  "efi68k" and "efi332" are single board computers designed
     63  primarily for automotive electronic fuel injection (EFI) control, but can
     64  be considered general purpose controllers when used without the EFI
     65  companion board(s). See the README in each BSP for more information.
     66
    5767Finally, the RTEMS project would like to thank those who have contributed
    5868to the other free software efforts which RTEMS utilizes.  The primary RTEMS

  • c/src/exec/score/cpu/m68k/cpu.c

    r3652ad35 r38ffa0c  
    11/*
    2  *  Motorola MC68020 Dependent Source
     2 *  Motorola MC68xxx Dependent Source
    33 *
    44 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
    … …  
    3333)
    3434{
    35 
    3635  _CPU_Table = *cpu_table;
    37 
    3836}
    3937
    … …  
    6765  m68k_get_vbr( interrupt_table );
    6866
     67#if ( M68K_HAS_VBR == 1)
    6968  *old_handler = interrupt_table[ vector ];
    70 
    7169  interrupt_table[ vector ] = new_handler;
     70#else
     71  *old_handler = *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10);
     72  *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10) = new_handler;
     73#endif /* M68K_HAS_VBR */
    7274}
    7375
    … …  
    121123#if ( M68K_HAS_BFFFO != 1 )
    122124/*
    123  * Returns log2(x)  0<x<256
     125 * Returns table for duplication of the BFFFO instruction (16 bits only)
    124126 */
    125 const unsigned char __log2table[256] = {
    126     0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    127     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    128     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    129     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    130     6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    131     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    132     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    133     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    134     7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    135     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    136     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    137     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    138     6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    139     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    140     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    141     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0
     127const unsigned char __BFFFOtable[256] = {
     128    8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
     129    3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
     130    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
     131    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
     132    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     133    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     134    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     135    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     136    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     137    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     138    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     139    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     140    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     141    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     142    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     143    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
    142144};
    143145#endif

  • c/src/exec/score/cpu/m68k/cpu.h

    r3652ad35 r38ffa0c  
    147147EXTERN void               *_CPU_Interrupt_stack_low;
    148148EXTERN void               *_CPU_Interrupt_stack_high;
     149      /* points to jsr-exception-table in targets wo/ VBR register */
     150extern char               _VBR[];
    149151
    150152/* constants */
    … …  
    325327#else
    326328
     329/* duplicates BFFFO results for 16 bits (i.e., 15-(_priority) in
     330   _CPU_Priority_Bits_index is not needed), handles the 0 case, and
     331   does not molest _value -- jsg */
     332#ifndef m68000
    327333#define _CPU_Bitfield_Find_first_bit( _value, _output ) \
    328334  { \
    329     extern const unsigned char __log2table[256]; \
     335    extern const unsigned char __BFFFOtable[256]; \
     336    register int dumby; \
    330337    \
    331     asm     ( "   tst.b   %1\n"           /* check for bits in ls byte */ \
    332               "   beq.s   0f\n"           /* branch if no bits set */ \
    333               "   moveq.l #0,%0\n"        /* set up for bits 0..7 */ \
    334               "   andi.w  #0x00ff,%1\n"   /* clear ms byte for add inst */ \
    335               "   bra.s   1f\n"           /* go add */ \
    336               "0: moveq.l #8,%0\n"        /* set up for bits 8..15 */ \
    337               "   lsr.w   #8,%1\n"        /* shift ms byte to ls byte, */ \
    338                                           /*   filling ms byte with 0s */ \
    339               "1: add.b   (%2,%1.w),%0\n" /* add offset for bit pattern */ \
    340                : "=&d" ((_output)) \
    341                : "d" ((_value)), "ao" (__log2table) \
    342                : "cc" ) ; \
    343   }
     338    asm volatile ( "   move.w  %2,%1\n"        \
     339       "   lsr.w   #8,%1\n"        \
     340       "   beq.s   1f\n"           \
     341       "   move.b  (%3,%1.w),%0\n" \
     342       "   extb.l  %0\n"           \
     343       "   bra.s   0f\n"           \
     344       "1: moveq.l #8,%0\n"        \
     345       "   add.b   (%3,%2.w),%0\n" \
     346       "0:\n"                      \
     347       : "=&d" ((_output)), "=&d" ((dumby)) \
     348       : "d" ((_value)), "ao" ((__BFFFOtable)) \
     349       : "cc" ) ; \
     350  }
     351#else
     352#define _CPU_Bitfield_Find_first_bit( _value, _output ) \
     353  { \
     354    extern const unsigned char __BFFFOtable[256]; \
     355    register int dumby; \
     356    \
     357    asm volatile ( "   move.w  %2,%1\n"        \
     358       "   lsr.w   #8,%1\n"        \
     359       "   beq.s   1f\n"           \
     360       "   move.b  (%3,%1.w),%0\n" \
     361       "   and.l   #0x000000ff,%0\n"\
     362       "   bra.s   0f\n"           \
     363       "1: moveq.l #8,%0\n"        \
     364       "   add.b   (%3,%2.w),%0\n" \
     365       "0:\n"                      \
     366       : "=&d" ((_output)), "=&d" ((dumby)) \
     367       : "d" ((_value)), "ao" ((__BFFFOtable)) \
     368       : "cc" ) ; \
     369  }
     370#endif /* m68000 */
    344371
    345372#endif
    … …  
    360387  ( 0x8000 >> (_bit_number) )
    361388
    362 #if ( M68K_HAS_BFFFO == 1 )
    363389#define _CPU_Priority_Bits_index( _priority ) \
    364390  (_priority)
    365 #else
    366 #define _CPU_Priority_Bits_index( _priority ) \
    367   (15 - (_priority))
    368 #endif
    369391
    370392/* end of Priority handler macros */

  • c/src/exec/score/cpu/m68k/cpu_asm.s

    r3652ad35 r38ffa0c  
    102102 */
    103103
     104/*  m68000 notes:
     105 *
     106 *  with this approach, lower interrupts (1-5 for efi68k) may
     107 *  execute twice if a higher priority interrupt is
     108 *  acknowledged before _Thread_Dispatch_disable is
     109 *  increamented and the higher priority interrupt
     110 *  preforms a context switch after executing. The lower
     111 *  priority intterrupt will execute (1) at the end of the
     112 *  higher priority interrupt in the new context if
     113 *  permitted by the new interrupt level mask, and (2) when
     114 *  the original context regains the cpu.
     115 */
     116 
     117#if ( M68K_HAS_VBR == 1)
    104118.set SR_OFFSET,    0                     | Status register offset
    105119.set PC_OFFSET,    2                     | Program Counter offset
    106120.set FVO_OFFSET,   6                     | Format/vector offset
    107 
     121#else
     122.set JSR_OFFSET,   0                     | return address from jsr table
     123.set SR_OFFSET,    4
     124.set PC_OFFSET,    6
     125#endif /* M68K_HAS_VBR */
     126 
    108127.set SAVED,        16                    | space for saved registers
    109128
    … …  
    112131
    113132SYM (_ISR_Handler):
    114         moveml  d0-d1/a0-a1,a7@-    | save d0-d1,a0-a1
    115         addql   #1,SYM (_ISR_Nest_level)       | one nest level deeper
    116         addql   #1,SYM (_Thread_Dispatch_disable_level)
    117                                          | disable multitasking
     133        addql   #1,SYM (_ISR_Nest_level) | one nest level deeper
     134        addql   #1,SYM (_Thread_Dispatch_disable_level) | disable multitasking
     135        moveml  d0-d1/a0-a1,a7@-         | save d0-d1,a0-a1
     136
     137#if ( M68K_HAS_VBR == 0)
     138        movel   a7@(SAVED+JSR_OFFSET),d0 | assume the exception table at 0x0000
     139        addql   #6,d0                    | points to a jump table (jsr) in RAM
     140        subl    #_VBR,d0                 | VBR is the location of the jump table
     141        divs    #3,d0
     142        lsll    #1,d0
     143        extl    d0
     144#else
    118145        movew   a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO
    119         andl    #0x0fff,d0              | d0 = vector offset in vbr
     146        andl    #0x0fff,d0               | d0 = vector offset in vbr
     147#endif
    120148
    121149#if ( M68K_HAS_PREINDEXING == 1 )
    … …  
    123151#else
    124152        movel   # SYM (_ISR_Vector_table),a0   | a0 = base of RTEMS table
    125         addal   d0,a0                  | a0 = address of vector
    126         movel   @(a0),a0               | a0 = address of user routine
    127 #warning "UNTESTED CODE!!!"
    128 #endif
    129 
    130         lsrl    #2,d0                   | d0 = vector number
    131         movel   d0,a7@-                | push vector number
    132         jbsr    a0@                     | invoke the user ISR
    133         addql   #4,a7                   | remove vector number
     153        addal   d0,a0                    | a0 = address of vector
     154        movel   (a0),a0                  | a0 = address of user routine
     155#endif
     156
     157        lsrl    #2,d0                    | d0 = vector number
     158        movel   d0,a7@-                  | push vector number
     159        jbsr    a0@                      | invoke the user ISR
     160        addql   #4,a7                    | remove vector number
    134161
    135162/*
    … …  
    141168SYM (_ISR_Exit):
    142169
    143         subql   #1,SYM (_ISR_Nest_level)       | one less nest level
     170        subql   #1,SYM (_ISR_Nest_level) | one less nest level
    144171        subql   #1,SYM (_Thread_Dispatch_disable_level)
    145172                                         | unnest multitasking
    … …  
    147174
    148175#if ( M68K_HAS_SEPARATE_STACKS == 1 )
    149         movew   #0xf000,d0              | isolate format nibble
     176        movew   #0xf000,d0               | isolate format nibble
    150177        andw    a7@(SAVED+FVO_OFFSET),d0 | get F/VO
    151         cmpiw   #0x1000,d0              | is it a throwaway isf?
     178        cmpiw   #0x1000,d0               | is it a throwaway isf?
    152179        bne     exit                     | NOT outer level, so branch
    153180#endif
    … …  
    168195        movec   msp,a0                   | a0 = master stack pointer
    169196        movew   #0,a0@-                  | push format word
    170         movel   # SYM (_ISR_Dispatch),a0@-    | push return addr
     197        movel   # SYM (_ISR_Dispatch),a0@- | push return addr
    171198        movew   a0@(6+SR_OFFSET),a0@-    | push thread sr
    172199        movec   a0,msp                   | set master stack pointer
    … …  
    179206
    180207exit:   moveml  a7@+,d0-d1/a0-a1         | restore d0-d1,a0-a1
     208#if ( M68K_HAS_VBR == 0)
     209        addql   #4,a7                    | pop vector address
     210#endif /* M68K_HAS_VBR */
    181211        rte                              | return to thread
    182212                                         |   OR _Isr_dispatch
    … …  
    201231        jsr     SYM (_Thread_Dispatch)
    202232        movml   a7@+,d0-d1/a0-a1
    203         rte
    204 
    205 
    206 
    207 
    208 
    209 
    210 
    211 
    212 
    213 
    214 
     233#if ( M68K_HAS_VBR == 0)
     234        addql   #4,a7                    | pop vector address
     235#endif /* M68K_HAS_VBR */
     236        rte

  • c/src/exec/score/cpu/m68k/m68k.h

    r3652ad35 r38ffa0c  
    140140#define M68K_HAS_PREINDEXING     1
    141141
     142#elif defined(m68332)
     143 
     144#define RTEMS_MODEL_NAME         "m68332"
     145#define M68K_HAS_VBR             1
     146#define M68K_HAS_SEPARATE_STACKS 0
     147#define M68K_HAS_FPU             0
     148#define M68K_HAS_BFFFO           0
     149#define M68K_HAS_PREINDEXING     0
     150
    142151#else
    143152
    … …  
    236245  }
    237246#else
    238 #define m68k_get_vbr( _vbr ) _vbr = 0
     247#define m68k_get_vbr( _vbr ) _vbr = (void *)_VBR
    239248#define m68k_set_vbr( _vbr )
    240249#endif

  • c/src/tests/mptests/mp05/init.c

    r3652ad35 r38ffa0c  
    4444    Task_name[Multiprocessing_configuration.node],
    4545    1,
    46     RTEMS_MINIMUM_STACK_SIZE,
     46    RTEMS_MINIMUM_STACK_SIZE * 2,
    4747    RTEMS_TIMESLICE,
    4848    RTEMS_GLOBAL,

  • cpukit/score/cpu/m68k/cpu.c

    r3652ad35 r38ffa0c  
    11/*
    2  *  Motorola MC68020 Dependent Source
     2 *  Motorola MC68xxx Dependent Source
    33 *
    44 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
    … …  
    3333)
    3434{
    35 
    3635  _CPU_Table = *cpu_table;
    37 
    3836}
    3937
    … …  
    6765  m68k_get_vbr( interrupt_table );
    6866
     67#if ( M68K_HAS_VBR == 1)
    6968  *old_handler = interrupt_table[ vector ];
    70 
    7169  interrupt_table[ vector ] = new_handler;
     70#else
     71  *old_handler = *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10);
     72  *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10) = new_handler;
     73#endif /* M68K_HAS_VBR */
    7274}
    7375
    … …  
    121123#if ( M68K_HAS_BFFFO != 1 )
    122124/*
    123  * Returns log2(x)  0<x<256
     125 * Returns table for duplication of the BFFFO instruction (16 bits only)
    124126 */
    125 const unsigned char __log2table[256] = {
    126     0, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    127     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    128     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    129     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    130     6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    131     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    132     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    133     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    134     7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    135     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    136     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    137     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    138     6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    139     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    140     5, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0,
    141     4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0
     127const unsigned char __BFFFOtable[256] = {
     128    8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
     129    3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
     130    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
     131    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
     132    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     133    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     134    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     135    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
     136    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     137    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     138    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     139    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     140    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     141    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     142    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     143    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
    142144};
    143145#endif

  • testsuites/mptests/mp05/init.c

    r3652ad35 r38ffa0c  
    4444    Task_name[Multiprocessing_configuration.node],
    4545    1,
    46     RTEMS_MINIMUM_STACK_SIZE,
     46    RTEMS_MINIMUM_STACK_SIZE * 2,
    4747    RTEMS_TIMESLICE,
    4848    RTEMS_GLOBAL,
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