Changeset 384ba756 in rtems


Ignore:
Timestamp:
Oct 6, 2005, 7:36:41 PM (14 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
4237e5e
Parents:
9a72334
Message:

2005-10-06 Till Straumann <strauman@…>

PR 833/bsps

  • irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable the FPU across the user ISR but DONT save/restore the FPU context. Any use of the FPU fron the user handler (e.g., due to GCC optimizations) result in corruption. The fix results in an exception in such cases (user ISR must explicitely save/enable/restore FPU).
Location:
c/src/lib/libbsp/powerpc
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog

    r9a72334 r384ba756  
     12005-10-06      Till Straumann <strauman@slac.stanford.edu>
     2
     3        PR 833/bsps
     4        * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
     5        the FPU across the user ISR but DONT save/restore the FPU context.
     6        Any use of the FPU fron the user handler (e.g., due to GCC
     7        optimizations) result in corruption. The fix results in an exception
     8        in such cases (user ISR must explicitely save/enable/restore FPU).
     9
    1102005-09-12      Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
    211
  • c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S

    r9a72334 r384ba756  
    1313 *    - store isr nesting level in _ISR_Nest_level rather than
    1414 *      SPRG0 - RTEMS relies on that variable.
     15 *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
     16 *    - DONT enable FP across user ISR since fpregs are never saved!!
    1517 *
    1618 * $Id$
     
    127129     * saved and restored (using FP instructions)
    128130         */
    129 #if (PPC_HAS_FPU == 0)
    130131        ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
    131 #else
    132         ori     r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
    133 #endif
    134132        mtmsr   r3
    135133        SYNC
     
    338336
    339337switch:
     338#if ( PPC_HAS_FPU != 0 )
     339#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
     340#error missing include file???
     341#endif
     342        mfmsr  r4
     343#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
     344        /* if the executing thread has FP enabled propagate
     345         * this now so _Thread_Dispatch can save/restore the FPREGS
     346         * NOTE: it is *crucial* to disable the FPU across the
     347         *       user ISR [independent of using the 'deferred'
     348         *       strategy or not]. We don't save FP regs across
     349         *       the user ISR and hence we prefer an exception to
     350         *       be raised rather than experiencing corruption.
     351         */
     352        lwz    r3, SRR1_FRAME_OFFSET(r1)
     353        rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
     354#else
     355        ori    r4, r4, MSR_FP
     356#endif
     357        mtmsr  r4
     358#endif
    340359        bl      SYM (_Thread_Dispatch)
    341360
  • c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog

    r9a72334 r384ba756  
     12005-10-06      Till Straumann <strauman@slac.stanford.edu>
     2
     3        PR 833/bsps
     4        * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
     5        the FPU across the user ISR but DONT save/restore the FPU context.
     6        Any use of the FPU fron the user handler (e.g., due to GCC
     7        optimizations) result in corruption. The fix results in an exception
     8        in such cases (user ISR must explicitely save/enable/restore FPU).
     9
    1102005-09-19      Ralf Corsepius <ralf.corsepius@rtems.org>
    211
  • c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S

    r9a72334 r384ba756  
    1212 *  Modifications to store nesting level in global _ISR_Nest_level
    1313 *  variable instead of SPRG0.  Andy Dachs <a.dachs@sstl.co.uk>
     14 *
     15 *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
     16 *    - DONT enable FP across user ISR since fpregs are never saved!!
    1417 *
    1518 * $Id$
     
    9396         * saved and restored (using FP instructions)
    9497         */
    95 #if (PPC_HAS_FPU == 0)
    9698        ori     r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/
    97 #else
    98         ori     r3, r3, MSR_RI | /*MSR_IR | MSR_DR |*/ MSR_FP
    99 #endif
    10099        mtmsr   r3
    101100        SYNC
     
    298297
    299298switch:
     299#if ( PPC_HAS_FPU != 0 )
     300#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
     301#error missing include file???
     302#endif
     303        mfmsr  r4
     304#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
     305        /* if the executing thread has FP enabled propagate
     306         * this now so _Thread_Dispatch can save/restore the FPREGS
     307         * NOTE: it is *crucial* to disable the FPU across the
     308         *       user ISR [independent of using the 'deferred'
     309         *       strategy or not]. We don't save FP regs across
     310         *       the user ISR and hence we prefer an exception to
     311         *       be raised rather than experiencing corruption.
     312         */
     313        lwz    r3, SRR1_FRAME_OFFSET(r1)
     314        rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
     315#else
     316        ori    r4, r4, MSR_FP
     317#endif
     318        mtmsr  r4
     319#endif
    300320        bl              SYM (_Thread_Dispatch)
    301321
  • c/src/lib/libbsp/powerpc/shared/ChangeLog

    r9a72334 r384ba756  
     12005-10-06      Till Straumann <strauman@slac.stanford.edu>
     2
     3        PR 833/bsps
     4        * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
     5        the FPU across the user ISR but DONT save/restore the FPU context.
     6        Any use of the FPU fron the user handler (e.g., due to GCC
     7        optimizations) result in corruption. The fix results in an exception
     8        in such cases (user ISR must explicitely save/enable/restore FPU).
     9
    1102005-09-16      richard.campbell@OARCorp.com
    211
  • c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S

    r9a72334 r384ba756  
    1313 *    - store isr nesting level in _ISR_Nest_level rather than
    1414 *      SPRG0 - RTEMS relies on that variable.
     15 *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
     16 *    - DONT enable FP across ISR since fpregs are not saved!!
     17 *      FPU is used by Thread_Dispatch however...
    1518 *
    1619 * $Id$
     
    9598     * saved and restored (using FP instructions)
    9699         */
    97 #if (PPC_HAS_FPU == 0)
    98100        ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
    99 #else
    100         ori     r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
    101 #endif
    102101        mtmsr   r3
    103102        SYNC
     
    302301
    303302switch:
     303#if ( PPC_HAS_FPU != 0 )
     304#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
     305#error missing include file???
     306#endif
     307        mfmsr  r4
     308#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
     309        /* if the executing thread has FP enabled propagate
     310         * this now so _Thread_Dispatch can save/restore the FPREGS
     311         * NOTE: it is *crucial* to disable the FPU across the
     312         *       user ISR [independent of using the 'deferred'
     313         *       strategy or not]. We don't save FP regs across
     314         *       the user ISR and hence we prefer an exception to
     315         *       be raised rather than experiencing corruption.
     316         */
     317        lwz    r3, SRR1_FRAME_OFFSET(r1)
     318        rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
     319#else
     320        ori    r4, r4, MSR_FP
     321#endif
     322        mtmsr  r4
     323#endif
    304324        bl      SYM (_Thread_Dispatch)
    305325
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