Changeset 368c27c in rtems


Ignore:
Timestamp:
05/17/05 15:09:33 (18 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
a4ce29f
Parents:
2c24794
Message:

2005-05-17 Jennifer Averett <jennifer.averett@…>

  • mpc5xx/irq/irq.c, mpc5xx/irq/irq.h, mpc8xx/console-generic/console-generic.c: Modified to use rtems/irq.h.
Location:
c/src/lib/libcpu/powerpc
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/ChangeLog

    r2c24794 r368c27c  
     12005-05-17      Jennifer Averett <jennifer.averett@oarcorp.com>
     2
     3        * mpc5xx/irq/irq.c, mpc5xx/irq/irq.h,
     4        mpc8xx/console-generic/console-generic.c: Modified to use
     5        rtems/irq.h.
     6
    172005-05-11      Ralf Corsepius <ralf.corsepius@rtems.org>
    28
  • c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c

    r2c24794 r368c27c  
    2626
    2727/*
    28  * Convert an rtems_irq_symbolic_name constant to an interrupt level
     28 * Convert an rtems_irq_number constant to an interrupt level
    2929 * suitable for programming into an I/O device's interrupt level field.
    3030 */
    3131 
    32 int CPU_irq_level_from_symbolic_name(const rtems_irq_symbolic_name name)
     32int CPU_irq_level_from_symbolic_name(const rtems_irq_number name)
    3333{
    3434  if (CPU_USIU_EXT_IRQ_0 <= name && name <= CPU_USIU_INT_IRQ_7)
     
    5656 * Check if symbolic IRQ name is an USIU IRQ
    5757 */
    58 static inline int is_usiu_irq(const rtems_irq_symbolic_name irqLine)
     58static inline int is_usiu_irq(const rtems_irq_number irqLine)
    5959{
    6060  return (((int) irqLine <= CPU_USIU_IRQ_MAX_OFFSET) &&
     
    6666 * Check if symbolic IRQ name is an UIMB IRQ
    6767 */
    68 static inline int is_uimb_irq(const rtems_irq_symbolic_name irqLine)
     68static inline int is_uimb_irq(const rtems_irq_number irqLine)
    6969{
    7070  return (((int) irqLine <= CPU_UIMB_IRQ_MAX_OFFSET) &&
     
    7676 * Check if symbolic IRQ name is a Processor IRQ
    7777 */
    78 static inline int is_proc_irq(const rtems_irq_symbolic_name irqLine)
     78static inline int is_proc_irq(const rtems_irq_number irqLine)
    7979{
    8080  return (((int) irqLine <= CPU_PROC_IRQ_MAX_OFFSET) &&
     
    141141}
    142142
    143 int CPU_irq_enable_at_uimb(const rtems_irq_symbolic_name irqLine)
     143int CPU_irq_enable_at_uimb(const rtems_irq_number irqLine)
    144144{
    145145  if (!is_uimb_irq(irqLine))
     
    148148}
    149149
    150 int CPU_irq_disable_at_uimb(const rtems_irq_symbolic_name irqLine)
     150int CPU_irq_disable_at_uimb(const rtems_irq_number irqLine)
    151151{
    152152  if (!is_uimb_irq(irqLine))
     
    155155}
    156156
    157 int CPU_irq_enabled_at_uimb(const rtems_irq_symbolic_name irqLine)
     157int CPU_irq_enabled_at_uimb(const rtems_irq_number irqLine)
    158158{
    159159  if (!is_uimb_irq(irqLine))
     
    162162}
    163163
    164 int CPU_irq_enable_at_usiu(const rtems_irq_symbolic_name irqLine)
     164int CPU_irq_enable_at_usiu(const rtems_irq_number irqLine)
    165165{
    166166  int usiu_irq_index;
     
    176176}
    177177
    178 int CPU_irq_disable_at_usiu(const rtems_irq_symbolic_name irqLine)
     178int CPU_irq_disable_at_usiu(const rtems_irq_number irqLine)
    179179{
    180180  int usiu_irq_index;
     
    190190}
    191191
    192 int CPU_irq_enabled_at_usiu(const rtems_irq_symbolic_name irqLine)
     192int CPU_irq_enabled_at_usiu(const rtems_irq_number irqLine)
    193193{
    194194  int usiu_irq_index;
  • c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.h

    r2c24794 r368c27c  
    2929#define _LIBCPU_IRQ_H
    3030
     31#include <rtems/irq.h>
    3132
    3233#define CPU_ASM_IRQ_VECTOR_BASE 0x0
     
    4041 */
    4142
    42 typedef enum {
    4343  /*
    4444   * Base vector for our USIU IRQ handlers.
    4545   */
    46   CPU_USIU_VECTOR_BASE          = CPU_ASM_IRQ_VECTOR_BASE,
     46#define CPU_USIU_VECTOR_BASE    (CPU_ASM_IRQ_VECTOR_BASE)
    4747  /*
    4848   * USIU IRQ handler related definitions
    4949   */
    50   CPU_USIU_IRQ_COUNT            = 16, /* 16 reserved but in the future... */
    51   CPU_USIU_IRQ_MIN_OFFSET       = 0,
    52   CPU_USIU_IRQ_MAX_OFFSET       = CPU_USIU_IRQ_MIN_OFFSET + CPU_USIU_IRQ_COUNT - 1,
     50#define CPU_USIU_IRQ_COUNT      (16) /* 16 reserved but in the future... */
     51#define CPU_USIU_IRQ_MIN_OFFSET (0)
     52#define CPU_USIU_IRQ_MAX_OFFSET (CPU_USIU_IRQ_MIN_OFFSET + CPU_USIU_IRQ_COUNT - 1)
    5353  /*
    5454   * UIMB IRQ handlers related definitions
    5555   */
    56   CPU_UIMB_IRQ_COUNT            = 32 - 8, /* first 8 overlap USIU */
    57   CPU_UIMB_IRQ_MIN_OFFSET       = CPU_USIU_IRQ_COUNT + CPU_USIU_VECTOR_BASE,
    58   CPU_UIMB_IRQ_MAX_OFFSET       = CPU_UIMB_IRQ_MIN_OFFSET + CPU_UIMB_IRQ_COUNT - 1,
     56#define CPU_UIMB_IRQ_COUNT      (32 - 8) /* first 8 overlap USIU */
     57#define CPU_UIMB_IRQ_MIN_OFFSET (CPU_USIU_IRQ_COUNT + CPU_USIU_VECTOR_BASE)
     58#define CPU_UIMB_IRQ_MAX_OFFSET (CPU_UIMB_IRQ_MIN_OFFSET + CPU_UIMB_IRQ_COUNT - 1)
    5959  /*
    6060   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
    6161   * handler might be connected
    6262   */
    63   CPU_PROC_IRQ_COUNT            = 1,
    64   CPU_PROC_IRQ_MIN_OFFSET       = CPU_UIMB_IRQ_MAX_OFFSET + 1,
    65   CPU_PROC_IRQ_MAX_OFFSET       = CPU_PROC_IRQ_MIN_OFFSET + CPU_PROC_IRQ_COUNT - 1,
     63#define CPU_PROC_IRQ_COUNT      (1)
     64#define CPU_PROC_IRQ_MIN_OFFSET (CPU_UIMB_IRQ_MAX_OFFSET + 1)
     65#define CPU_PROC_IRQ_MAX_OFFSET (CPU_PROC_IRQ_MIN_OFFSET + CPU_PROC_IRQ_COUNT - 1)
    6666  /*
    6767   * Summary
    6868   */
    69   CPU_IRQ_COUNT                 = CPU_PROC_IRQ_MAX_OFFSET + 1,
    70   CPU_MIN_OFFSET                = CPU_USIU_IRQ_MIN_OFFSET,
    71   CPU_MAX_OFFSET                = CPU_PROC_IRQ_MAX_OFFSET,
     69#define CPU_IRQ_COUNT           (CPU_PROC_IRQ_MAX_OFFSET + 1)
     70#define CPU_MIN_OFFSET          (CPU_USIU_IRQ_MIN_OFFSET)
     71#define CPU_MAX_OFFSET          (CPU_PROC_IRQ_MAX_OFFSET)
    7272  /*
    7373   * USIU IRQ symbolic name definitions.
    7474   */         
    75   CPU_USIU_EXT_IRQ_0            = CPU_USIU_IRQ_MIN_OFFSET,
    76   CPU_USIU_INT_IRQ_0,
     75#define CPU_USIU_EXT_IRQ_0      (CPU_USIU_IRQ_MIN_OFFSET + 0)
     76#define CPU_USIU_INT_IRQ_0      (CPU_USIU_IRQ_MIN_OFFSET + 1)
    7777
    78   CPU_USIU_EXT_IRQ_1,
    79   CPU_USIU_INT_IRQ_1,
     78#define CPU_USIU_EXT_IRQ_1      (CPU_USIU_IRQ_MIN_OFFSET + 2)
     79#define CPU_USIU_INT_IRQ_1      (CPU_USIU_IRQ_MIN_OFFSET + 3)
    8080
    81   CPU_USIU_EXT_IRQ_2,
    82   CPU_USIU_INT_IRQ_2,
     81#define CPU_USIU_EXT_IRQ_2      (CPU_USIU_IRQ_MIN_OFFSET + 4)
     82#define CPU_USIU_INT_IRQ_2      (CPU_USIU_IRQ_MIN_OFFSET + 5)
    8383 
    84   CPU_USIU_EXT_IRQ_3,
    85   CPU_USIU_INT_IRQ_3,
     84#define CPU_USIU_EXT_IRQ_3      (CPU_USIU_IRQ_MIN_OFFSET + 6)
     85#define CPU_USIU_INT_IRQ_3      (CPU_USIU_IRQ_MIN_OFFSET + 7)
    8686 
    87   CPU_USIU_EXT_IRQ_4,
    88   CPU_USIU_INT_IRQ_4,
     87#define CPU_USIU_EXT_IRQ_4      (CPU_USIU_IRQ_MIN_OFFSET + 8)
     88#define CPU_USIU_INT_IRQ_4      (CPU_USIU_IRQ_MIN_OFFSET + 9)
    8989
    90   CPU_USIU_EXT_IRQ_5,
    91   CPU_USIU_INT_IRQ_5,
     90#define CPU_USIU_EXT_IRQ_5      (CPU_USIU_IRQ_MIN_OFFSET + 10)
     91#define CPU_USIU_INT_IRQ_5      (CPU_USIU_IRQ_MIN_OFFSET + 11)
    9292 
    93   CPU_USIU_EXT_IRQ_6,
    94   CPU_USIU_INT_IRQ_6,
     93#define CPU_USIU_EXT_IRQ_6      (CPU_USIU_IRQ_MIN_OFFSET + 12)
     94#define CPU_USIU_INT_IRQ_6      (CPU_USIU_IRQ_MIN_OFFSET + 13)
    9595 
    96   CPU_USIU_EXT_IRQ_7,
    97   CPU_USIU_INT_IRQ_7,
     96#define CPU_USIU_EXT_IRQ_7      (CPU_USIU_IRQ_MIN_OFFSET + 14)
     97#define CPU_USIU_INT_IRQ_7      (CPU_USIU_IRQ_MIN_OFFSET + 15)
    9898
    9999  /*
    100100   * Symbolic names for UISU interrupt sources.
    101101   */
    102   CPU_PERIODIC_TIMER            = CPU_USIU_INT_IRQ_6,
    103   CPU_UIMB_INTERRUPT            = CPU_USIU_INT_IRQ_7,
     102#define CPU_PERIODIC_TIMER      (CPU_USIU_INT_IRQ_6)
     103#define CPU_UIMB_INTERRUPT      (CPU_USIU_INT_IRQ_7)
    104104             
    105105  /*
     
    108108   * the USIU pending register rather than the UIMB pending register.
    109109   */
    110   CPU_UIMB_IRQ_0                = CPU_USIU_INT_IRQ_0,
    111   CPU_UIMB_IRQ_1                = CPU_USIU_INT_IRQ_1,
    112   CPU_UIMB_IRQ_2                = CPU_USIU_INT_IRQ_2,
    113   CPU_UIMB_IRQ_3                = CPU_USIU_INT_IRQ_3,
    114   CPU_UIMB_IRQ_4                = CPU_USIU_INT_IRQ_4,
    115   CPU_UIMB_IRQ_5                = CPU_USIU_INT_IRQ_5,
    116   CPU_UIMB_IRQ_6                = CPU_USIU_INT_IRQ_6,
    117   CPU_UIMB_IRQ_7                = CPU_USIU_INT_IRQ_7,
     110#define CPU_UIMB_IRQ_0          (CPU_USIU_INT_IRQ_0)
     111#define CPU_UIMB_IRQ_1          (CPU_USIU_INT_IRQ_1)
     112#define CPU_UIMB_IRQ_2          (CPU_USIU_INT_IRQ_2)
     113#define CPU_UIMB_IRQ_3          (CPU_USIU_INT_IRQ_3)
     114#define CPU_UIMB_IRQ_4          (CPU_USIU_INT_IRQ_4)
     115#define CPU_UIMB_IRQ_5          (CPU_USIU_INT_IRQ_5)
     116#define CPU_UIMB_IRQ_6          (CPU_USIU_INT_IRQ_6)
     117#define CPU_UIMB_IRQ_7          (CPU_USIU_INT_IRQ_7)
    118118
    119   CPU_UIMB_IRQ_8                = CPU_UIMB_IRQ_MIN_OFFSET,
    120   CPU_UIMB_IRQ_9,
    121   CPU_UIMB_IRQ_10,
    122   CPU_UIMB_IRQ_11,
    123   CPU_UIMB_IRQ_12,
    124   CPU_UIMB_IRQ_13,
    125   CPU_UIMB_IRQ_14,
    126   CPU_UIMB_IRQ_15,
    127   CPU_UIMB_IRQ_16,
    128   CPU_UIMB_IRQ_17,
    129   CPU_UIMB_IRQ_18,
    130   CPU_UIMB_IRQ_19,
    131   CPU_UIMB_IRQ_20,
    132   CPU_UIMB_IRQ_21,
    133   CPU_UIMB_IRQ_22,
    134   CPU_UIMB_IRQ_23,
    135   CPU_UIMB_IRQ_24,
    136   CPU_UIMB_IRQ_25,
    137   CPU_UIMB_IRQ_26,
    138   CPU_UIMB_IRQ_27,
    139   CPU_UIMB_IRQ_28,
    140   CPU_UIMB_IRQ_29,
    141   CPU_UIMB_IRQ_30,
    142   CPU_UIMB_IRQ_31,
    143   
     119#define CPU_UIMB_IRQ_8          (CPU_UIMB_IRQ_MIN_OFFSET+ 0)
     120#define CPU_UIMB_IRQ_9          (CPU_UIMB_IRQ_MIN_OFFSET+ 1)
     121#define CPU_UIMB_IRQ_10         (CPU_UIMB_IRQ_MIN_OFFSET+ 2)
     122#define CPU_UIMB_IRQ_11         (CPU_UIMB_IRQ_MIN_OFFSET+ 3)
     123#define CPU_UIMB_IRQ_12         (CPU_UIMB_IRQ_MIN_OFFSET+ 4)
     124#define CPU_UIMB_IRQ_13         (CPU_UIMB_IRQ_MIN_OFFSET+ 5)
     125#define CPU_UIMB_IRQ_14         (CPU_UIMB_IRQ_MIN_OFFSET+ 6)
     126#define CPU_UIMB_IRQ_15         (CPU_UIMB_IRQ_MIN_OFFSET+ 7)
     127#define CPU_UIMB_IRQ_16         (CPU_UIMB_IRQ_MIN_OFFSET+ 8)
     128#define CPU_UIMB_IRQ_17         (CPU_UIMB_IRQ_MIN_OFFSET+ 9)
     129#define CPU_UIMB_IRQ_18         (CPU_UIMB_IRQ_MIN_OFFSET+ 0)
     130#define CPU_UIMB_IRQ_19         (CPU_UIMB_IRQ_MIN_OFFSET+11)
     131#define CPU_UIMB_IRQ_20         (CPU_UIMB_IRQ_MIN_OFFSET+12)
     132#define CPU_UIMB_IRQ_21         (CPU_UIMB_IRQ_MIN_OFFSET+13)
     133#define CPU_UIMB_IRQ_22         (CPU_UIMB_IRQ_MIN_OFFSET+14)
     134#define CPU_UIMB_IRQ_23         (CPU_UIMB_IRQ_MIN_OFFSET+15)
     135#define CPU_UIMB_IRQ_24         (CPU_UIMB_IRQ_MIN_OFFSET+16)
     136#define CPU_UIMB_IRQ_25         (CPU_UIMB_IRQ_MIN_OFFSET+17)
     137#define CPU_UIMB_IRQ_26         (CPU_UIMB_IRQ_MIN_OFFSET+18)
     138#define CPU_UIMB_IRQ_27         (CPU_UIMB_IRQ_MIN_OFFSET+19)
     139#define CPU_UIMB_IRQ_28         (CPU_UIMB_IRQ_MIN_OFFSET+20)
     140#define CPU_UIMB_IRQ_29         (CPU_UIMB_IRQ_MIN_OFFSET+21)
     141#define CPU_UIMB_IRQ_30         (CPU_UIMB_IRQ_MIN_OFFSET+22)
     142#define CPU_UIMB_IRQ_31         (CPU_UIMB_IRQ_MIN_OFFSET+23)
     143 
    144144  /*
    145145   * Symbolic names for UIMB interrupt sources.
    146146   */
    147   CPU_IRQ_SCI                   = CPU_UIMB_IRQ_5,
     147#define CPU_IRQ_SCI             (CPU_UIMB_IRQ_5)
    148148
    149149  /*
    150150   * Processor exceptions handled as rtems IRQ symbolic name definitions.
    151151   */
    152   CPU_DECREMENTER               = CPU_PROC_IRQ_MIN_OFFSET
    153      
    154 }rtems_irq_symbolic_name;
     152#define CPU_DECREMENTER         (CPU_PROC_IRQ_MIN_OFFSET)
    155153
    156154/*
    157  * Convert an rtems_irq_symbolic_name constant to an interrupt level
     155 * Convert an rtems_irq_number constant to an interrupt level
    158156 * suitable for programming into an I/O device's interrupt level field.
    159157 */
    160 int CPU_irq_level_from_symbolic_name(const rtems_irq_symbolic_name name);
    161 
    162 /*
    163  * Type definition for RTEMS managed interrupts
    164  */
    165 typedef unsigned char  rtems_irq_prio;
    166 struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
    167 
    168 typedef void *rtems_irq_hdl_param;
    169 typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
    170 typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
    171 typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
    172 typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
    173 
    174 typedef struct __rtems_irq_connect_data__ {
    175   /*
    176    * IRQ line
    177    */
    178   rtems_irq_symbolic_name       name;
    179   /*
    180    * Handler. See comment on handler properties below in function prototype.
    181    */
    182   rtems_irq_hdl                 hdl;
    183   /*
    184    * Handler handle to store private data
    185    */
    186    rtems_irq_hdl_param          handle;
    187   /*
    188    * Function for enabling interrupts at device level (ONLY!).
    189    * The CPU code will automatically enable it at USIU level and UIMB level.
    190    * RATIONALE : anyway such code has to exist in current driver code.
    191    * It is usually called immediately AFTER connecting the interrupt handler.
    192    * RTEMS may well need such a function when restoring normal interrupt
    193    * processing after a debug session.
    194    *
    195    */
    196     rtems_irq_enable            on;     
    197   /*
    198    * Function for disabling interrupts at device level (ONLY!).
    199    * The code will disable it at USIU and UIMB level. RATIONALE : anyway
    200    * such code has to exist for clean shutdown. It is usually called
    201    * BEFORE disconnecting the interrupt. RTEMS may well need such
    202    * a function when disabling normal interrupt processing for
    203    * a debug session. May well be a NOP function.
    204    */
    205   rtems_irq_disable             off;
    206   /*
    207    * Function enabling to know what interrupt may currently occur
    208    * if someone manipulates the USIU and UIMB interrupt mask without care...
    209    */
    210   rtems_irq_is_enabled          isOn;
    211 }rtems_irq_connect_data;
    212 
    213 typedef struct {
    214   /*
    215    * size of all the table fields (*Tbl) described below.
    216    */
    217   unsigned int                  irqNb;
    218   /*
    219    * Default handler used when disconnecting interrupts.
    220    */
    221   rtems_irq_connect_data        defaultEntry;
    222   /*
    223    * Table containing initials/current value.
    224    */
    225   rtems_irq_connect_data*       irqHdlTbl;
    226   /*
    227    * actual value of CPU_USIU_IRQ_VECTOR_BASE...
    228    */
    229   rtems_irq_symbolic_name       irqBase;
    230   /*
    231    * software priorities associated with interrupts.
    232    * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
    233    * interrupt handler hdl connected for interrupt name i
    234    * will  not be interrupted by the handler connected for interrupt j
    235    * The interrupt source  will be physically masked at USIU and UIMB level.
    236    */
    237   rtems_irq_prio*               irqPrioTbl;
    238 }rtems_irq_global_settings;
    239 
     158int CPU_irq_level_from_symbolic_name(const rtems_irq_number name);
    240159
    241160/*-------------------------------------------------------------------------+
     
    243162+--------------------------------------------------------------------------*/
    244163
    245 #if 0
    246 /*
    247  * -------------------- MPC5xx USIU Management Routines -----------------
    248  */
    249 /*
    250  * Function to disable a particular irq at USIU level.  After calling
    251  * this function, even if the device asserts the interrupt line it will
    252  * not be propagated further to the processor
    253  */
    254 int CPU_irq_disable_at_usiu     (const rtems_irq_symbolic_name irqLine);
    255 /*
    256  * Function to enable a particular irq at USIU level.  After calling
    257  * this function, if the device asserts the interrupt line it will
    258  * be propagated further to the processor
    259  */
    260 int CPU_irq_enable_at_usiu      (const rtems_irq_symbolic_name irqLine);
    261 /*
    262  * Function to acknowledge a particular irq at USIU level.  After calling
    263  * this function, if a device asserts an enabled interrupt line it will
    264  * be propagated further to the processor. Mainly useful for people
    265  * writing raw handlers as this is automagically done for rtems managed
    266  * handlers.
    267  */
    268 int CPU_irq_ack_at_siu          (const rtems_irq_symbolic_name irqLine);
    269 /*
    270  * function to check if a particular irq is enabled at USIU level.
    271  */
    272 int CPU_irq_enabled_at_siu      (const rtems_irq_symbolic_name irqLine);
    273 
    274 #endif
    275 
    276 /*
    277  * ------------ RTEMS Single Irq Handler Management Routines ----------------
    278  */
    279 /*
    280  * Function to connect a particular irq handler. This handler will NOT be
    281  * called directly as the result of the corresponding interrupt. Instead, a
    282  * RTEMS irq prologue will be called that will :
    283  *
    284  *      1) save the C scratch registers,
    285  *      2) switch to a interrupt stack if the interrupt is not nested,
    286  *      4) modify them to disable the current interrupt at  USIU level (and
    287  *         maybe others depending on software priorities)
    288  *      5) aknowledge the USIU',
    289  *      6) demask the processor,
    290  *      7) call the application handler
    291  *
    292  * As a result the hdl function provided
    293  *
    294  *      a) can perfectly be written is C,
    295  *      b) may also well directly call the part of the RTEMS API that can be
    296  *         used from interrupt level,
    297  *      c) It only responsible for handling the jobs that need to be done at
    298  *         the device level including (aknowledging/re-enabling the
    299  *         interrupt at device, level, getting the data,...)
    300  *
    301  *      When returning from the function, the following will be performed by
    302  *      the RTEMS irq epilogue :
    303  *
    304  *      1) masks the interrupts again,
    305  *      2) restore the original USIU interrupt masks
    306  *      3) switch back on the orinal stack if needed,
    307  *      4) perform rescheduling when necessary,
    308  *      5) restore the C scratch registers...
    309  *      6) restore initial execution flow
    310  *
    311  */
    312 int CPU_install_rtems_irq_handler       (const rtems_irq_connect_data*);
    313 /*
    314  * Function to connect an RTEMS irq handler for ptr->name.
    315  */
    316 int CPU_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
    317 /*
    318  * Function to get the RTEMS irq handler for ptr->name.
    319  */
    320 int CPU_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
    321 /*
    322  * Function to disconnect the RTEMS irq handler for ptr->name.  This
    323  * function checks that the value given is the current one for safety
    324  * reason.  The user can use the previous function to get it.
    325  */
    326 
    327 /*
    328  * ------------ RTEMS Global Irq Handler Management Routines ----------------
    329  */
    330 /*
    331  * (Re) Initialize the RTEMS interrupt management.
    332  *
    333  * The result of calling this function will be the same as if each
    334  * individual handler (config->irqHdlTbl[i].hdl) different from
    335  * "config->defaultEntry.hdl" has been individualy connected via
    336  *
    337  *      CPU_install_rtems_irq_handler(&config->irqHdlTbl[i])
    338  *
    339  * and each handler currently equal to config->defaultEntry.hdl
    340  * has been previously disconnected via
    341  *
    342  *       CPU_remove_rtems_irq_handler (&config->irqHdlTbl[i])
    343  *
    344  * This is to say that all information given will be used and not just
    345  * only the space.
    346  *
    347  * CAUTION : the various table address contained in config will be used
    348  *           directly by the interrupt mangement code in order to save
    349  *           data size so they must stay valid after the call => they should
    350  *           not be modified or declared on a stack.
    351  */
    352 
    353 int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config);
    354 /*
    355  * (Re) get info on current RTEMS interrupt management.
    356  */
    357 int CPU_rtems_irq_mngt_get(rtems_irq_global_settings**);
    358  
    359164extern void CPU_rtems_irq_mng_init(unsigned cpuId);
    360165
  • c/src/lib/libcpu/powerpc/mpc8xx/console-generic/console-generic.c

    r2c24794 r368c27c  
    5757#include <rtems/bspIo.h>   /* for printk */
    5858
    59 int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine);
     59int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine);
    6060extern rtems_cpu_table Cpu_table;
    6161
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