Changeset 3652ad35 in rtems for c/src/exec/score
- Timestamp:
- 09/19/95 14:53:29 (28 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 38ffa0c
- Parents:
- b3ac6a8d
- Location:
- c/src/exec/score
- Files:
-
- 7 added
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/hppa1.1/cpu.c
rb3ac6a8d r3652ad35 194 194 hppa_external_interrupt_initialize(void) 195 195 { 196 hppa_rtems_isr_entry ignore ;196 hppa_rtems_isr_entry ignore = 0; 197 197 198 198 /* mark them all unused */ … … 202 202 203 203 /* install the external interrupt handler */ 204 rtems_interrupt_catch((rtems_isr_entry) hppa_external_interrupt, 205 HPPA_INTERRUPT_EXTERNAL_INTERRUPT, &ignore) ; 204 _CPU_ISR_install_vector( 205 HPPA_INTERRUPT_EXTERNAL_INTERRUPT, 206 (proc_ptr)hppa_external_interrupt, 207 (proc_ptr *)ignore 208 ); 206 209 } 207 210 -
c/src/exec/score/cpu/hppa1.1/cpu_asm.s
rb3ac6a8d r3652ad35 25 25 # suitability of this software for any purpose. 26 26 # 27 *$Id$27 # $Id$ 28 28 # 29 29 -
c/src/exec/score/cpu/hppa1.1/hppa.h
rb3ac6a8d r3652ad35 637 637 638 638 #define EMIT_SET_CONTROL(name, reg) \ 639 static __inline__ unsigned int\639 static __inline__ void \ 640 640 set_ ## name (unsigned int new_value) \ 641 641 { \ -
c/src/exec/score/cpu/hppa1.1/rtems.s
rb3ac6a8d r3652ad35 15 15 */ 16 16 17 #include <rtems/ hppa.h>17 #include <rtems/core/hppa.h> 18 18 #include <rtems/core/cpu_asm.h> 19 19 -
c/src/exec/score/cpu/i386/cpu.c
rb3ac6a8d r3652ad35 35 35 { 36 36 register unsigned16 fp_status asm ("ax"); 37 register unsigned8*fp_context;37 register void *fp_context; 38 38 39 39 _CPU_Table = *cpu_table; … … 57 57 if ( fp_status == 0 ) { 58 58 59 fp_context = _CPU_Null_fp_context;59 fp_context = &_CPU_Null_fp_context; 60 60 61 61 asm volatile( "fsave (%0)" : "=r" (fp_context) -
c/src/exec/score/cpu/i386/cpu.h
rb3ac6a8d r3652ad35 148 148 /* 149 149 * Minimum size of a thread's stack. 150 * 151 * NOTE: 256 bytes is probably too low in most cases. 152 */ 153 154 #define CPU_STACK_MINIMUM_SIZE 256 150 */ 151 152 #define CPU_STACK_MINIMUM_SIZE 1024 155 153 156 154 /* … … 233 231 #define _CPU_Context_Initialize_fp( _fp_area ) \ 234 232 { \ 235 unsigned32 *_source = (unsigned32 *) _CPU_Null_fp_context; \236 unsigned32 *_destination = (unsigned32 *)*(_fp_area); \233 unsigned32 *_source = (unsigned32 *) &_CPU_Null_fp_context; \ 234 unsigned32 *_destination = *(_fp_area); \ 237 235 unsigned32 _index; \ 238 236 \ -
c/src/exec/score/cpu/i386/i386.h
rb3ac6a8d r3652ad35 171 171 register unsigned32 _eflags = 0; \ 172 172 \ 173 asm volatile ( "push %0; \174 pop f" \173 asm volatile ( "pushf ; \ 174 pop %0" \ 175 175 : "=r" ((_eflags)) : "0" ((_eflags)) \ 176 176 ); \ -
c/src/exec/score/cpu/i960/cpu.h
rb3ac6a8d r3652ad35 180 180 181 181 #define CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK \ 182 ( 4096 -CPU_STACK_MINIMUM_SIZE)182 (CPU_STACK_MINIMUM_SIZE) 183 183 184 184 /* … … 194 194 */ 195 195 196 #define CPU_STACK_MINIMUM_SIZE 1024196 #define CPU_STACK_MINIMUM_SIZE 2048 197 197 198 198 /* -
c/src/exec/score/cpu/m68k/cpu.h
rb3ac6a8d r3652ad35 178 178 /* 179 179 * Minimum size of a thread's stack. 180 * 181 * NOTE: 256 bytes is probably too low in most cases. 182 */ 183 184 #define CPU_STACK_MINIMUM_SIZE 256 180 */ 181 182 #define CPU_STACK_MINIMUM_SIZE 1024 185 183 186 184 /* -
c/src/exec/score/cpu/unix/cpu.c
rb3ac6a8d r3652ad35 1 1 /* 2 * HP PA-RISC CPUDependent Source2 * UNIX Simulator Dependent Source 3 3 * 4 4 * … … 19 19 #include <rtems/system.h> 20 20 #include <rtems/core/isr.h> 21 #include <rtems/core/interr.h> 21 22 22 23 #include <stdio.h> … … 170 171 171 172 _CPU_ISR_Set_level( 0 ); 172 setjmp( _CPU_Context_Default_with_ISRs_enabled.regs ); 173 sigprocmask( 174 SIG_SETMASK, /* ignored when second arg is NULL */ 175 0, 176 &_CPU_Context_Default_with_ISRs_enabled.isr_level 173 _CPU_Context_switch( 174 &_CPU_Context_Default_with_ISRs_enabled, 175 &_CPU_Context_Default_with_ISRs_enabled 177 176 ); 178 177 179 178 _CPU_ISR_Set_level( 1 ); 180 setjmp( _CPU_Context_Default_with_ISRs_disabled.regs ); 181 sigprocmask( 182 SIG_SETMASK, /* ignored when second arg is NULL */ 183 0, 184 &_CPU_Context_Default_with_ISRs_disabled.isr_level 179 _CPU_Context_switch( 180 &_CPU_Context_Default_with_ISRs_disabled, 181 &_CPU_Context_Default_with_ISRs_disabled 185 182 ); 186 187 183 } 188 184 … … 192 188 */ 193 189 190 sigset_t GET_old_mask; 191 194 192 unsigned32 _CPU_ISR_Get_level( void ) 195 193 { 196 sigset_t sigset; 197 198 sigprocmask( 0, 0, &sigset ); 199 200 /* 201 * This is an educated guess based on ONLY ONE of the signals we 202 * disable/enable to mask ISRs. 203 */ 204 205 if ( sigismember( &sigset, SIGUSR1 ) ) 206 return 1; 207 else 208 return 0; 194 /* sigset_t old_mask; */ 195 unsigned32 old_level; 196 197 sigprocmask(0, 0, &GET_old_mask); 198 199 if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t))) 200 old_level = 1; 201 else 202 old_level = 0; 203 204 return old_level; 209 205 } 210 206 … … 384 380 source = _CPU_Context_Default_with_ISRs_disabled.regs; 385 381 386 memcpy(_the_context, source, sizeof( jmp_buf));382 memcpy(_the_context, source, sizeof(Context_Control) ); /* sizeof(jmp_buf)); */ 387 383 388 384 addr = (unsigned32 *)_the_context; … … 471 467 ) 472 468 { 469 int status; 470 473 471 /* 474 472 * Switch levels in one operation 475 473 */ 476 474 477 sigprocmask( SIG_SETMASK, &next->isr_level, ¤t->isr_level ); 475 status = sigprocmask( SIG_SETMASK, &next->isr_level, ¤t->isr_level ); 476 if ( status ) 477 _Internal_error_Occurred( 478 INTERNAL_ERROR_CORE, 479 TRUE, 480 status 481 ); 478 482 479 483 if (setjmp(current->regs) == 0) { /* Save the current context */ 480 484 longjmp(next->regs, 0); /* Switch to the new context */ 481 } 485 if ( status ) 486 _Internal_error_Occurred( 487 INTERNAL_ERROR_CORE, 488 TRUE, 489 status 490 ); 491 } 492 482 493 } 483 494 … … 511 522 unsigned32 _CPU_ISR_Disable_support(void) 512 523 { 524 int status; 513 525 sigset_t old_mask; 514 526 515 sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); 516 517 if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)) != 0) 527 status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); 528 if ( status ) 529 _Internal_error_Occurred( 530 INTERNAL_ERROR_CORE, 531 TRUE, 532 status 533 ); 534 535 if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) 518 536 return 1; 519 537 … … 530 548 ) 531 549 { 550 int status; 551 532 552 if (level == 0) 533 s igprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);553 status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); 534 554 else 535 sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); 555 status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); 556 557 if ( status ) 558 _Internal_error_Occurred( 559 INTERNAL_ERROR_CORE, 560 TRUE, 561 status 562 ); 536 563 } 537 564
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