Changeset 35f1d89 in rtems for c/src/lib/libcpu/arm


Ignore:
Timestamp:
Dec 11, 2007, 3:46:05 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.9, master
Children:
200748bf
Parents:
0f9ecc4e
Message:

2007-12-11 Joel Sherrill <joel.sherrill@…>

  • at91rm9200/clock/clock.c, lpc22xx/clock/clockdrv.c, mc9328mxl/clock/clockdrv.c, s3c2400/clock/clockdrv.c: Eliminate copies of the Configuration Table. Use the RTEMS provided accessor macros to obtain configuration fields.
Location:
c/src/lib/libcpu/arm
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/ChangeLog

    r0f9ecc4e r35f1d89  
     12007-12-11      Joel Sherrill <joel.sherrill@OARcorp.com>
     2
     3        * at91rm9200/clock/clock.c, lpc22xx/clock/clockdrv.c,
     4        mc9328mxl/clock/clockdrv.c, s3c2400/clock/clockdrv.c: Eliminate
     5        copies of the Configuration Table. Use the RTEMS provided accessor
     6        macros to obtain configuration fields.
     7
    182007-11-03      Ray Xu <rayx.cn@gmail.com>
    29        *lpc22xx/irq/bsp_irq_asm.S: Add veneer for ARM<->Thumb
  • c/src/lib/libcpu/arm/at91rm9200/clock/clock.c

    r0f9ecc4e r35f1d89  
    8585  slck = at91rm9200_get_slck();
    8686  st_pimr_reload =
    87     (((BSP_Configuration.microseconds_per_tick * slck) + (1000000/2))/ 1000000);
     87    (((rtems_configuration_get_microseconds_per_tick() * slck) + (1000000/2))/ 1000000);
    8888
    8989  /* read the status to clear the int */
  • c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c

    r0f9ecc4e r35f1d89  
    7979 */
    8080 
    81   /* set timer to generate interrupt every BSP_Configuration.microseconds_per_tick
     81  /* set timer to generate interrupt every rtems_configuration_get_microseconds_per_tick()
    8282   * MR0/(LPC22xx_Fpclk/(PR0+1)) = 10/1000 = 0.01s
    8383   */                   
     
    8787        T0TCR &= 0;      /* disable and clear timer 0, set to  */ \
    8888        T0PC  = 0;            /* TC is incrementet on every pclk.*/ \
    89         T0MR0 = ((LPC22xx_Fpclk/1000* BSP_Configuration.microseconds_per_tick) / 1000); /* initialize the timer period and prescaler */  \
    90         /*T0PR = (((LPC22xx_Fpclk / 1000) * BSP_Configuration.microseconds_per_tick) / 1000-1); \ */ \
     89        T0MR0 = ((LPC22xx_Fpclk/1000* rtems_configuration_get_microseconds_per_tick()) / 1000); /* initialize the timer period and prescaler */  \
     90        /*T0PR = (((LPC22xx_Fpclk / 1000) * rtems_configuration_get_microseconds_per_tick()) / 1000-1); \ */ \
    9191        T0MCR |= 0x03;            /* generate interrupt when T0MR0 match T0TC and Reset Timer Count*/ \
    9292        T0EMR = 0;  /*No external match*/ \
     
    114114        clicks = T0TC;  /*T0TC is the 32bit time counter 0*/
    115115       
    116         return (uint32_t) (BSP_Configuration.microseconds_per_tick - clicks) * 1000;
     116        return (uint32_t) (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
    117117}
    118118       
  • c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c

    r0f9ecc4e r35f1d89  
    8484        freq = get_perclk1_freq(); \
    8585        printk("perclk1 freq is %d\n", freq); \
    86         cnt = ((long long)freq * BSP_Configuration.microseconds_per_tick + 500000) / 1000000;\
     86        cnt = ((long long)freq * rtems_configuration_get_microseconds_per_tick() + 500000) / 1000000;\
    8787        printk("cnt freq is %d\n", cnt); \
    8888        MC9328MXL_TMR1_TCMP = cnt; \
  • c/src/lib/libcpu/arm/s3c2400/clock/clockdrv.c

    r0f9ecc4e r35f1d89  
    8181        /* set TIMER4 counter, input freq=PLCK/16/16Mhz*/ \
    8282        freq = (freq /16)/16; \
    83         rTCNTB4 = ((freq / 1000) * BSP_Configuration.microseconds_per_tick) / 1000; \
     83        rTCNTB4 = ((freq / 1000) * rtems_configuration_get_microseconds_per_tick()) / 1000; \
    8484        /*unmask TIMER4 irq*/ \
    8585        rINTMSK&=~BIT_TIMER4; \
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