- Timestamp:
- 06/07/11 13:28:01 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- b6027474
- Parents:
- 94f37add
- Location:
- c/src/lib/libbsp/powerpc
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
r94f37add r353be08 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac, startup/bspstart.c: Use standard cache BSP options. 4 1 5 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> 2 6 -
c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac
r94f37add r353be08 16 16 RTEMS_PROG_CCAS 17 17 18 RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[0]) 19 RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE], 20 [If defined, the data cache will be enabled after address translation 21 is turned on.]) 18 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[]) 19 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 22 20 23 RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[0]) 24 RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE], 25 [If defined, the instruction cache will be enabled after address translation 26 is turned on.]) 21 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[]) 22 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 27 23 28 24 RTEMS_BSPOPTS_SET([UARTS_USE_TERMIOS],[*],[0]) -
c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
r94f37add r353be08 198 198 * Enable instruction and data caches. Do not force writethrough mode. 199 199 */ 200 #if INSTRUCTION_CACHE_ENABLE200 #if BSP_INSTRUCTION_CACHE_ENABLED 201 201 rtems_cache_enable_instruction(); 202 202 #endif 203 #if DATA_CACHE_ENABLE203 #if BSP_DATA_CACHE_ENABLED 204 204 rtems_cache_enable_data(); 205 205 #endif -
c/src/lib/libbsp/powerpc/score603e/ChangeLog
r94f37add r353be08 1 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * configure.ac, startup/bspstart.c: Use standard cache BSP options. 4 1 5 2011-05-17 Till Straumann <strauman@slac.stanford.edu> 2 6 -
c/src/lib/libbsp/powerpc/score603e/configure.ac
r94f37add r353be08 15 15 RTEMS_CANONICALIZE_TOOLS 16 16 RTEMS_PROG_CCAS 17 18 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[]) 19 RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED 20 21 RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[]) 22 RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED 17 23 18 24 ## FIXME: This should be a 1 out of 3 selection … … 53 59 other tools like debuggers.]) 54 60 55 RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0])56 RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],57 [If defined, then the PowerPC specific code in RTEMS will use58 data cache instructions to optimize the context switch code.59 This code can conflict with debuggers or emulators. It is known60 to break the Corelis PowerPC emulator with at least some combinations61 of PowerPC 603e revisions and emulator versions.62 The BSP actually contains the call that enables this.])63 64 61 RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1]) 65 62 RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], -
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
r94f37add r353be08 224 224 bsp_clicks_per_usec = 66 / 4; 225 225 226 #if ( PPC_USE_DATA_CACHE )226 #if BSP_DATA_CACHE_ENABLED 227 227 #if DEBUG 228 228 printk("bsp_start: cache_enable\n"); … … 231 231 data_cache_enable (); 232 232 #if DEBUG 233 printk("bsp_start: END PPC_USE_DATA_CACHE\n");233 printk("bsp_start: END BSP_DATA_CACHE_ENABLED\n"); 234 234 #endif 235 235 #endif
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