Changeset 3495c57 in rtems


Ignore:
Timestamp:
Nov 30, 2009, 3:49:08 AM (9 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.10, 4.11, master
Children:
90a0b91
Parents:
b1274bd9
Message:

Whitespace removal.

Location:
c/src
Files:
50 edited

Legend:

Unmodified
Added
Removed
  • c/src/ada-tests/samples/base_mp/config.h

    rb1274bd9 r3495c57  
    1515
    1616/* configuration information */
    17  
     17
    1818#define CONFIGURE_MP_APPLICATION
    19  
     19
    2020#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
    2121#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
    22  
     22
    2323#define CONFIGURE_MAXIMUM_TASKS           2
    2424
  • c/src/ada-tests/support/init.c

    rb1274bd9 r3495c57  
    1 /* 
     1/*
    22 *  COPYRIGHT (c) 1989-2007
    33 *  On-Line Applications Research Corporation (OAR).
  • c/src/lib/libbsp/bfin/bf537Stamp/console/console.c

    rb1274bd9 r3495c57  
    11/*  Console driver for bf537Stamp
    2  * 
     2 *
    33 *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
    44 *             written by Allan Hessenflow <allanh@kallisti.com>
     
    1010 *  $Id$
    1111 */
    12  
     12
    1313
    1414#include <rtems.h>
  • c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h

    rb1274bd9 r3495c57  
    11/*  bsp.h
    2  * 
     2 *
    33 *  This include file contains all board IO definitions for bf537Stamp.
    44 *
     
    1313 *  $Id$
    1414 */
    15  
     15
    1616
    1717#ifndef _BSP_H
     
    3535
    3636
    37 /* 
     37/*
    3838 * PLL and clock setup values:
    3939 */
  • c/src/lib/libbsp/bfin/bf537Stamp/start/start.S

    rb1274bd9 r3495c57  
    6060        p1.h = HI(CEC_EVT15);
    6161        p1.l = LO(CEC_EVT15);
    62        
     62
    6363        [p1] = p0;
    6464
     
    6767
    6868        raise 15;
    69        
     69
    7070        p0.h = wait;
    7171        p0.l = wait;
     
    7373        reti = p0;
    7474        rti;
    75        
     75
    7676        /* wait for event 15 */
    7777wait:
    7878        jump wait;
    79        
     79
    8080start:
    8181        [--sp] = reti; /* allow us to process interrupts later */
     
    8383        /* mask interrupts for now */
    8484        cli r0;
    85        
     85
    8686        p0.h = _bss_start;
    8787        p0.l = _bss_start;
     
    9191        r1 = p1;
    9292        r1 = r1 - r0;
    93         p1 = r1;       
     93        p1 = r1;
    9494        r0 = 0;
    9595
  • c/src/lib/libbsp/bfin/bf537Stamp/startup/bspstart.c

    rb1274bd9 r3495c57  
    55 *  The generic CPU dependent initialization has been performed
    66 *  before this routine is invoked.
    7  * 
     7 *
    88 *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
    99 *             written by Alain Schaefer <alain.schaefer@easc.ch>
     
    106106 /*
    107107  * initPLL
    108   * 
     108  *
    109109  * Routine to initialize the PLL. The BF537 Stamp uses a 27 Mhz XTAL. BISON
    110110  * See "../bf537Stamp/include/bsp.h" for more information.
     
    112112
    113113static void initPLL(void) {
    114  
     114
    115115#ifdef BISON
    116116  unsigned int n;
    117  
     117
    118118  /* Configure PLL registers */
    119119  *((uint16_t*)PLL_LOCKCNT) = 0x1000;
     
    125125  asm("idle;");
    126126  asm("sti r0;");
    127  
     127
    128128  /* Delay for PLL stabilization */
    129   for (n=0; n<200; n++) {} 
     129  for (n=0; n<200; n++) {}
    130130#endif
    131  
     131
    132132}
    133133
    134134 /*
    135135  * initEBIU
    136   * 
     136  *
    137137  * Configure extern memory
    138138  */
     
    154154  *((uint32_t*)EBIU_AMBCTL1)  = 0x7bb07bb0L;
    155155  *((uint16_t*)EBIU_AMGCTL)   = 0x000f;
    156  
    157   /* Configure SDRAM 
     156
     157  /* Configure SDRAM
    158158  *((uint32_t*)EBIU_SDGCTL) = 0x0091998d;
    159159  *((uint16_t*)EBIU_SDBCTL) = 0x0013;
     
    165165 /*
    166166  * initGPIO
    167   * 
     167  *
    168168  * Enable LEDs port
    169169  */
  • c/src/lib/libbsp/bfin/eZKit533/console/console-io.c

    rb1274bd9 r3495c57  
    11/*  console-io.c
    2  * 
     2 *
    33 *  This file contains the hardware specific portions of the TTY driver
    44 *  for the serial ports for ezkit533.
     
    1414 *  $Id$
    1515 */
    16  
     16
    1717
    1818#include <rtems.h>
  • c/src/lib/libbsp/bfin/eZKit533/include/bsp.h

    rb1274bd9 r3495c57  
    11/*  bsp.h
    2  * 
     2 *
    33 *  This include file contains all board IO definitions for eZKit533.
    44 *
     
    1313 *  $Id$
    1414 */
    15  
     15
    1616
    1717#ifndef _BSP_H
     
    3030#include <rtems/clockdrv.h>
    3131#include <rtems/score/bfin.h>
    32 #include <rtems/bfin/bf533.h> 
     32#include <rtems/bfin/bf533.h>
    3333
    34 /* 
     34/*
    3535 * PLL and clock setup values:
    3636 */
  • c/src/lib/libbsp/bfin/eZKit533/include/cplb.h

    rb1274bd9 r3495c57  
    11/*  cplb.h
    2  * 
     2 *
    33 *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
    44 *             written by Alain Schaefer <alain.schaefer@easc.ch>
     
    1515/* CPLB configurations */
    1616#define CPLB_DEF_CACHE_WT       CPLB_L1_CHBL | CPLB_WT
    17 #define CPLB_DEF_CACHE_WB       CPLB_L1_CHBL 
     17#define CPLB_DEF_CACHE_WB       CPLB_L1_CHBL
    1818#define CPLB_CACHE_ENABLED      CPLB_L1_CHBL | CPLB_DIRTY
    1919
  • c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c

    rb1274bd9 r3495c57  
    55 *  The generic CPU dependent initialization has been performed
    66 *  before this routine is invoked.
    7  * 
     7 *
    88 *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
    99 *             written by Alain Schaefer <alain.schaefer@easc.ch>
     
    2222#include <libcpu/interrupt.h>
    2323
    24 const unsigned int dcplbs_table[16][2] = { 
     24const unsigned int dcplbs_table[16][2] = {
    2525  { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
    2626  { 0xFF900000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data B */
     
    4343
    4444
    45 const unsigned int _icplbs_table[16][2] = { 
     45const unsigned int _icplbs_table[16][2] = {
    4646  { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },  /* L1 Code */
    4747  { 0xEF000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* AREA DE BOOT */
    48   { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },     
     48  { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },
    4949  { 0x20300000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 3 */
    5050  { 0x20200000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 2 (Secnd) */
     
    9292{
    9393  /* BSP Hardware Initialization*/
    94   Init_RTC();   /* Blackfin Real Time Clock initialization */ 
     94  Init_RTC();   /* Blackfin Real Time Clock initialization */
    9595  Init_PLL();   /* PLL initialization */
    9696  Init_EBIU();  /* EBIU initialization */
     
    105105/*
    106106 * Init_PLL
    107  * 
     107 *
    108108 * Routine to initialize the PLL. The Ezkit uses a 27 Mhz XTAL.
    109109 * See "../eZKit533/include/bsp.h" for more information.
     
    112112{
    113113  unsigned int n;
    114  
     114
    115115  /* Configure PLL registers */
    116116  *((uint16_t*)PLL_LOCKCNT) = 0x1000;
     
    122122  asm("idle;");
    123123  asm("sti r0;");
    124  
     124
    125125  /* Delay for PLL stabilization */
    126   for (n=0; n<200; n++) {} 
     126  for (n=0; n<200; n++) {}
    127127}
    128128
    129129 /*
    130130  * Init_EBIU
    131   * 
     131  *
    132132  * Configure extern memory
    133133  */
     
    139139  *((uint32_t*)EBIU_AMBCTL1)  = 0x7bb07bb0L;
    140140  *((uint16_t*)EBIU_AMGCTL)   = 0x000f;
    141  
    142   /* Configure SDRAM 
     141
     142  /* Configure SDRAM
    143143  *((uint32_t*)EBIU_SDGCTL) = 0x0091998d;
    144144  *((uint16_t*)EBIU_SDBCTL) = 0x0013;
     
    149149/*
    150150 * Init_Flags
    151  * 
     151 *
    152152 * Enable LEDs port
    153153 */
     
    158158  *((uint16_t*)FIO_EDGE)    = 0x0100;
    159159  *((uint16_t*)FIO_MASKA_D) = 0x0100;
    160  
     160
    161161  *((uint8_t*)FlashA_PortB_Dir)  = 0x3f;
    162   *((uint8_t*)FlashA_PortB_Data) = 0x00;   
     162  *((uint8_t*)FlashA_PortB_Data) = 0x00;
    163163}
    164164
     
    169169void setLED (uint8_t value)
    170170{
    171   *((uint8_t*)FlashA_PortB_Data) = value;   
     171  *((uint8_t*)FlashA_PortB_Data) = value;
    172172}
    173173
     
    194194    addr++;
    195195    data++;
    196   } 
     196  }
    197197}
  • c/src/lib/libbsp/bfin/shared/start/start.S

    rb1274bd9 r3495c57  
    11
    22
    3 #include <rtems/bfin/bfin.h>   
     3#include <rtems/bfin/bfin.h>
    44
    55#include <bspopts.h>
     
    4040    sp.h = 0xFFB0;
    4141    sp.l = 0x0F00;
    42    
     42
    4343    /* Maybe we should zero the memory in the .bss section.  */
    4444
     
    4848    p1.l = LO(EVT15);
    4949    p1.h = HI(EVT15);
    50    
     50
    5151    [P1] = P0;
    52    
     52
    5353    P0.h = HI(IMASK);
    5454    P0.l = LO(IMASK);
     
    5656    /* R1.l = EVT_IVG15 & 0xFFFF; */
    5757    R1.l = 0x8000;
    58    
     58
    5959    R0 = R0 | R1;
    60    
     60
    6161    [P0] = R0;
    6262
    6363    RAISE 15;
    64    
     64
    6565    P0.l = WAIT;
    6666    P0.h = WAIT;
     
    6868    RETI = P0;
    6969    RTI;
    70    
     70
    7171    /* endless loop to wait */
    72     WAIT:   
     72    WAIT:
    7373    jump WAIT;
    74    
     74
    7575    START:
    7676    [--SP] = RETI;
    77    
     77
    7878    p0.h = _bss_start;
    7979    p0.l = _bss_start;
     
    8383    r1 = p1;
    8484    r1 = r1 - r0;
    85     p1 = r1;   
     85    p1 = r1;
    8686    r0 = 0;
    8787
     
    9797
    9898    p0.l = _exit;
    99     p0.h = _exit; 
    100     P3 = P4; 
     99    p0.h = _exit;
     100    P3 = P4;
    101101    jump    (p0)        /* Should not return.  */
    102102
  • c/src/lib/libbsp/i386/shared/irq/irq_asm.S

    rb1274bd9 r3495c57  
    2929#define SSE_OFF 16
    3030#else
    31 #define FRM_SIZ 16 
     31#define FRM_SIZ 16
    3232#endif
    3333
     
    138138        /*
    139139         *  We want to insure that the old stack pointer is in ebp
    140          *  By saving it on every interrupt, all we have to do is 
     140         *  By saving it on every interrupt, all we have to do is
    141141         *  movl ebp->esp near the end of every interrupt.
    142142         */
  • c/src/lib/libbsp/i386/shared/pci/pcibios.c

    rb1274bd9 r3495c57  
    545545  unsigned char offset,
    546546  unsigned char *val
    547 ) 
     547)
    548548{
    549549  int sig;
     
    561561  unsigned char offset,
    562562  unsigned short *val
    563 ) 
     563)
    564564{
    565565  int sig;
     
    577577  unsigned char offset,
    578578  uint32_t     *val
    579 ) 
     579)
    580580{
    581581  int sig;
     
    593593  unsigned char offset,
    594594  unsigned char val
    595 ) 
     595)
    596596{
    597597  int sig;
     
    609609  unsigned char offset,
    610610  unsigned short val
    611 ) 
     611)
    612612{
    613613  int sig;
     
    625625  unsigned char offset,
    626626  uint32_t      val
    627 ) 
     627)
    628628{
    629629  int sig;
  • c/src/lib/libbsp/powerpc/mbx8xx/console/console.c

    rb1274bd9 r3495c57  
    539539
    540540#if NVRAM_CONFIGURE == 1
    541         if ( ((nvram->console_mode & 0x06) != 0x04 ) || 
     541        if ( ((nvram->console_mode & 0x06) != 0x04 ) ||
    542542             ((nvram->console_mode & 0x30) != 0x20 )) {
    543543          /*
  • c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c

    rb1274bd9 r3495c57  
    219219      ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
    220220    }
    221     /* 
    222      * make sure, that the masking operations in 
     221    /*
     222     * make sure, that the masking operations in
    223223     * ICTL and MSR are executed in order
    224224     */
     
    233233    _CPU_MSR_SET(msr);
    234234
    235     /* 
    236      * make sure, that the masking operations in 
     235    /*
     236     * make sure, that the masking operations in
    237237     * ICTL and MSR are executed in order
    238238     */
  • c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S

    rb1274bd9 r3495c57  
    5252#warning You need to pass a NULL.
    5353#warning Please check and remove these warnings.
    54        
     54
    5555#include <rtems/asm.h>
    5656
     
    247247 * test function:        blink orange led once
    248248 */
    249 #define LEDBLINK_DELAY (5*1000*1000)   
     249#define LEDBLINK_DELAY (5*1000*1000)
    250250#define LEDPORT 0xFA100001
    251251#define LEDMASK 0xf0
    252252#define LEDON   0x00
    253253#define LEDOFF  0x08
    254                
     254
    255255        PUBLIC_VAR(ledblink)
    256256SYM(ledblink):
    257257        lis     r3,LEDBLINK_DELAY>>16
    258 ledblink1:     
     258ledblink1:
    259259        subi    r3,r3,1
    260260        cmpi    0,1,r3,0
     
    268268        ori     r0,r0,LEDOFF
    269269        stb     r0,LEDPORT@l(r3)
    270        
     270
    271271        lis     r3,LEDBLINK_DELAY>>16
    272 ledblink2:     
     272ledblink2:
    273273        subi    r3,r3,1
    274274        cmpi    0,1,r3,0
     
    282282        ori     r0,r0,LEDON
    283283        stb     r0,LEDPORT@l(r3)
    284        
    285         blr     
     284
     285        blr
    286286/*
    287287 * #define LOADED_BY_EPPCBUG
  • c/src/libchip/display/disp_fonts.h

    rb1274bd9 r3495c57  
    3131struct disp_font_bounding_box
    3232{
    33   disp_font_dimen w, h, x, y; 
    34 }; 
     33  disp_font_dimen w, h, x, y;
     34};
    3535
    3636struct disp_font_glyph
  • c/src/libchip/display/disp_hcms29xx.c

    rb1274bd9 r3495c57  
    8383\*=========================================================================*/
    8484{
    85  
     85
    8686  rtems_status_code rc = RTEMS_SUCCESSFUL;
    8787  size_t font_size = 0;
     
    9595  }
    9696  if (rc == RTEMS_SUCCESSFUL) {
    97     font_size = 
     97    font_size =
    9898      sizeof(*src);                      /* font_base structure       */
    9999  }
     
    106106    }
    107107    glyph_idx++;
    108   }     
    109   *dst_size = font_size; 
    110  
     108  }
     109  *dst_size = font_size;
     110
    111111  return rc;
    112112}
     
    123123| Input Parameters:                                                         |
    124124\*-------------------------------------------------------------------------*/
    125   unsigned char byte 
     125  unsigned char byte
    126126)
    127127/*-------------------------------------------------------------------------*\
     
    133133  int smsk,dmsk;
    134134  for (smsk =  0x01,dmsk=0x80;
    135        smsk < 0x100; 
     135       smsk < 0x100;
    136136       smsk<<=1   ,dmsk>>=1) {
    137137    if ((byte & smsk) != 0) {
     
    163163\*=========================================================================*/
    164164{
    165  
     165
    166166  rtems_status_code rc = RTEMS_SUCCESSFUL;
    167167  char *alloc_next = (char *)dst;
     
    174174   * check parameters
    175175   */
    176   if ((rc == RTEMS_SUCCESSFUL) && 
     176  if ((rc == RTEMS_SUCCESSFUL) &&
    177177      ((src == NULL) ||
    178178       (dst == NULL))) {
     
    199199      alloc_next += sizeof(*(dst->latin1[glyph_idx]));
    200200      /*
    201        * copy source values. 
     201       * copy source values.
    202202       * Note: bitmap will be reassigned later
    203203       */
    204       *(struct disp_font_glyph *)(dst->latin1[glyph_idx]) = 
     204      *(struct disp_font_glyph *)(dst->latin1[glyph_idx]) =
    205205        *(src->latin1[glyph_idx]);
    206206    }
     
    209209    }
    210210    glyph_idx++;
    211   }     
    212  
     211  }
     212
    213213  /*
    214214   * for all glyphs: reassign bitmap
     
    241241          byte = byte >> shift_cnt;
    242242        }
    243         ((unsigned char *)(dst->latin1[glyph_idx]->bitmap))[bcnt] = byte;     
     243        ((unsigned char *)(dst->latin1[glyph_idx]->bitmap))[bcnt] = byte;
    244244      }
    245245    }
    246246    glyph_idx++;
    247   }     
     247  }
    248248  return rc;
    249249}
     
    270270\*=========================================================================*/
    271271{
    272  
     272
    273273  rtems_status_code rc = RTEMS_SUCCESSFUL;
    274274  size_t src_size = 0;
     
    276276   * check parameters
    277277   */
    278   if ((rc == RTEMS_SUCCESSFUL) && 
     278  if ((rc == RTEMS_SUCCESSFUL) &&
    279279      ((src == NULL)
    280280       || (dst == NULL))) {
     
    362362   */
    363363  if (rc == RTEMS_SUCCESSFUL) {
    364     curr_font = 
    365       softc_ptr->disp_param.rotate 
    366       ? disp_hcms29xx_font_rotate 
     364    curr_font =
     365      softc_ptr->disp_param.rotate
     366      ? disp_hcms29xx_font_rotate
    367367      : disp_hcms29xx_font_normal;
    368368
     
    370370    /*
    371371     * FIXME: for rotated display, write last character first...
    372      * maybe we should copy everything to a common buffer and use 
     372     * maybe we should copy everything to a common buffer and use
    373373     * ONE SPI transfer?
    374374     */
     
    382382        char_avail = false;
    383383      }
    384       glyph_ptr = (char_avail 
     384      glyph_ptr = (char_avail
    385385                   ? curr_font->latin1[c]
    386386                   : NULL);
    387387      if (glyph_ptr == NULL) {
    388388        glyph_ptr = curr_font->latin1[' '];
    389       }   
    390 
    391       digit = (softc_ptr->disp_param.rotate 
    392                ? DISP_HCMS29XX_DIGIT_CNT-1-i 
     389      }
     390
     391      digit = (softc_ptr->disp_param.rotate
     392               ? DISP_HCMS29XX_DIGIT_CNT-1-i
    393393               : i);
    394394      /*
     
    448448    if (rc == RTEMS_SUCCESSFUL) {
    449449      if (run == 0) {
    450         ctrl_buffer = 
    451           (0              << 7) | 
     450        ctrl_buffer =
     451          (0              << 7) |
    452452          ((sleep & 0x01) << 6) |
    453453          ((peak  & 0x03) << 4) |
     
    455455      }
    456456      else {
    457         ctrl_buffer = 
    458           (1              << 7) | 
     457        ctrl_buffer =
     458          (1              << 7) |
    459459          ((div   & 0x01) << 1) |
    460460          ((chain & 0x01) << 0);
     
    526526  rtems_status_code rc = RTEMS_SUCCESSFUL;
    527527  disp_hcms29xx_drv_t *softc_ptr = arg;
    528  
     528
    529529
    530530  if (rc == RTEMS_SUCCESSFUL) {
     
    569569                                       14,3,1,0,0);/* pwm/peak/nosleep/div/chain */
    570570  }
    571  
     571
    572572  /*
    573573   * set display to blank
     
    597597    if (my_events & DISP_HCMS29XX_EVENT_NEWSTR) {
    598598      /*
    599        * fetch new string consistently into local buffer 
     599       * fetch new string consistently into local buffer
    600600       */
    601601      if (rc == RTEMS_SUCCESSFUL) {
     
    609609        softc_ptr->disp_param.disp_buffer[sizeof(softc_ptr->disp_param.disp_buffer)-1] = '\0';
    610610        softc_ptr->disp_param.disp_buf_cnt =
    611           (int) strlen(softc_ptr->disp_param.disp_buffer);     
     611          (int) strlen(softc_ptr->disp_param.disp_buffer);
    612612      }
    613613      if (rc == RTEMS_SUCCESSFUL) {
    614614        rc = rtems_semaphore_release(softc_ptr->disp_param.trns_sema_id);
    615615      }
    616       /* 
     616      /*
    617617       * set initial offset to negative value
    618618       * to make string static for some ticks
     
    640640                                         softc_ptr->disp_param.disp_buffer);
    641641    }
    642     else if (disp_offset 
     642    else if (disp_offset
    643643             < (softc_ptr->disp_param.disp_buf_cnt - DISP_HCMS29XX_DIGIT_CNT)) {
    644644      rc = disp_hcms29xx_send_to_display(softc_ptr,
     
    651651                                         - DISP_HCMS29XX_DIGIT_CNT);
    652652    }
    653     /* 
     653    /*
    654654     * activate timer, if needed
    655655     */
     
    665665      }
    666666    }
    667   }   
    668   /*
    669    * FIXME: display task is dead... 
     667  }
     668  /*
     669   * FIXME: display task is dead...
    670670   */
    671671}
     
    691691{
    692692  rtems_status_code rc = RTEMS_SUCCESSFUL;
    693  
     693
    694694  /*
    695695   * obtain trns semaphore
     
    720720                          DISP_HCMS29XX_EVENT_NEWSTR);
    721721  }
    722  
     722
    723723  return rc;
    724724}
     
    759759   * FIXME: check, that default glyph exists
    760760   * FIXME: check font size to be 5x7
    761    */ 
     761   */
    762762  /*
    763763   * translate font according to direction/baseline
    764    */ 
     764   */
    765765  if (rc == RTEMS_SUCCESSFUL) {
    766766    rc = disp_hcms29xx_alloc_copy_font(
     
    790790                                     &softc_ptr->disp_param.trns_sema_id);
    791791  }
    792  
     792
    793793  /*
    794794   * create and start display task
     
    803803  }
    804804  if (rc == RTEMS_SUCCESSFUL) {
    805     rc = rtems_task_start(softc_ptr->disp_param.task_id, 
     805    rc = rtems_task_start(softc_ptr->disp_param.task_id,
    806806                          disp_hcms29xx_update_task, 0 );
    807807  }
     
    813813  }
    814814  return rc;
    815 }         
     815}
    816816
    817817/*=========================================================================*\
     
    839839   * FIXME: get softc_ptr
    840840   */
    841   /* 
     841  /*
    842842   * ensure, that disp_hcms29xx device is assumed to be empty
    843843   */
     
    846846  return RTEMS_SUCCESSFUL;
    847847}
    848  
     848
    849849/*=========================================================================*\
    850850| Function:                                                                 |
     
    876876  for (cnt = 0;cnt < args->count;cnt++) {
    877877    /*
    878      * accumulate characters written into display dev buffer 
     878     * accumulate characters written into display dev buffer
    879879     */
    880     if (((softc_ptr->disp_param.dev_buf_cnt > 0) 
     880    if (((softc_ptr->disp_param.dev_buf_cnt > 0)
    881881        &&((args->buffer[cnt] == '\n')
    882882           || (args->buffer[cnt] == '\0'))
    883883         )
    884         ||( softc_ptr->disp_param.dev_buf_cnt >= 
     884        ||( softc_ptr->disp_param.dev_buf_cnt >=
    885885            (int) sizeof(softc_ptr->disp_param.dev_buffer) - 1)) {
    886886      softc_ptr->disp_param.dev_buffer[softc_ptr->disp_param.dev_buf_cnt] = '\0';
    887887      /*
    888        * transfer string to display string, redisplay it... 
     888       * transfer string to display string, redisplay it...
    889889       */
    890890      disp_hcms29xx_update(softc_ptr,softc_ptr->disp_param.dev_buffer);
    891       softc_ptr->disp_param.dev_buf_cnt = 0;     
    892     }
    893     /* 
     891      softc_ptr->disp_param.dev_buf_cnt = 0;
     892    }
     893    /*
    894894     * write to dev_buf, if '\n' occured or display device buffer is full
    895895     */
    896896    if ((args->buffer[cnt] != '\n') &&
    897897        (args->buffer[cnt] != '\0')) {
    898       softc_ptr->disp_param.dev_buffer[softc_ptr->disp_param.dev_buf_cnt++] = 
     898      softc_ptr->disp_param.dev_buffer[softc_ptr->disp_param.dev_buf_cnt++] =
    899899        args->buffer[cnt];
    900900    }
     
    934934  /* flush buffer, if not empty */
    935935  if (softc_ptr->disp_param.dev_buf_cnt > 0) {
    936       softc_ptr->disp_param.dev_buffer[softc_ptr->disp_param.dev_buf_cnt] = 
     936      softc_ptr->disp_param.dev_buffer[softc_ptr->disp_param.dev_buf_cnt] =
    937937        '\0';
    938938      /*
    939        * transfer string to display string, redisplay it... 
     939       * transfer string to display string, redisplay it...
    940940       */
    941941      disp_hcms29xx_update(softc_ptr,softc_ptr->disp_param.dev_buffer);
    942       softc_ptr->disp_param.dev_buf_cnt = 0;     
    943   }   
     942      softc_ptr->disp_param.dev_buf_cnt = 0;
     943  }
    944944  return RTEMS_SUCCESSFUL;
    945945}
  • c/src/libchip/display/disp_hcms29xx.h

    rb1274bd9 r3495c57  
    3434  typedef struct {
    3535    rtems_device_major_number minor;   /* minor device number            */
    36     /* 
     36    /*
    3737     * in the disp_buffer, the string to be displayed is placed
    3838     */
     
    4040    int  disp_buf_cnt; /* number of valid chars in disp_buffer */
    4141    /*
    42      * in the trns buffer the string is transfered to display task 
     42     * in the trns buffer the string is transfered to display task
    4343     */
    4444    char trns_buffer[DISP_HCMS29XX_TEXT_CNT];
    45     /* 
    46      * in the dev_buffer, characters will be accumulated before display... 
     45    /*
     46     * in the dev_buffer, characters will be accumulated before display...
    4747     */
    4848    char dev_buffer[DISP_HCMS29XX_TEXT_CNT];
    4949    int  dev_buf_cnt; /* number of valid chars in dev_buffer */
    50    
     50
    5151    rtems_id trns_sema_id;  /* ID of disp trns buffer sema   */
    5252    rtems_id task_id;       /* ID of disp task               */
     
    5959  } disp_hcms29xx_drv_t;
    6060  /*
    61    * pass this descriptor pointer to rtems_libi2c_register_drv 
     61   * pass this descriptor pointer to rtems_libi2c_register_drv
    6262   */
    6363  extern rtems_libi2c_drv_t *disp_hcms29xx__driver_descriptor;
    64  
     64
    6565#ifdef __cplusplus
    6666}
  • c/src/libchip/display/font_hcms29xx.c

    rb1274bd9 r3495c57  
    3030  0x3e,
    3131  0x7f,
    32   0x00 
     32  0x00
    3333};
    3434struct disp_font_glyph glyph_hp_fixed_5_7_0 = {
     
    4242  0x48,
    4343  0x40,
    44   0x30 
     44  0x30
    4545};
    4646struct disp_font_glyph glyph_hp_fixed_5_7_1 = {
     
    5454  0x11,
    5555  0x29,
    56   0x45 
     56  0x45
    5757};
    5858struct disp_font_glyph glyph_hp_fixed_5_7_2 = {
     
    6666  0x11,
    6767  0x21,
    68   0x7d 
     68  0x7d
    6969};
    7070struct disp_font_glyph glyph_hp_fixed_5_7_3 = {
     
    7878  0x05,
    7979  0x05,
    80   0x79 
     80  0x79
    8181};
    8282struct disp_font_glyph glyph_hp_fixed_5_7_4 = {
     
    9090  0x44,
    9191  0x38,
    92   0x44 
     92  0x44
    9393};
    9494struct disp_font_glyph glyph_hp_fixed_5_7_5 = {
     
    102102  0x29,
    103103  0x2e,
    104   0x10 
     104  0x10
    105105};
    106106struct disp_font_glyph glyph_hp_fixed_5_7_6 = {
     
    114114  0x4d,
    115115  0x49,
    116   0x30 
     116  0x30
    117117};
    118118struct disp_font_glyph glyph_hp_fixed_5_7_7 = {
     
    126126  0x48,
    127127  0x50,
    128   0x60 
     128  0x60
    129129};
    130130struct disp_font_glyph glyph_hp_fixed_5_7_8 = {
     
    138138  0x04,
    139139  0x38,
    140   0x40 
     140  0x40
    141141};
    142142struct disp_font_glyph glyph_hp_fixed_5_7_9 = {
     
    150150  0x49,
    151151  0x49,
    152   0x3e 
     152  0x3e
    153153};
    154154struct disp_font_glyph glyph_hp_fixed_5_7_10 = {
     
    162162  0x08,
    163163  0x10,
    164   0x60 
     164  0x60
    165165};
    166166struct disp_font_glyph glyph_hp_fixed_5_7_11 = {
     
    174174  0x20,
    175175  0x20,
    176   0x1c 
     176  0x1c
    177177};
    178178struct disp_font_glyph glyph_hp_fixed_5_7_12 = {
     
    186186  0x04,
    187187  0x7c,
    188   0x02 
     188  0x02
    189189};
    190190struct disp_font_glyph glyph_hp_fixed_5_7_13 = {
     
    198198  0x44,
    199199  0x3c,
    200   0x04 
     200  0x04
    201201};
    202202struct disp_font_glyph glyph_hp_fixed_5_7_14 = {
     
    210210  0x55,
    211211  0x49,
    212   0x41 
     212  0x41
    213213};
    214214struct disp_font_glyph glyph_hp_fixed_5_7_15 = {
     
    222222  0x78,
    223223  0x08,
    224   0x04 
     224  0x04
    225225};
    226226struct disp_font_glyph glyph_hp_fixed_5_7_16 = {
     
    234234  0x7e,
    235235  0x24,
    236   0x18 
     236  0x18
    237237};
    238238struct disp_font_glyph glyph_hp_fixed_5_7_17 = {
     
    246246  0x01,
    247247  0x61,
    248   0x5e 
     248  0x5e
    249249};
    250250struct disp_font_glyph glyph_hp_fixed_5_7_18 = {
     
    258258  0x15,
    259259  0x14,
    260   0x78 
     260  0x78
    261261};
    262262struct disp_font_glyph glyph_hp_fixed_5_7_19 = {
     
    270270  0x45,
    271271  0x3c,
    272   0x40 
     272  0x40
    273273};
    274274struct disp_font_glyph glyph_hp_fixed_5_7_20 = {
     
    282282  0x14,
    283283  0x15,
    284   0x78 
     284  0x78
    285285};
    286286struct disp_font_glyph glyph_hp_fixed_5_7_21 = {
     
    294294  0x44,
    295295  0x3d,
    296   0x40 
     296  0x40
    297297};
    298298struct disp_font_glyph glyph_hp_fixed_5_7_22 = {
     
    306306  0x42,
    307307  0x43,
    308   0x3c 
     308  0x3c
    309309};
    310310struct disp_font_glyph glyph_hp_fixed_5_7_23 = {
     
    318318  0x44,
    319319  0x45,
    320   0x38 
     320  0x38
    321321};
    322322struct disp_font_glyph glyph_hp_fixed_5_7_24 = {
     
    330330  0x40,
    331331  0x41,
    332   0x3c 
     332  0x3c
    333333};
    334334struct disp_font_glyph glyph_hp_fixed_5_7_25 = {
     
    342342  0x40,
    343343  0x42,
    344   0x38 
     344  0x38
    345345};
    346346struct disp_font_glyph glyph_hp_fixed_5_7_26 = {
     
    354354  0x2a,
    355355  0x1c,
    356   0x08 
     356  0x08
    357357};
    358358struct disp_font_glyph glyph_hp_fixed_5_7_27 = {
     
    366366  0x02,
    367367  0x02,
    368   0x02 
     368  0x02
    369369};
    370370struct disp_font_glyph glyph_hp_fixed_5_7_28 = {
     
    378378  0x15,
    379379  0x12,
    380   0x00 
     380  0x00
    381381};
    382382struct disp_font_glyph glyph_hp_fixed_5_7_29 = {
     
    390390  0x49,
    391391  0x41,
    392   0x42 
     392  0x42
    393393};
    394394struct disp_font_glyph glyph_hp_fixed_5_7_30 = {
     
    402402  0x7c,
    403403  0x12,
    404   0x01 
     404  0x01
    405405};
    406406struct disp_font_glyph glyph_hp_fixed_5_7_31 = {
     
    414414  0x00,
    415415  0x00,
    416   0x00 
     416  0x00
    417417};
    418418struct disp_font_glyph glyph_hp_fixed_5_7_32 = {
     
    426426  0x00,
    427427  0x00,
    428   0x00 
     428  0x00
    429429};
    430430struct disp_font_glyph glyph_hp_fixed_5_7_33 = {
     
    438438  0x00,
    439439  0x03,
    440   0x00 
     440  0x00
    441441};
    442442struct disp_font_glyph glyph_hp_fixed_5_7_34 = {
     
    450450  0x14,
    451451  0x7f,
    452   0x14 
     452  0x14
    453453};
    454454struct disp_font_glyph glyph_hp_fixed_5_7_35 = {
     
    462462  0x7f,
    463463  0x2a,
    464   0x12 
     464  0x12
    465465};
    466466struct disp_font_glyph glyph_hp_fixed_5_7_36 = {
     
    474474  0x08,
    475475  0x64,
    476   0x62 
     476  0x62
    477477};
    478478struct disp_font_glyph glyph_hp_fixed_5_7_37 = {
     
    486486  0x56,
    487487  0x20,
    488   0x50 
     488  0x50
    489489};
    490490struct disp_font_glyph glyph_hp_fixed_5_7_38 = {
     
    498498  0x07,
    499499  0x00,
    500   0x00 
     500  0x00
    501501};
    502502struct disp_font_glyph glyph_hp_fixed_5_7_39 = {
     
    510510  0x3e,
    511511  0x41,
    512   0x00 
     512  0x00
    513513};
    514514struct disp_font_glyph glyph_hp_fixed_5_7_40 = {
     
    522522  0x3e,
    523523  0x00,
    524   0x00 
     524  0x00
    525525};
    526526struct disp_font_glyph glyph_hp_fixed_5_7_41 = {
     
    534534  0x1c,
    535535  0x2a,
    536   0x08 
     536  0x08
    537537};
    538538struct disp_font_glyph glyph_hp_fixed_5_7_42 = {
     
    546546  0x3e,
    547547  0x08,
    548   0x08 
     548  0x08
    549549};
    550550struct disp_font_glyph glyph_hp_fixed_5_7_43 = {
     
    558558  0x38,
    559559  0x00,
    560   0x00 
     560  0x00
    561561};
    562562struct disp_font_glyph glyph_hp_fixed_5_7_44 = {
     
    570570  0x08,
    571571  0x08,
    572   0x08 
     572  0x08
    573573};
    574574struct disp_font_glyph glyph_hp_fixed_5_7_45 = {
     
    582582  0x30,
    583583  0x00,
    584   0x00 
     584  0x00
    585585};
    586586struct disp_font_glyph glyph_hp_fixed_5_7_46 = {
     
    594594  0x08,
    595595  0x04,
    596   0x02 
     596  0x02
    597597};
    598598struct disp_font_glyph glyph_hp_fixed_5_7_47 = {
     
    606606  0x49,
    607607  0x45,
    608   0x3e 
     608  0x3e
    609609};
    610610struct disp_font_glyph glyph_hp_fixed_5_7_48 = {
     
    618618  0x7f,
    619619  0x40,
    620   0x00 
     620  0x00
    621621};
    622622struct disp_font_glyph glyph_hp_fixed_5_7_49 = {
     
    630630  0x49,
    631631  0x49,
    632   0x46 
     632  0x46
    633633};
    634634struct disp_font_glyph glyph_hp_fixed_5_7_50 = {
     
    642642  0x49,
    643643  0x49,
    644   0x36 
     644  0x36
    645645};
    646646struct disp_font_glyph glyph_hp_fixed_5_7_51 = {
     
    654654  0x12,
    655655  0x7f,
    656   0x10 
     656  0x10
    657657};
    658658struct disp_font_glyph glyph_hp_fixed_5_7_52 = {
     
    666666  0x45,
    667667  0x45,
    668   0x39 
     668  0x39
    669669};
    670670struct disp_font_glyph glyph_hp_fixed_5_7_53 = {
     
    678678  0x49,
    679679  0x49,
    680   0x30 
     680  0x30
    681681};
    682682struct disp_font_glyph glyph_hp_fixed_5_7_54 = {
     
    690690  0x09,
    691691  0x05,
    692   0x03 
     692  0x03
    693693};
    694694struct disp_font_glyph glyph_hp_fixed_5_7_55 = {
     
    702702  0x49,
    703703  0x49,
    704   0x36 
     704  0x36
    705705};
    706706struct disp_font_glyph glyph_hp_fixed_5_7_56 = {
     
    714714  0x49,
    715715  0x29,
    716   0x1e 
     716  0x1e
    717717};
    718718struct disp_font_glyph glyph_hp_fixed_5_7_57 = {
     
    726726  0x36,
    727727  0x00,
    728   0x00 
     728  0x00
    729729};
    730730struct disp_font_glyph glyph_hp_fixed_5_7_58 = {
     
    738738  0x3b,
    739739  0x00,
    740   0x00 
     740  0x00
    741741};
    742742struct disp_font_glyph glyph_hp_fixed_5_7_59 = {
     
    750750  0x14,
    751751  0x22,
    752   0x41 
     752  0x41
    753753};
    754754struct disp_font_glyph glyph_hp_fixed_5_7_60 = {
     
    762762  0x14,
    763763  0x14,
    764   0x14 
     764  0x14
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    10421042struct disp_font_glyph glyph_hp_fixed_5_7_84 = {
     
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    10541054struct disp_font_glyph glyph_hp_fixed_5_7_85 = {
     
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    10661066struct disp_font_glyph glyph_hp_fixed_5_7_86 = {
     
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    10901090struct disp_font_glyph glyph_hp_fixed_5_7_88 = {
     
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    11011101};
    11021102struct disp_font_glyph glyph_hp_fixed_5_7_89 = {
     
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    11141114struct disp_font_glyph glyph_hp_fixed_5_7_90 = {
     
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    11261126struct disp_font_glyph glyph_hp_fixed_5_7_91 = {
     
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    11381138struct disp_font_glyph glyph_hp_fixed_5_7_92 = {
     
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    11741174struct disp_font_glyph glyph_hp_fixed_5_7_95 = {
     
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    11861186struct disp_font_glyph glyph_hp_fixed_5_7_96 = {
     
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    11981198struct disp_font_glyph glyph_hp_fixed_5_7_97 = {
     
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    12101210struct disp_font_glyph glyph_hp_fixed_5_7_98 = {
     
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    12221222struct disp_font_glyph glyph_hp_fixed_5_7_99 = {
     
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    12461246struct disp_font_glyph glyph_hp_fixed_5_7_101 = {
     
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    12581258struct disp_font_glyph glyph_hp_fixed_5_7_102 = {
     
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    12701270struct disp_font_glyph glyph_hp_fixed_5_7_103 = {
     
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    12821282struct disp_font_glyph glyph_hp_fixed_5_7_104 = {
     
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    12941294struct disp_font_glyph glyph_hp_fixed_5_7_105 = {
     
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    13061306struct disp_font_glyph glyph_hp_fixed_5_7_106 = {
     
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    13181318struct disp_font_glyph glyph_hp_fixed_5_7_107 = {
     
    13261326  0x7f,
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    1328   0x00 
     1328  0x00
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    13301330struct disp_font_glyph glyph_hp_fixed_5_7_108 = {
     
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    13411341};
    13421342struct disp_font_glyph glyph_hp_fixed_5_7_109 = {
     
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    13531353};
    13541354struct disp_font_glyph glyph_hp_fixed_5_7_110 = {
     
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     1364  0x38
    13651365};
    13661366struct disp_font_glyph glyph_hp_fixed_5_7_111 = {
     
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    13771377};
    13781378struct disp_font_glyph glyph_hp_fixed_5_7_112 = {
     
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     1388  0x40
    13891389};
    13901390struct disp_font_glyph glyph_hp_fixed_5_7_113 = {
     
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     1400  0x04
    14011401};
    14021402struct disp_font_glyph glyph_hp_fixed_5_7_114 = {
     
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     1412  0x20
    14131413};
    14141414struct disp_font_glyph glyph_hp_fixed_5_7_115 = {
     
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    14261426struct disp_font_glyph glyph_hp_fixed_5_7_116 = {
     
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    14371437};
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    14491449};
    14501450struct disp_font_glyph glyph_hp_fixed_5_7_118 = {
     
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    14611461};
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    14731473};
    14741474struct disp_font_glyph glyph_hp_fixed_5_7_120 = {
     
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    14851485};
    14861486struct disp_font_glyph glyph_hp_fixed_5_7_121 = {
     
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    15331533};
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    15451545};
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    15571557};
    15581558struct disp_font_glyph glyph_hp_fixed_5_7_127 = {
  • c/src/libchip/flash/am29lv160.c

    rb1274bd9 r3495c57  
    100100
    101101  seg_8 += offset;
    102  
     102
    103103  count = offset & (sizeof (uint32_t) - 1);
    104104  size -= count;
     
    113113      return EIO;
    114114    }
    115  
     115
    116116  seg_32 = (volatile uint32_t*) seg_8;
    117  
    118   count = size  / sizeof (uint32_t); 
     117
     118  count = size  / sizeof (uint32_t);
    119119  size -= count * sizeof (uint32_t);
    120  
     120
    121121  while (count--)
    122122    if (*seg_32++ != 0xffffffff)
     
    128128      return EIO;
    129129    }
    130  
     130
    131131  seg_8 = (volatile uint8_t*) seg_32;
    132132
     
    140140      return EIO;
    141141    }
    142  
     142
    143143  return 0;
    144144}
     
    154154  const rtems_am29lv160_config* ac = &rtems_am29lv160_configuration[device];
    155155  const uint8_t*                addr = ac->base;
    156  
     156
    157157  addr += (sd->offset + (segment - sd->segment) * sd->size) + offset;
    158158
     
    181181      if (((status1 ^ status2) & (1 << 6)) == 0)
    182182        return 0;
    183        
     183
    184184#if AM26LV160_ERROR_TRACE
    185185      printf ("AM26LV160: error bit detected: %p = 0x%04x\n",
     
    231231  volatile uint8_t*     seg = base + offset;
    232232  rtems_interrupt_level level;
    233  
     233
    234234  /*
    235235   * Issue a reset.
    236236   */
    237237  *base = 0xf0;
    238    
     238
    239239  while (size)
    240240  {
     
    243243    *(base + 0x555) = 0x55;
    244244    *(base + 0xaaa) = 0xa0;
    245     *seg = *data++; 
     245    *seg = *data++;
    246246    rtems_interrupt_enable (level);
    247247    if (rtems_am29lv160_toggle_wait_8 (seg++) != 0)
     
    268268
    269269  size /= 2;
    270      
     270
    271271  /*
    272272   * Issue a reset.
    273273   */
    274274  *base = 0xf0;
    275    
     275
    276276  while (size)
    277277  {
     
    290290   * Issue a reset.
    291291   */
    292   *base = 0xf0; 
     292  *base = 0xf0;
    293293
    294294  return 0;
     
    376376      volatile uint8_t* base = ac->base;
    377377      volatile uint8_t* seg  = base + offset;
    378      
     378
    379379      /*
    380380       * Issue a reset.
    381381       */
    382382      rtems_interrupt_disable (level);
    383       *base = 0xf0;   
     383      *base = 0xf0;
    384384      *(base + 0xaaa) = 0xaa;
    385385      *(base + 0x555) = 0x55;
     
    389389      *seg = 0x30;
    390390      rtems_interrupt_enable (level);
    391      
     391
    392392      ret = rtems_am29lv160_toggle_wait_8 (seg);
    393393
     
    414414      *seg = 0x30;
    415415      rtems_interrupt_enable (level);
    416      
     416
    417417      ret = rtems_am29lv160_toggle_wait_16 (seg);
    418418
     
    448448  {
    449449    uint32_t seg_segment;
    450    
     450
    451451    for (seg_segment = 0;
    452452         seg_segment < dd->segments[segment].count;
     
    460460    }
    461461  }
    462  
     462
    463463  return 0;
    464464}
  • c/src/libchip/i2c/i2c-2b-eeprom.c

    rb1274bd9 r3495c57  
    66 */
    77
    8 /* 
     8/*
    99 * Authorship
    1010 * ----------
     
    1212 *     Till Straumann <strauman@slac.stanford.edu>, 2005,
    1313 *         Stanford Linear Accelerator Center, Stanford University.
    14  * 
     14 *
    1515 * Acknowledgement of sponsorship
    1616 * ------------------------------
     
    1818 *     the Stanford Linear Accelerator Center, Stanford University,
    1919 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
    20  * 
     20 *
    2121 * Government disclaimer of liability
    2222 * ----------------------------------
     
    2727 * disclosed, or represents that its use would not infringe privately owned
    2828 * rights.
    29  * 
     29 *
    3030 * Stanford disclaimer of liability
    3131 * --------------------------------
    3232 * Stanford University makes no representations or warranties, express or
    3333 * implied, nor assumes any liability for the use of this software.
    34  * 
     34 *
    3535 * Stanford disclaimer of copyright
    3636 * --------------------------------
    3737 * Stanford University, owner of the copyright, hereby disclaims its
    3838 * copyright and all other rights in this software.  Hence, anyone may
    39  * freely use it for any purpose without restriction. 
    40  * 
     39 * freely use it for any purpose without restriction.
     40 *
    4141 * Maintenance of notices
    4242 * ----------------------
     
    4747 * software made or distributed by the recipient that contains a copy or
    4848 * derivative of this software.
    49  * 
     49 *
    5050 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    51  */ 
     51 */
    5252
    5353
  • c/src/libchip/i2c/i2c-2b-eeprom.h

    rb1274bd9 r3495c57  
    88 */
    99
    10 /* 
     10/*
    1111 * Authorship
    1212 * ----------
     
    1414 *     Till Straumann <strauman@slac.stanford.edu>, 2005,
    1515 *         Stanford Linear Accelerator Center, Stanford University.
    16  * 
     16 *
    1717 * Acknowledgement of sponsorship
    1818 * ------------------------------
     
    2020 *     the Stanford Linear Accelerator Center, Stanford University,
    2121 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
    22  * 
     22 *
    2323 * Government disclaimer of liability
    2424 * ----------------------------------
     
    2929 * disclosed, or represents that its use would not infringe privately owned
    3030 * rights.
    31  * 
     31 *
    3232 * Stanford disclaimer of liability
    3333 * --------------------------------
    3434 * Stanford University makes no representations or warranties, express or
    3535 * implied, nor assumes any liability for the use of this software.
    36  * 
     36 *
    3737 * Stanford disclaimer of copyright
    3838 * --------------------------------
    3939 * Stanford University, owner of the copyright, hereby disclaims its
    4040 * copyright and all other rights in this software.  Hence, anyone may
    41  * freely use it for any purpose without restriction. 
    42  * 
     41 * freely use it for any purpose without restriction.
     42 *
    4343 * Maintenance of notices
    4444 * ----------------------
     
    4949 * software made or distributed by the recipient that contains a copy or
    5050 * derivative of this software.
    51  * 
     51 *
    5252 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    53  */ 
     53 */
    5454
    5555
  • c/src/libchip/i2c/i2c-ds1621.c

    rb1274bd9 r3495c57  
    77 */
    88
    9 /* 
     9/*
    1010 * Authorship
    1111 * ----------
     
    1313 *     Till Straumann <strauman@slac.stanford.edu>, 2005,
    1414 *         Stanford Linear Accelerator Center, Stanford University.
    15  * 
     15 *
    1616 * Acknowledgement of sponsorship
    1717 * ------------------------------
     
    1919 *     the Stanford Linear Accelerator Center, Stanford University,
    2020 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
    21  * 
     21 *
    2222 * Government disclaimer of liability
    2323 * ----------------------------------
     
    2828 * disclosed, or represents that its use would not infringe privately owned
    2929 * rights.
    30  * 
     30 *
    3131 * Stanford disclaimer of liability
    3232 * --------------------------------
    3333 * Stanford University makes no representations or warranties, express or
    3434 * implied, nor assumes any liability for the use of this software.
    35  * 
     35 *
    3636 * Stanford disclaimer of copyright
    3737 * --------------------------------
    3838 * Stanford University, owner of the copyright, hereby disclaims its
    3939 * copyright and all other rights in this software.  Hence, anyone may
    40  * freely use it for any purpose without restriction. 
    41  * 
     40 * freely use it for any purpose without restriction.
     41 *
    4242 * Maintenance of notices
    4343 * ----------------------
     
    4848 * software made or distributed by the recipient that contains a copy or
    4949 * derivative of this software.
    50  * 
     50 *
    5151 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    52  */ 
     52 */
    5353#include <rtems.h>
    5454#include <rtems/libi2c.h>
  • c/src/libchip/i2c/i2c-ds1621.h

    rb1274bd9 r3495c57  
    99 */
    1010
    11 /* 
     11/*
    1212 * Authorship
    1313 * ----------
     
    1515 *     Till Straumann <strauman@slac.stanford.edu>, 2005,
    1616 *         Stanford Linear Accelerator Center, Stanford University.
    17  * 
     17 *
    1818 * Acknowledgement of sponsorship
    1919 * ------------------------------
     
    2121 *     the Stanford Linear Accelerator Center, Stanford University,
    2222 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
    23  * 
     23 *
    2424 * Government disclaimer of liability
    2525 * ----------------------------------
     
    3030 * disclosed, or represents that its use would not infringe privately owned
    3131 * rights.
    32  * 
     32 *
    3333 * Stanford disclaimer of liability
    3434 * --------------------------------
    3535 * Stanford University makes no representations or warranties, express or
    3636 * implied, nor assumes any liability for the use of this software.
    37  * 
     37 *
    3838 * Stanford disclaimer of copyright
    3939 * --------------------------------
    4040 * Stanford University, owner of the copyright, hereby disclaims its
    4141 * copyright and all other rights in this software.  Hence, anyone may
    42  * freely use it for any purpose without restriction. 
    43  * 
     42 * freely use it for any purpose without restriction.
     43 *
    4444 * Maintenance of notices
    4545 * ----------------------
     
    5050 * software made or distributed by the recipient that contains a copy or
    5151 * derivative of this software.
    52  * 
     52 *
    5353 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    54  */ 
     54 */
    5555
    5656#define DS1621_CMD_READ_TEMP    0xaa
  • c/src/libchip/i2c/spi-flash-m25p40.c

    rb1274bd9 r3495c57  
    3939};
    4040
    41 rtems_libi2c_drv_t *spi_flash_m25p40_rw_driver_descriptor = 
     41rtems_libi2c_drv_t *spi_flash_m25p40_rw_driver_descriptor =
    4242&spi_flash_m25p40_rw_drv_t.libi2c_drv_entry;
    4343
     
    5757};
    5858
    59 rtems_libi2c_drv_t *spi_flash_m25p40_ro_driver_descriptor = 
     59rtems_libi2c_drv_t *spi_flash_m25p40_ro_driver_descriptor =
    6060&spi_flash_m25p40_ro_drv_t.libi2c_drv_entry;
  • c/src/libchip/i2c/spi-flash-m25p40.h

    rb1274bd9 r3495c57  
    2222
    2323
    24 #ifndef _LIBCHIP_SPI_FLASH_M25P40_H 
    25 #define _LIBCHIP_SPI_FLASH_M25P40_H 
     24#ifndef _LIBCHIP_SPI_FLASH_M25P40_H
     25#define _LIBCHIP_SPI_FLASH_M25P40_H
    2626
    2727#include <libchip/spi-memdrv.h>
     
    3232
    3333/*
    34  * pass one of these descriptor pointers to rtems_libi2c_register_drv 
     34 * pass one of these descriptor pointers to rtems_libi2c_register_drv
    3535 */
    3636extern rtems_libi2c_drv_t *spi_flash_m25p40_rw_driver_descriptor;
  • c/src/libchip/i2c/spi-fram-fm25l256.c

    rb1274bd9 r3495c57  
    3939};
    4040
    41 rtems_libi2c_drv_t *spi_fram_fm25l256_rw_driver_descriptor = 
     41rtems_libi2c_drv_t *spi_fram_fm25l256_rw_driver_descriptor =
    4242&spi_fram_fm25l256_rw_drv_t.libi2c_drv_entry;
    4343
     
    5757};
    5858
    59 rtems_libi2c_drv_t *spi_fram_fm25l256_ro_driver_descriptor = 
     59rtems_libi2c_drv_t *spi_fram_fm25l256_ro_driver_descriptor =
    6060&spi_fram_fm25l256_ro_drv_t.libi2c_drv_entry;
  • c/src/libchip/i2c/spi-fram-fm25l256.h

    rb1274bd9 r3495c57  
    2222
    2323
    24 #ifndef _LIBCHIP_SPI_FRAM_FM25L256_H 
    25 #define _LIBCHIP_SPI_FRAM_FM25L256_H 
     24#ifndef _LIBCHIP_SPI_FRAM_FM25L256_H
     25#define _LIBCHIP_SPI_FRAM_FM25L256_H
    2626
    2727#include <libchip/spi-memdrv.h>
     
    3232
    3333/*
    34  * pass one of these descriptor pointers to rtems_libi2c_register_drv 
     34 * pass one of these descriptor pointers to rtems_libi2c_register_drv
    3535 */
    3636extern rtems_libi2c_drv_t *spi_fram_fm25l256_rw_driver_descriptor;
  • c/src/libchip/i2c/spi-memdrv.c

    rb1274bd9 r3495c57  
    163163    }
    164164  }
    165   while ((rc == RTEMS_SUCCESSFUL) && 
     165  while ((rc == RTEMS_SUCCESSFUL) &&
    166166         (cnt > bytes_sent)) {
    167167    curr_cnt = cnt - bytes_sent;
    168168    if ((mem_param_ptr->page_size > 0) &&
    169         (off              / mem_param_ptr->page_size) != 
     169        (off              / mem_param_ptr->page_size) !=
    170170        ((off+curr_cnt+1) / mem_param_ptr->page_size)) {
    171171      curr_cnt = mem_param_ptr->page_size - (off % mem_param_ptr->page_size);
     
    186186                               &tfr_mode);
    187187    }
    188    
     188
    189189    /*
    190190     * address device
     
    370370
    371371  if (off >= mem_param_ptr->mem_size) {
    372     /* 
     372    /*
    373373     * HACK: beyond size of memory array? then read status register instead
    374374     */
     
    412412  }
    413413  /*
    414    * fetch read data 
     414   * fetch read data
    415415   */
    416416  if (rc == RTEMS_SUCCESSFUL) {
     
    420420    }
    421421  }
    422    
     422
    423423  /*
    424424   * terminate transfer
  • c/src/libchip/i2c/spi-memdrv.h

    rb1274bd9 r3495c57  
    1818
    1919
    20 #ifndef _LIBCHIP_SPI_MEMDRV_H 
    21 #define _LIBCHIP_SPI_MEMDRV_H 
     20#ifndef _LIBCHIP_SPI_MEMDRV_H
     21#define _LIBCHIP_SPI_MEMDRV_H
    2222
    2323#include <rtems/libi2c.h>
  • c/src/libchip/i2c/spi-sd-card.c

    rb1274bd9 r3495c57  
    675675         * when in SPI mode.  So this will just change the default CRC7 and
    676676         * keep it there for all subsequent commands (which just require a do
    677          * not care CRC byte). 
    678          */     
     677         * not care CRC byte).
     678         */
    679679        SD_CARD_COMMAND_SET_CRC7( e->command, 0x43U);
    680680        rv = sd_card_send_register_command( e, SD_CARD_CMD_SEND_IF_COND, if_cond_reg, &if_cond_reg);
     
    687687         */
    688688        if (rv < 0) {
    689                 /* Failed CMD8, so SD 1.x or MMC */ 
     689                /* Failed CMD8, so SD 1.x or MMC */
    690690                cmd_arg = 0;
    691         } else { 
     691        } else {
    692692                cmd_arg = SD_CARD_FLAG_HCS;
    693693        }
     
    730730                        }
    731731                } else {
    732                         /* 
     732                        /*
    733733                         * Does not seem to be SD card.  Do init for MMC.
    734734                         * First send CMD58 once to enable check for HCS
     
    764764                        }
    765765                }
    766        
     766
    767767                /*
    768768                 * Not idle?
     
    803803                 * Card is MMC.  Unless already proven to be not HCS (< 4.2)
    804804                 * must do CMD58 again to check the OCR bits 30:29.
    805                  */ 
     805                 */
    806806                if (high_capacity) {
    807807                        uint32_t reg = 0;
     
    810810                         * The argument should still be correct since was never
    811811                         * set to 0
    812                          */ 
     812                         */
    813813                        rv = sd_card_send_register_command( e, SD_CARD_CMD_READ_OCR, cmd_arg, &reg);
    814814                        RTEMS_CLEANUP_RV_SC( rv, sc, sd_card_driver_init_cleanup, "Failed CMD58 for MMC 4.2");
     
    907907                e->block_size_shift = 0;
    908908        } else if (e->block_size_shift == 10) {
    909                 /* 
     909                /*
    910910                 * Low capacity 2GByte cards with reported block size of 1024
    911911                 * need to be set back to block size of 512 per 'Simplified
  • c/src/libchip/i2c/spi-sd-card.h

    rb1274bd9 r3495c57  
    6262        uint8_t response [SD_CARD_COMMAND_SIZE];
    6363        int response_index;
    64         uint32_t n_ac_max; 
     64        uint32_t n_ac_max;
    6565        uint32_t block_number;
    6666        uint32_t block_size;
  • c/src/libchip/ide/ata.c

    rb1274bd9 r3495c57  
    247247                       req->bufs[0].block, req->bufnum,
    248248                       areq->regs.regs[IDE_REGISTER_COMMAND]);
    249 #endif           
     249#endif
    250250        }
    251251        else
     
    257257                       req->bufs[0].block, req->bufnum,
    258258                       areq->regs.regs[IDE_REGISTER_COMMAND]);
    259 #endif           
     259#endif
    260260        }
    261261    }
     
    303303    /* add request to the queue of awaiting requests to the controller */
    304304    ata_add_to_controller_queue(ctrl_minor, areq);
    305    
     305
    306306    return RTEMS_SUCCESSFUL;
    307307}
     
    448448    uint16_t         val;
    449449    ISR_Level        level;
    450    
     450
    451451    /* if no requests to controller then do nothing */
    452452    if (rtems_chain_is_empty(&ata_ide_ctrls[ctrl_minor].reqs))
     
    482482    ata_printf("ata_process_request: type: %d\n", areq->type);
    483483#endif
    484    
     484
    485485    /* continue to execute ATA protocols depending on type of request */
    486486    if (areq->type == ATA_COMMAND_TYPE_PIO_OUT)
     
    554554    ata_printf("ata_request_done: entry\n");
    555555#endif
    556    
     556
    557557    ATA_EXEC_CALLBACK(areq, status, error);
    558558    rtems_chain_extract(&areq->link);
    559    
     559
    560560    if (!rtems_chain_is_empty(&ata_ide_ctrls[ctrl_minor].reqs))
    561561    {
     
    564564        return;
    565565    }
    566    
     566
    567567    free(areq);
    568    
     568
    569569#if ATA_DEBUG
    570570    ata_printf("ata_request_done: exit\n");
     
    592592    ata_printf("ata_non_data_request_done: entry\n");
    593593#endif
    594    
     594
    595595    areq->status = status;
    596596    areq->error = error;
     
    614614{
    615615    PREEMPTION_KEY(key);
    616    
     616
    617617    DISABLE_PREEMPTION(key);
    618    
     618
    619619    rtems_chain_append(&ata_ide_ctrls[ctrl_minor].reqs, &areq->link);
    620620    if (rtems_chain_has_only_one_node(&ata_ide_ctrls[ctrl_minor].reqs))
     
    782782      areq->cnt -= ccbuf;
    783783    }
    784    
     784
    785785    if (areq->cnt == 0)
    786786    {
     
    817817    ata_printf("ata_pio_out_protocol:\n");
    818818#endif
    819    
     819
    820820    dev =  areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &
    821821           IDE_REGISTER_DEVICE_HEAD_DEV;
     
    872872    rtems_status_code          rc;
    873873    ISR_Level                  level;
    874    
     874
    875875    PREEMPTION_KEY(key);
    876876
    877877    DISABLE_PREEMPTION(key);
    878    
     878
    879879    while (1)
    880880    {
    881881        ENABLE_PREEMPTION(key);
    882        
     882
    883883        /* get event which has happend */
    884884        rc = rtems_message_queue_receive(ata_queue_id, &msg, &size, RTEMS_WAIT,
     
    891891
    892892        DISABLE_PREEMPTION(key);
    893        
     893
    894894        /* get current request to the controller */
    895895        _ISR_Disable(level);
    896896        areq = (ata_req_t *)(ata_ide_ctrls[ctrl_minor].reqs.first);
    897897        _ISR_Enable(level);
    898        
     898
    899899        switch(msg.type)
    900900        {
     
    10131013    rtems_status_code         status;
    10141014    rtems_device_minor_number rel_minor;
    1015    
     1015
    10161016    rel_minor = (rtems_filesystem_dev_minor_t(device)) /
    10171017                ATA_MINOR_NUM_RESERVED_PER_ATA_DEVICE;
     
    10411041            status = RTEMS_SUCCESSFUL;
    10421042            break;
    1043            
     1043
    10441044        default:
    10451045            return rtems_blkdev_ioctl (dd, cmd, argp);
     
    11091109#endif
    11101110#endif
    1111    
     1111
    11121112    /* create queue for asynchronous requests handling */
    11131113    status = rtems_message_queue_create(
     
    11291129    status = rtems_task_create(
    11301130                 rtems_build_name ('A', 'T', 'A', 'T'),
    1131                  ((rtems_ata_driver_task_priority > 0) 
     1131                 ((rtems_ata_driver_task_priority > 0)
    11321132                  ? rtems_ata_driver_task_priority
    11331133                  : ATA_DRIVER_TASK_DEFAULT_PRIORITY),
     
    13631363          ATA_DEV_INFO(ctrl_minor,1).present = true;
    13641364        }
    1365        
     1365
    13661366        /* for each found ATA device obtain it configuration */
    13671367        for (dev = 0; dev < 2; dev++)
     
    14061406            ATA_DEV_INFO(ctrl_minor, dev).sectors =
    14071407                CF_LE_W(buffer[ATA_IDENT_WORD_NUM_OF_CURR_LOG_SECS]);
    1408             ATA_DEV_INFO(ctrl_minor, dev).lba_sectors = 
     1408            ATA_DEV_INFO(ctrl_minor, dev).lba_sectors =
    14091409                CF_LE_W(buffer[ATA_IDENT_WORD_NUM_OF_USR_SECS1]);
    14101410            ATA_DEV_INFO(ctrl_minor, dev).lba_sectors <<= 16;
     
    14991499    uint16_t           val, val1;
    15001500    volatile unsigned  retries;
    1501    
     1501
    15021502    assert(areq);
    15031503
  • c/src/libchip/ide/ide_controller.c

    rb1274bd9 r3495c57  
    6161        if ((IDE_Controller_Table[minor].probe == NULL ||
    6262             IDE_Controller_Table[minor].probe(minor)) &&
    63             (IDE_Controller_Table[minor].fns->ctrl_probe == NULL || 
     63            (IDE_Controller_Table[minor].fns->ctrl_probe == NULL ||
    6464             IDE_Controller_Table[minor].fns->ctrl_probe(minor)))
    6565        {
  • c/src/libchip/ide/ide_ctrl_cfg.h

    rb1274bd9 r3495c57  
    22 * ide_ctrl_cfg.h
    33 *
    4  * LibChip library IDE controller header file - structures used for 
     4 * LibChip library IDE controller header file - structures used for
    55 * configuration and plugin interface definition.
    66 *
  • c/src/libchip/network/elnk.c

    rb1274bd9 r3495c57  
    12491249xl_miibus_readreg(
    12501250   struct elnk_softc    *sc,
    1251    int                  phy, 
     1251   int                  phy,
    12521252   int                  reg )
    12531253{
     
    12791279xl_miibus_writereg(
    12801280   struct elnk_softc            *sc,
    1281    int                  phy, 
    1282    int                  reg, 
     1281   int                  phy,
     1282   int                  reg,
    12831283   int                  data )
    12841284{
     
    26582658         xl_miibus_writereg(sc, 0x18, MII_BMCR, BMCR_STARTNEG | BMCR_AUTOEN );
    26592659
    2660          for (i=0; ((sr = xl_miibus_readreg(sc, 0x18, MII_BMSR)) & BMSR_ACOMP) == 0 && i < 20; i++) 
     2660         for (i=0; ((sr = xl_miibus_readreg(sc, 0x18, MII_BMSR)) & BMSR_ACOMP) == 0 && i < 20; i++)
    26612661            DELAY(10000);
    26622662      }
  • c/src/libchip/network/greth.c

    rb1274bd9 r3495c57  
    115115
    116116   struct arpcom arpcom;
    117    
     117
    118118   greth_regs *regs;
    119    
     119
    120120   int acceptBroadcast;
    121121   rtems_id rxDaemonTid;
    122122   rtems_id txDaemonTid;
    123    
     123
    124124   unsigned int tx_ptr;
    125125   unsigned int tx_dptr;
     
    133133   struct mbuf **txmbuf;
    134134   rtems_vector_number vector;
    135    
     135
    136136   /*Status*/
    137137   struct phy_device_info phydev;
     
    142142   int auto_neg;
    143143   unsigned int auto_neg_time;
    144    
     144
    145145   /*
    146146    * Statistics
    147147    */
    148148   unsigned long rxInterrupts;
    149    
     149
    150150   unsigned long rxPackets;
    151151   unsigned long rxLengthError;
     
    153153   unsigned long rxBadCRC;
    154154   unsigned long rxOverrun;
    155    
     155
    156156   unsigned long txInterrupts;
    157    
     157
    158158   unsigned long txDeferred;
    159159   unsigned long txHeartbeat;
     
    181181        uint32_t status;
    182182        /* read and clear interrupt cause */
    183        
     183
    184184        status = greth.regs->status;
    185185        greth.regs->status = status;
    186        
     186
    187187        /* Frame received? */
    188188        if (status & (GRETH_STATUS_RXERR | GRETH_STATUS_RXIRQ))
     
    226226}
    227227
    228 static void print_init_info(struct greth_softc *sc) 
     228static void print_init_info(struct greth_softc *sc)
    229229{
    230230        printf("greth: driver attached\n");
     
    271271
    272272    regs = sc->regs;
    273    
     273
    274274    /* Reset the controller.  */
    275275    greth.rxInterrupts = 0;
     
    279279    regs->ctrl = GRETH_CTRL_RST;        /* Reset ON */
    280280    regs->ctrl = 0;                     /* Reset OFF */
    281    
     281
    282282    /* Check if mac is gbit capable*/
    283     sc->gbit_mac = (regs->ctrl >> 27) & 1; 
    284    
     283    sc->gbit_mac = (regs->ctrl >> 27) & 1;
     284
    285285    /* Get the phy address which assumed to have been set
    286286       correctly with the reset value in hardware*/
     
    289289    /* get phy control register default values */
    290290    while ((phyctrl = read_mii(phyaddr, 0)) & 0x8000) {}
    291    
     291
    292292    /* reset PHY and wait for completion */
    293293    write_mii(phyaddr, 0, 0x8000 | phyctrl);
    294294
    295295    while ((read_mii(phyaddr, 0)) & 0x8000) {}
    296    
    297     /* Check if PHY is autoneg capable and then determine operating mode, 
     296
     297    /* Check if PHY is autoneg capable and then determine operating mode,
    298298       otherwise force it to 10 Mbit halfduplex */
    299299    sc->gb = 0;
     
    375375    sc->phydev.rev = 0;
    376376    phystatus = read_mii(phyaddr, 1);
    377    
     377
    378378    /*Read out PHY info if extended registers are available */
    379     if (phystatus & 1) { 
     379    if (phystatus & 1) {
    380380            tmp1 = read_mii(phyaddr, 2);
    381381            tmp2 = read_mii(phyaddr, 3);
     
    419419    regs->txdesc = (int) sc->txdesc;
    420420    regs->rxdesc = (int) sc->rxdesc;
    421    
     421
    422422    sc->rxmbuf = calloc(sc->rxbufs, sizeof(*sc->rxmbuf));
    423423    sc->txmbuf = calloc(sc->txbufs, sizeof(*sc->txmbuf));
     
    451451
    452452    /* set ethernet address.  */
    453     regs->mac_addr_msb = 
     453    regs->mac_addr_msb =
    454454      sc->arpcom.ac_enaddr[0] << 8 | sc->arpcom.ac_enaddr[1];
    455     regs->mac_addr_lsb = 
     455    regs->mac_addr_lsb =
    456456      sc->arpcom.ac_enaddr[2] << 24 | sc->arpcom.ac_enaddr[3] << 16 |
    457457      sc->arpcom.ac_enaddr[4] << 8 | sc->arpcom.ac_enaddr[5];
     
    482482    unsigned int len, len_status, bad;
    483483    rtems_event_set events;
    484    
     484
    485485    for (;;)
    486486      {
     
    488488                                    RTEMS_WAIT | RTEMS_EVENT_ANY,
    489489                                    RTEMS_NO_TIMEOUT, &events);
    490        
     490
    491491#ifdef GRETH_ETH_DEBUG
    492492    printf ("r\n");
     
    563563            }
    564564      }
    565    
     565
    566566}
    567567
     
    574574    struct mbuf *n;
    575575    unsigned int len;
    576    
     576
    577577    /*printf("Send packet entered\n");*/
    578578    if (inside) printf ("error: sendpacket re-entered!!\n");
     
    615615                    break;
    616616    }
    617    
     617
    618618    m_freem (n);
    619    
     619
    620620    /* don't send long packets */
    621621
     
    624624                    dp->txdesc[dp->tx_ptr].ctrl = GRETH_TXD_ENABLE | len;
    625625            } else {
    626                     dp->txdesc[dp->tx_ptr].ctrl = 
     626                    dp->txdesc[dp->tx_ptr].ctrl =
    627627                            GRETH_TXD_WRAP | GRETH_TXD_ENABLE | len;
    628628            }
     
    646646         * Waiting for Transmitter ready
    647647         */
    648        
     648
    649649        len = 0;
    650650#ifdef GRETH_DEBUG
     
    675675                    if ((m->m_next) == NULL) {
    676676                            dp->txdesc[dp->tx_ptr].ctrl = GRETH_TXD_ENABLE | GRETH_TXD_CS | m->m_len;
    677                             break; 
     677                            break;
    678678                    } else {
    679679                            dp->txdesc[dp->tx_ptr].ctrl = GRETH_TXD_ENABLE | GRETH_TXD_MORE | GRETH_TXD_CS | m->m_len;
     
    681681            } else {
    682682                    if ((m->m_next) == NULL) {
    683                             dp->txdesc[dp->tx_ptr].ctrl = 
     683                            dp->txdesc[dp->tx_ptr].ctrl =
    684684                                    GRETH_TXD_WRAP | GRETH_TXD_ENABLE | GRETH_TXD_CS | m->m_len;
    685685                            break;
    686686                    } else {
    687                             dp->txdesc[dp->tx_ptr].ctrl = 
     687                            dp->txdesc[dp->tx_ptr].ctrl =
    688688                                    GRETH_TXD_WRAP | GRETH_TXD_ENABLE | GRETH_TXD_MORE | GRETH_TXD_CS | m->m_len;
    689689                    }
     
    693693            dp->tx_cnt++;
    694694            m = m->m_next;
    695            
     695
    696696    }
    697697        dp->txmbuf[dp->tx_ptr] = m;
     
    712712    struct mbuf *m;
    713713    rtems_event_set events;
    714    
     714
    715715    for (;;)
    716716    {
     
    718718             * Wait for packet
    719719             */
    720            
     720
    721721            rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
    722722                                        RTEMS_EVENT_ANY | RTEMS_WAIT,
     
    725725            printf ("t\n");
    726726#endif
    727            
     727
    728728            /*
    729729             * Send packets till queue is empty
    730730             */
    731            
    732            
     731
     732
    733733            for (;;)
    734734            {
     
    755755    struct mbuf *m;
    756756    rtems_event_set events;
    757    
     757
    758758    for (;;)
    759759    {
     
    761761             * Wait for packet
    762762             */
    763            
     763
    764764            rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
    765765                                        RTEMS_EVENT_ANY | RTEMS_WAIT,
     
    768768            printf ("t\n");
    769769#endif
    770            
     770
    771771            /*
    772772             * Send packets till queue is empty
     
    796796{
    797797    struct greth_softc *sc = ifp->if_softc;
    798    
     798
    799799    ifp->if_flags |= IFF_OACTIVE;
    800800    rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
    801    
     801
    802802}
    803803
     
    831831                                                          greth_txDaemon, sc);
    832832          }
    833          
     833
    834834      }
    835835
     
    964964    sc->txbufs = chip->txd_count;
    965965    sc->rxbufs = chip->rxd_count;
    966    
     966
    967967    /*
    968968     * Set up network interface values
  • c/src/libchip/network/greth.h

    rb1274bd9 r3495c57  
    3838#define GRETH_TOTAL_BD           128
    3939#define GRETH_MAXBUF_LEN         1520
    40                                
    41 /* Tx BD */                     
     40
     41/* Tx BD */
    4242#define GRETH_TXD_ENABLE      0x0800 /* Tx BD Enable */
    4343#define GRETH_TXD_WRAP        0x1000 /* Tx BD Wrap (last BD) */
     
    5959                               GRETH_TXD_TCPCS           | \
    6060                               GRETH_TXD_UDPCS)
    61                                
    62 /* Rx BD */                     
     61
     62/* Rx BD */
    6363#define GRETH_RXD_ENABLE      0x0800 /* Rx BD Enable */
    6464#define GRETH_RXD_WRAP        0x1000 /* Rx BD Wrap (last BD) */
    6565#define GRETH_RXD_IRQ         0x2000 /* Rx BD IRQ Enable */
    6666
    67 #define GRETH_RXD_DRIBBLE     0x4000 /* Rx BD Dribble Nibble Status */                               
     67#define GRETH_RXD_DRIBBLE     0x4000 /* Rx BD Dribble Nibble Status */
    6868#define GRETH_RXD_TOOLONG     0x8000 /* Rx BD Too Long Status */
    6969#define GRETH_RXD_CRCERR      0x10000 /* Rx BD CRC Error Status */
     
    132132
    133133/* PHY data */
    134 struct phy_device_info 
     134struct phy_device_info
    135135{
    136136   int vendor;
    137137   int device;
    138138   int rev;
    139    
     139
    140140   int adv;
    141141   int part;
  • c/src/libchip/network/if_dc.c

    rb1274bd9 r3495c57  
    33 * Ported from FreeBSD --> RTEMS, december 03.
    44 *      Daron Chabot <daron@nucleus.usask.ca>
    5  *      -- only tested with i386 bsp. 
     5 *      -- only tested with i386 bsp.
    66 *      -- supports *one* card (until the PCI & IRQ APIs get sorted out ;-))
    77 *
    8  * 
     8 *
    99 * Copyright (c) 1997, 1998, 1999
    1010 *      Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
     
    113113        #warning The if_dc driver is untested on the PPC platform !!!
    114114#endif
    115  
     115
    116116
    117117#if defined(DRIVER_SUPPORTED) /* this covers the file "globally"... */
     
    136136#include <sys/systm.h>
    137137#include <bsp.h>
    138  
     138
    139139/* moved to cpukit/include/rtems in CVS current ! */
    140140/*#include "if_media.h" */
     
    152152#if defined(__i386__)
    153153#define vtophys(p)  (u_int32_t)(p)
    154 #else 
     154#else
    155155#define vtophys(p)  vtophys(p)
    156156#endif
    157  
     157
    158158/*
    159159#include <net/if_arp.h>
     
    180180#endif
    181181
    182 /* NOTE: use mem space mapping (for now ...) 
     182/* NOTE: use mem space mapping (for now ...)
    183183#define DC_USEIOSPACE
    184184*/
    185  
     185
    186186#ifdef __alpha__
    187187#define SRM_MEDIA
     
    190190#include <bsp/irq.h>
    191191
    192  
     192
    193193#include "if_dcreg.h"
    194194
     
    206206
    207207
    208  
     208
    209209#ifndef lint
    210210static const char rcsid[] =
     
    213213
    214214#endif
    215  
    216  
     215
     216
    217217/*
    218218 * Various supported device vendors/types and their names.
     
    418418/* XXX Fixme: rtems_bsp_delay( ) for the pc386 BSP (at least)
    419419 * needs work... see pc386/include/bsp.h.
    420  * I have "a" solution, utilizing the 2nd i8254 timer, 
    421  * if anyone is interested (first timer is used for clock_tick ISR)... 
     420 * I have "a" solution, utilizing the 2nd i8254 timer,
     421 * if anyone is interested (first timer is used for clock_tick ISR)...
    422422 */
    423423#ifdef __i386__
     
    755755        struct dc_softc         *sc;
    756756        struct dc_mii_frame     *frame;
    757        
     757
    758758{
    759759        int                     i, ack, s;
     
    767767        frame->mii_turnaround = 0;
    768768        frame->mii_data = 0;
    769        
     769
    770770        /*
    771771         * Sync the PHYs.
     
    825825        struct dc_softc         *sc;
    826826        struct dc_mii_frame     *frame;
    827        
     827
    828828{
    829829        int                     s;
     
    839839        /*
    840840         * Sync the PHYs.
    841          */     
     841         */
    842842        dc_mii_sync(sc);
    843843
     
    12281228        }
    12291229#endif
    1230        
     1230
    12311231        if (ifp->if_flags & IFF_BROADCAST) {
    12321232                h = dc_crc_le(sc, (caddr_t)&etherbroadcastaddr);
     
    13331333        ac_enaddr = (u_int32_t *)&sc->arpcom.ac_enaddr[0];
    13341334        CSR_WRITE_4(sc, DC_AX_FILTDATA, *ac_enaddr);
    1335            
     1335
    13361336        CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR1);
    13371337
     
    15471547                }
    15481548        }
    1549 #endif 
     1549#endif
    15501550
    15511551        if ((media & IFM_GMASK) == IFM_FDX) {
     
    16161616        int                     rc;
    16171617
    1618        
     1618
    16191619        t = dc_devs;
    16201620
     
    16281628                                                                        DC_PCI_CFRV, &rev);
    16291629                        rev &= 0xFF;
    1630                        
     1630
    16311631                        if (t->dc_did == DC_DEVICEID_98713 &&
    16321632                            rev >= DC_REVISION_98713A)
     
    19021902        return (BSP_irq_enabled_at_i8259s(irq->name));
    19031903}
    1904        
     1904
    19051905
    19061906/*
     
    19111911rtems_dc_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
    19121912{
    1913         int                             rc;     
     1913        int                             rc;
    19141914        u_char                  eaddr[ETHER_ADDR_LEN];
    1915        
     1915
    19161916        char                    *unitName;
    19171917        int                     unitNumber;
    1918        
     1918
    19191919        uint32_t                command;
    19201920        struct dc_softc         *sc;
     
    19241924        int                     error = 0, mac_offset;
    19251925        uint32_t                value;
    1926        
     1926
    19271927        /*
    19281928         * Get the instance number for the board we're going to configure
     
    19481948        }
    19491949        memset(sc, 0,  sizeof(struct dc_softc));
    1950        
     1950
    19511951        /*unit = device_get_unit(dev);*/
    19521952        sc->dc_unit = unitNumber;
    19531953        sc->dc_name = unitName;
    1954        
     1954
    19551955        /*
    19561956         * Handle power management nonsense.
     
    19661966        t = sc->dc_info;
    19671967
    1968        
     1968
    19691969        /*
    19701970         * Map control/status registers.
     
    20152015                                        DC_PCI_CFBMA, &value);
    20162016        sc->membase = value;
    2017        
     2017
    20182018        /* Allocate interrupt */
    20192019        memset(&sc->irqInfo, 0, sizeof(rtems_irq_connect_data));
     
    20212021        pci_read_config_dword(t->dc_bus,t->dc_dev,t->dc_fun,\
    20222022                                        DC_PCI_CFIT, &value);
    2023        
     2023
    20242024        sc->irqInfo.name = value & 0xFF;
    20252025        sc->irqInfo.hdl = (rtems_irq_hdl)dc_intr;
     
    20282028        sc->irqInfo.off = nop;
    20292029        sc->irqInfo.isOn = decISON;
    2030        
     2030
    20312031#ifdef BSP_SHARED_HANDLER_SUPPORT
    20322032        rc = BSP_install_rtems_shared_irq_handler( &sc->irqInfo );
     
    20372037                rtems_panic("Can't install dec2114x irq handler.\n");
    20382038        }
    2039        
    2040        
     2039
     2040
    20412041#if 0
    20422042        rid = 0;
     
    20622062#endif
    20632063
    2064        
     2064
    20652065        /* Need this info to decide on a chip type.
    20662066        sc->dc_info = dc_devtype(dev);
     
    22042204                                                DC_PCI_CFDD, command);
    22052205        }
    2206        
    2207        
     2206
     2207
    22082208        /*
    22092209         * Try to learn something about the supported media.
     
    22692269
    22702270        sc->dc_ldata = malloc(sizeof(struct dc_list_data), M_DEVBUF, M_NOWAIT);
    2271        
     2271
    22722272        if (sc->dc_ldata == NULL) {
    22732273                printk("dc%d: no memory for list buffers!\n", sc->dc_unit);
     
    22842284
    22852285        bzero(sc->dc_ldata, sizeof(struct dc_list_data));
    2286        
     2286
    22872287        ifp = &sc->arpcom.ac_if;
    22882288        ifp->if_softc = sc;
     
    23482348        }
    23492349#endif
    2350        
     2350
    23512351        /*
    23522352         * Call MI attach routine.
     
    23832383                command &= ~(DC_CFDD_SNOOZE_MODE|DC_CFDD_SLEEP_MODE);
    23842384                switch ((command >> 8) & 0xff) {
    2385                 case 3: 
     2385                case 3:
    23862386                        sc->dc_srm_media = IFM_10_T;
    23872387                        break;
    2388                 case 4: 
     2388                case 4:
    23892389                        sc->dc_srm_media = IFM_10_T | IFM_FDX;
    23902390                        break;
    2391                 case 5: 
     2391                case 5:
    23922392                        sc->dc_srm_media = IFM_100_TX;
    23932393                        break;
    2394                 case 6: 
     2394                case 6:
    23952395                        sc->dc_srm_media = IFM_100_TX | IFM_FDX;
    23962396                        break;
     
    26642664         */
    26652665        dc_newbuf(sc, i, m);
    2666         bcopy(ptr, mtod(m, char *), total_len); 
     2666        bcopy(ptr, mtod(m, char *), total_len);
    26672667        cur_rx->dc_status = rxstat | DC_RXSTAT_FIRSTFRAG;
    26682668
     
    27602760                 * frames as errors since they could be vlans
    27612761                 */
    2762                 if ((rxstat & DC_RXSTAT_RXERR)){ 
     2762                if ((rxstat & DC_RXSTAT_RXERR)){
    27632763                        if (!(rxstat & DC_RXSTAT_GIANT) ||
    27642764                            (rxstat & (DC_RXSTAT_CRCERR | DC_RXSTAT_DRIBBLE |
     
    27792779                }
    27802780
    2781                 /* No errors; receive the packet. */   
     2781                /* No errors; receive the packet. */
    27822782                total_len -= ETHER_CRC_LEN;
    27832783
     
    31693169                                        RTEMS_NO_TIMEOUT,
    31703170                                        &events);
    3171                                        
    3172                
     3171
     3172
    31733173                ifp = &sc->arpcom.ac_if;
    3174        
     3174
    31753175                while((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) {
    31763176
     
    34353435        case 16:
    34363436                DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_16LONG);
    3437                 break; 
     3437                break;
    34383438        case 8:
    34393439                DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_8LONG);
    3440                 break; 
     3440                break;
    34413441        case 0:
    34423442        default:
     
    35243524        if (sc->dc_flags & DC_TULIP_LEDS) {
    35253525                CSR_WRITE_4(sc, DC_WATCHDOG,
    3526                     DC_WDOG_CTLWREN|DC_WDOG_LINK|DC_WDOG_ACTIVITY);   
     3526                    DC_WDOG_CTLWREN|DC_WDOG_LINK|DC_WDOG_ACTIVITY);
    35273527                CSR_WRITE_4(sc, DC_WATCHDOG, 0);
    35283528        }
     
    35643564
    35653565                ifr.ifr_media = sc->dc_srm_media;
    3566                 ifmedia_ioctl(ifp, &ifr, &mii->mii_media, SIOCSIFMEDIA);               
     3566                ifmedia_ioctl(ifp, &ifr, &mii->mii_media, SIOCSIFMEDIA);
    35673567                sc->dc_srm_media = 0;
    35683568        }
  • c/src/libchip/network/if_dcreg.h

    rb1274bd9 r3495c57  
    536536 * Special ASIX-specific bits in the ASIX NETCFG register (CSR6).
    537537 */
    538 #define DC_AX_NETCFG_RX_BROAD   0x00000100 
     538#define DC_AX_NETCFG_RX_BROAD   0x00000100
    539539
    540540/*
     
    628628                DC_CLRBIT(sc, DC_PN_GPIO, (r));         \
    629629        }
    630        
     630
    631631/* shortcut MII access register */
    632632#define DC_PN_MII_DATA          0x0000FFFF
     
    707707        u_int32_t               dc_txthresh;
    708708        u_int8_t                *dc_srom;
    709         struct dc_mediainfo     *dc_mi;         
     709        struct dc_mediainfo     *dc_mi;
    710710/*
    711711        struct callout_handle   dc_stat_ch;
     
    821821#define DC_REVISION_82C169      0x20
    822822
    823 /* 
     823/*
    824824 * Lite-On PNIC II device ID. Note: this is actually a Macronix 98715A
    825825 * with wake on lan/magic packet support.
  • c/src/libchip/network/open_eth.c

    rb1274bd9 r3495c57  
    244244    write_mii(0, mii_cr | 0x8000);
    245245    while (read_mii(0) & 0x8000) {}
    246     if (!sc->en100MHz) write_mii(0, 0); 
     246    if (!sc->en100MHz) write_mii(0, 0);
    247247    mii_cr = read_mii(0);
    248248    printf("open_eth: driver attached, PHY config : 0x%04" PRIx32 "\n", read_mii(0));
  • c/src/libchip/network/smc91111.c

    rb1274bd9 r3495c57  
    4848   4 for packet allocation/free output
    4949   8 for only startup status, so we can tell we're installed OK
    50    16 dump phy read/write 
     50   16 dump phy read/write
    5151   32 precise register dump
    5252   64 dump packets
     
    5454/*#define DEBUG (-1)*/
    5555/*#define DEBUG (-1 & ~(16))*/
    56 #define DEBUG (0) 
     56#define DEBUG (0)
    5757
    5858#include "smc91111config.h"
     
    570570                CYG_ASSERT(sdata, "!No sg data pointer here");
    571571
    572                 /* start on an odd offset? 
     572                /* start on an odd offset?
    573573                 * If last byte also (1byte mbuf with different pointer should not occur)
    574574                 * let following code handle it
     
    580580                        len--;
    581581                }
    582                
     582
    583583                /* speed up copying a bit, never copy last word */
    584584                while(len >= 17){
     
    594594                        len -= 16;
    595595                }
    596                
     596
    597597                /* copy word wise, skip last word */
    598598                while (len >= 3) {
     
    600600                        len -= sizeof(*sdata);
    601601                }
    602                
     602
    603603                /* one or two bytes left to put into fifo */
    604604                if ( len > 1 ){
     
    16381638                regval[i] = get_reg(cpd, regno);
    16391639        }
    1640         printk("---- BANK %d ----\n\r",bank);   
     1640        printk("---- BANK %d ----\n\r",bank);
    16411641        for(i=0; i<8; i++){
    16421642                printk("0x%x: 0x%x\n\r",i,regval[i]);
  • c/src/libchip/network/smc91111.h

    rb1274bd9 r3495c57  
    357357
    358358    scmv91111_configuration_t config;
    359  
     359
    360360    /* backend */
    361361    int rpc_cur_mode;
     
    363363    int phyaddr;
    364364    unsigned int lastPhy18;
    365  
     365
    366366    int txbusy;                         /* A packet has been sent*/
    367367    unsigned long txkey;                /* Used to ack when packet sent*/
     
    396396
    397397static debug_regs_pair debug_regs[] = {
    398   {LAN91CXX_TCR        , "LAN91CXX_TCR"       ,0}, 
    399   {LAN91CXX_EPH_STATUS , "LAN91CXX_EPH_STATUS",0}, 
    400   {LAN91CXX_RCR        , "LAN91CXX_RCR"       ,0},         
    401   {LAN91CXX_COUNTER    , "LAN91CXX_COUNTER"   ,0},     
    402   {LAN91CXX_MIR        , "LAN91CXX_MIR"       ,0},         
    403   {LAN91CXX_MCR        , "LAN91CXX_MCR"       ,0},         
    404   {LAN91CXX_RPCR       , "LAN91CXX_RPCR"      ,0},       
    405   {LAN91CXX_RESERVED_0 , "LAN91CXX_RESERVED_0",0}, 
    406   {LAN91CXX_BS         , "LAN91CXX_BS"        ,0},         
    407   {LAN91CXX_CONFIG     , "LAN91CXX_CONFIG"    ,0},     
    408   {LAN91CXX_BASE_REG   , "LAN91CXX_BASE_REG"  ,0},   
    409   {LAN91CXX_IA01       , "LAN91CXX_IA01"      ,0},       
    410   {LAN91CXX_IA23       , "LAN91CXX_IA23"      ,0},       
    411   {LAN91CXX_IA45       , "LAN91CXX_IA45"      ,0},       
    412   {LAN91CXX_GENERAL    , "LAN91CXX_GENERAL"   ,0},     
    413   {LAN91CXX_CONTROL    , "LAN91CXX_CONTROL"   ,0},     
    414   {LAN91CXX_BS2        , "LAN91CXX_BS2"       ,0},         
    415   {LAN91CXX_MMU_COMMAND, "LAN91CXX_MMU_COMMAND",0}, 
    416   {LAN91CXX_PNR        , "LAN91CXX_PNR"        ,0},         
    417   {LAN91CXX_FIFO_PORTS , "LAN91CXX_FIFO_PORTS" ,0}, 
    418   {LAN91CXX_POINTER    , "LAN91CXX_POINTER"    ,0},     
    419   {LAN91CXX_DATA_HIGH  , "LAN91CXX_DATA_HIGH"  ,0},   
    420   {LAN91CXX_DATA       , "LAN91CXX_DATA"       ,0},       
     398  {LAN91CXX_TCR        , "LAN91CXX_TCR"       ,0},
     399  {LAN91CXX_EPH_STATUS , "LAN91CXX_EPH_STATUS",0},
     400  {LAN91CXX_RCR        , "LAN91CXX_RCR"       ,0},
     401  {LAN91CXX_COUNTER    , "LAN91CXX_COUNTER"   ,0},
     402  {LAN91CXX_MIR        , "LAN91CXX_MIR"       ,0},
     403  {LAN91CXX_MCR        , "LAN91CXX_MCR"       ,0},
     404  {LAN91CXX_RPCR       , "LAN91CXX_RPCR"      ,0},
     405  {LAN91CXX_RESERVED_0 , "LAN91CXX_RESERVED_0",0},
     406  {LAN91CXX_BS         , "LAN91CXX_BS"        ,0},
     407  {LAN91CXX_CONFIG     , "LAN91CXX_CONFIG"    ,0},
     408  {LAN91CXX_BASE_REG   , "LAN91CXX_BASE_REG"  ,0},
     409  {LAN91CXX_IA01       , "LAN91CXX_IA01"      ,0},
     410  {LAN91CXX_IA23       , "LAN91CXX_IA23"      ,0},
     411  {LAN91CXX_IA45       , "LAN91CXX_IA45"      ,0},
     412  {LAN91CXX_GENERAL    , "LAN91CXX_GENERAL"   ,0},
     413  {LAN91CXX_CONTROL    , "LAN91CXX_CONTROL"   ,0},
     414  {LAN91CXX_BS2        , "LAN91CXX_BS2"       ,0},
     415  {LAN91CXX_MMU_COMMAND, "LAN91CXX_MMU_COMMAND",0},
     416  {LAN91CXX_PNR        , "LAN91CXX_PNR"        ,0},
     417  {LAN91CXX_FIFO_PORTS , "LAN91CXX_FIFO_PORTS" ,0},
     418  {LAN91CXX_POINTER    , "LAN91CXX_POINTER"    ,0},
     419  {LAN91CXX_DATA_HIGH  , "LAN91CXX_DATA_HIGH"  ,0},
     420  {LAN91CXX_DATA       , "LAN91CXX_DATA"       ,0},
    421421  {LAN91CXX_INTERRUPT  , "LAN91CXX_INTERRUPT"  ,0},
    422422  {LAN91CXX_BS3        , "LAN91CXX_BS3"        ,0},
    423423  {LAN91CXX_MT01       , "LAN91CXX_MT01"       ,0},
    424   {LAN91CXX_MT23       , "LAN91CXX_MT23"       ,0},   
    425   {LAN91CXX_MT45       , "LAN91CXX_MT45"       ,0},     
     424  {LAN91CXX_MT23       , "LAN91CXX_MT23"       ,0},
     425  {LAN91CXX_MT45       , "LAN91CXX_MT45"       ,0},
    426426  {LAN91CXX_MT67       , "LAN91CXX_MT67"       ,0},
    427427/*{LAN91CXX_MGMT       , "LAN91CXX_MGMT"       ,0},      */
    428   {LAN91CXX_REVISION   , "LAN91CXX_REVISION"   ,0}, 
    429   {LAN91CXX_ERCV       , "LAN91CXX_ERCV"       ,0},     
    430   {LAN91CXX_BS4        , "LAN91CXX_BS4"        ,0},             
    431 
    432 
    433  
     428  {LAN91CXX_REVISION   , "LAN91CXX_REVISION"   ,0},
     429  {LAN91CXX_ERCV       , "LAN91CXX_ERCV"       ,0},
     430  {LAN91CXX_BS4        , "LAN91CXX_BS4"        ,0},
     431
     432
     433
    434434  {-1,0}
    435435};
     
    449449    HAL_READ_UINT16(cpd->base+((regno&0x7)), val);
    450450    val = CYG_LE16_TO_CPU(val);
    451    
     451
    452452    /*rtems_interrupt_enable(Irql);*/
    453453
     
    463463    db2_printf("%sread  reg %d:%x -> 0x%04x\n", dbg_prefix, regno>>3,(regno&0x7)*2, val);
    464464#endif
    465    
     465
    466466    return val;
    467467}
     
    486486    db2_printf("%swrite reg %d:%x <- 0x%04x\n", dbg_prefix, regno>>3,(regno&0x7)*2, val);
    487487#endif
    488    
     488
    489489    /*rtems_interrupt_disable(Irql);*/
    490    
     490
    491491    HAL_WRITE_UINT16(cpd->base+(LAN91CXX_BS), CYG_CPU_TO_LE16(regno>>3));
    492492    HAL_WRITE_UINT16(cpd->base+((regno&0x7)), CYG_CPU_TO_LE16(val));
    493    
     493
    494494    /*rtems_interrupt_enable(Irql);*/
    495495
     
    504504{
    505505    db2_printf("%s[wdata] <- 0x%04x\n", dbg_prefix, val);
    506    
     506
    507507    HAL_WRITE_UINT16(cpd->base+((LAN91CXX_DATA & 0x7)), val);
    508508
     
    514514{
    515515    db2_printf("%s[bdata] <- 0x%02x\n", dbg_prefix, val);
    516    
     516
    517517    HAL_WRITE_UINT8(((unsigned char *)(cpd->base+((LAN91CXX_DATA & 0x7))))+1, val);
    518518
     
    527527{
    528528    rxd_t val;
    529        
     529
    530530#ifdef LAN91CXX_32BIT_RX
    531531    HAL_READ_UINT32(cpd->base+((LAN91CXX_DATA_HIGH & 0x7)), val);
     
    546546{
    547547    unsigned short val;
    548    
     548
    549549    HAL_READ_UINT16(cpd->base+(LAN91CXX_BS), val);
    550550    val = CYG_LE16_TO_CPU(val);
  • c/src/libchip/rtc/ds1375-rtc.h

    rb1274bd9 r3495c57  
    55/* Driver for the Maxim 1375 i2c RTC (TOD only; very simple...) */
    66
    7 /* 
     7/*
    88 * Authorship
    99 * ----------
     
    1212 *     Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
    1313 *         Stanford Linear Accelerator Center, Stanford University.
    14  * 
     14 *
    1515 * Acknowledgement of sponsorship
    1616 * ------------------------------
     
    1818 *     the Stanford Linear Accelerator Center, Stanford University,
    1919 *         under Contract DE-AC03-76SFO0515 with the Department of Energy.
    20  * 
     20 *
    2121 * Government disclaimer of liability
    2222 * ----------------------------------
     
    2727 * disclosed, or represents that its use would not infringe privately owned
    2828 * rights.
    29  * 
     29 *
    3030 * Stanford disclaimer of liability
    3131 * --------------------------------
    3232 * Stanford University makes no representations or warranties, express or
    3333 * implied, nor assumes any liability for the use of this software.
    34  * 
     34 *
    3535 * Stanford disclaimer of copyright
    3636 * --------------------------------
    3737 * Stanford University, owner of the copyright, hereby disclaims its
    3838 * copyright and all other rights in this software.  Hence, anyone may
    39  * freely use it for any purpose without restriction. 
    40  * 
     39 * freely use it for any purpose without restriction.
     40 *
    4141 * Maintenance of notices
    4242 * ----------------------
     
    4747 * software made or distributed by the recipient that contains a copy or
    4848 * derivative of this software.
    49  * 
     49 *
    5050 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    51  */ 
     51 */
    5252
    5353#include <rtems.h>
  • c/src/libchip/rtc/ds1375.c

    rb1274bd9 r3495c57  
    33/* Driver for the Maxim 1375 i2c RTC (TOD only; very simple...) */
    44
    5 /* 
     5/*
    66 * Authorship
    77 * ----------
     
    1010 *     Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
    1111 *      Stanford Linear Accelerator Center, Stanford University.
    12  * 
     12 *
    1313 * Acknowledgement of sponsorship
    1414 * ------------------------------
     
    1616 *     the Stanford Linear Accelerator Center, Stanford University,
    1717 *      under Contract DE-AC03-76SFO0515 with the Department of Energy.
    18  * 
     18 *
    1919 * Government disclaimer of liability
    2020 * ----------------------------------
     
    2525 * disclosed, or represents that its use would not infringe privately owned
    2626 * rights.
    27  * 
     27 *
    2828 * Stanford disclaimer of liability
    2929 * --------------------------------
    3030 * Stanford University makes no representations or warranties, express or
    3131 * implied, nor assumes any liability for the use of this software.
    32  * 
     32 *
    3333 * Stanford disclaimer of copyright
    3434 * --------------------------------
    3535 * Stanford University, owner of the copyright, hereby disclaims its
    3636 * copyright and all other rights in this software.  Hence, anyone may
    37  * freely use it for any purpose without restriction. 
    38  * 
     37 * freely use it for any purpose without restriction.
     38 *
    3939 * Maintenance of notices
    4040 * ----------------------
     
    4545 * software made or distributed by the recipient that contains a copy or
    4646 * derivative of this software.
    47  * 
     47 *
    4848 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
    49  */ 
     49 */
    5050
    5151/* This driver uses the file-system interface to the i2c bus */
     
    7979    }                               \
    8080  } while (0)
    81  
     81
    8282
    8383STATIC uint8_t ds1375_bcd2bin(uint8_t x)
     
    191191   * the register pointer.
    192192   */
    193  
     193
    194194  d[0] = off;
    195195  memcpy( d + 1, buf, len );
     
    291291  buf[DS1375_DAT_OFF] = ds1375_bin2bcd( time->day    );
    292292  buf[DS1375_MON_OFF] = ds1375_bin2bcd( time->month  );
    293  
     293
    294294  if ( time->year >= 2000 ) {
    295295    buf[DS1375_YR_OFF]   = ds1375_bin2bcd( time->year - 2000 );
     
    324324
    325325  rval = 0;
    326  
     326
    327327cleanup:
    328328  if ( fd >= 0 ) {
     
    353353rtems_time_of_day rtod;
    354354time_t            secs;
    355  
    356   ds1375_get_time( 0, &rtod );   
     355
     356  ds1375_get_time( 0, &rtod );
    357357  secs = _TOD_To_seconds( &rtod );
    358358  printf( "%s\n", ctime( &secs ) );
     
    375375  if ( ! prt )
    376376    prt = &rt;
    377  
     377
    378378  secs = mktime( &tm );
    379379
     
    418418int     fd;
    419419uint8_t v = value;
    420  
     420
    421421  if ( ( fd = open( (const char*)port, O_RDWR ) ) >= 0 ) {
    422422    wr_bytes( fd, reg, &v, 1 );
  • c/src/libchip/rtc/mc146818a.c

    rb1274bd9 r3495c57  
    11/*
    2  *  This file interfaces with the real-time clock found in 
     2 *  This file interfaces with the real-time clock found in
    33 *  a Motorola MC146818A (common on PC hardware)
    44 *
     
    100100      rtems_interrupt_flash( level );
    101101  }
    102  
     102
    103103  /*
    104104   * Read the time (we have at least 244 usec to do this)
     
    151151   */
    152152  (*setReg)( mc146818a, MC146818A_STATUSB, MC146818ASB_HALT|MC146818ASB_24HR );
    153  
     153
    154154  if ( time->year >= 2088 )
    155155    rtems_fatal_error_occurred( RTEMS_INVALID_NUMBER );
     
    161161  (*setReg)( mc146818a, MC146818A_MIN,   To_BCD(time->minute) );
    162162  (*setReg)( mc146818a, MC146818A_SEC,   To_BCD(time->second) );
    163  
     163
    164164  /*
    165165   * Restart the RTC
  • c/src/libchip/rtc/mc146818a.h

    rb1274bd9 r3495c57  
    4444#define  MC146818ASD_PWR       0x80   /* clock lost power */
    4545
    46  
     46
    4747/*
    4848 *  Driver function table
  • c/src/libchip/serial/ns16550.c

    rb1274bd9 r3495c57  
    2020 *  This driver uses the termios pseudo driver.
    2121 */
    22  
     22
    2323/*
    2424 * $Id$
  • c/src/libchip/shmdr/poll.c

    rb1274bd9 r3495c57  
    5050  status = rtems_timer_create( rtems_build_name( 'S', 'H', 'P', 'L' ), &id );
    5151  assert( !status );
    52  
     52
    5353  status = rtems_timer_fire_after( id, 1, Shm_Poll_TSR, NULL );
    5454  assert( !status );
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