Ignore:
Timestamp:
04/15/14 14:20:17 (9 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
2e06be4
Parents:
b80f920
git-author:
Sebastian Huber <sebastian.huber@…> (04/15/14 14:20:17)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/16/14 07:07:33)
Message:

score: Critical fix for SMP

The _Scheduler_SMP_Allocate_processor() and _Thread_Dispatch() exchange
information without locks. Make sure we use the right load/store
ordering.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/include/rtems/score/cpustdatomic.h

    rb80f920 r33d0666  
    5555
    5656/**
    57  * @brief the enumeration Atomic_Memory_barrier specifies the detailed regular
    58  * memory synchronization operations used in the atomic operation API
    59  * definitions.
     57 * @brief Memory order according to ISO/IEC 9899:2011.
    6058 */
    6159typedef enum {
    62   /** no operation orders memory. */
    6360  ATOMIC_ORDER_RELAXED = memory_order_relaxed,
    64   /** a load operation performs an acquire operation on the affected memory
    65   * location. This flag guarantees that the effects of load operation are
    66   * completed before the effects of any later data accesses.
    67   */
    6861  ATOMIC_ORDER_ACQUIRE = memory_order_acquire,
    69   /** a store operation performs a release operation on the affected memory
    70   * location. This flag guarantee that all effects of all previous data
    71   * accesses are completed before the store operation takes place.
    72   */
    73   ATOMIC_ORDER_RELEASE = memory_order_release
     62  ATOMIC_ORDER_RELEASE = memory_order_release,
     63  ATOMIC_ORDER_SEQ_CST = memory_order_seq_cst
    7464} Atomic_Order;
    7565
Note: See TracChangeset for help on using the changeset viewer.