Changeset 33d0666 in rtems

Timestamp:

04/15/14 14:20:17 (9 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

4.11, 5, master

Children:

2e06be4

Parents:

b80f920

git-author:

Sebastian Huber <sebastian.huber@…> (04/15/14 14:20:17)

git-committer:

Sebastian Huber <sebastian.huber@…> (04/16/14 07:07:33)

Message:

score: Critical fix for SMP

The _Scheduler_SMP_Allocate_processor() and _Thread_Dispatch() exchange
information without locks. Make sure we use the right load/store
ordering.

Location:

cpukit/score

Files:

• include/rtems/score/cpustdatomic.h (modified) (1 diff)
• include/rtems/score/schedulersmpimpl.h (modified) (1 diff)
• src/threaddispatch.c (modified) (1 diff)

cpukit/score/include/rtems/score/cpustdatomic.h

@@ -55 +55 @@
 
 /**
- * @brief the enumeration Atomic_Memory_barrier specifies the detailed regular
- * memory synchronization operations used in the atomic operation API
- * definitions.
+ * @brief Memory order according to ISO/IEC 9899:2011.
  */
 typedef enum {
-  /** no operation orders memory. */
   ATOMIC_ORDER_RELAXED = memory_order_relaxed,
-  /** a load operation performs an acquire operation on the affected memory
-  * location. This flag guarantees that the effects of load operation are
-  * completed before the effects of any later data accesses.
-  */
   ATOMIC_ORDER_ACQUIRE = memory_order_acquire,
-  /** a store operation performs a release operation on the affected memory
-  * location. This flag guarantee that all effects of all previous data
-  * accesses are completed before the store operation takes place.
-  */
-  ATOMIC_ORDER_RELEASE = memory_order_release
+  ATOMIC_ORDER_RELEASE = memory_order_release,
+  ATOMIC_ORDER_SEQ_CST = memory_order_seq_cst
 } Atomic_Order;
 

cpukit/score/include/rtems/score/schedulersmpimpl.h

@@ -93 +93 @@
     _Thread_Set_CPU( heir, cpu_of_victim );
 
+    cpu_of_victim->heir = heir;
+
     /*
-     * FIXME: Here we need atomic store operations with a relaxed memory order.
-     * The _CPU_SMP_Send_interrupt() will ensure that the change can be
-     * observed consistently.
+     * It is critical that we first update the heir and then the dispatch
+     * necessary so that _Thread_Dispatch() cannot miss an update.
      */
-    cpu_of_victim->heir = heir;
+    _Atomic_Fence( ATOMIC_ORDER_RELEASE );
+
     cpu_of_victim->dispatch_necessary = true;
 

cpukit/score/src/threaddispatch.c

@@ -98 +98 @@
   while ( per_cpu->dispatch_necessary ) {
 #endif
+    per_cpu->dispatch_necessary = false;
+
+#if defined( RTEMS_SMP )
+    /*
+     * It is critical that we first update the dispatch necessary and then the
+     * read the heir so that we don't miss an update by
+     * _Scheduler_SMP_Allocate_processor().
+     */
+    _Atomic_Fence( ATOMIC_ORDER_SEQ_CST );
+#endif
+
     heir = per_cpu->heir;
-    per_cpu->dispatch_necessary = false;
     per_cpu->executing = heir;
+
 #if defined( RTEMS_SMP )
     executing->is_executing = false;