Changeset 3380ee8 in rtems


Ignore:
Timestamp:
Apr 22, 2014, 5:46:53 AM (5 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
e10574a
Parents:
f17e171
git-author:
Sebastian Huber <sebastian.huber@…> (04/22/14 05:46:53)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/22/14 06:34:45)
Message:

score: Use common names for per-CPU variables

Use "cpu" for an arbitrary Per_CPU_Control variable.

Use "cpu_self" for the Per_CPU_Control of the current processor.

Use "cpu_index" for an arbitrary processor index.

Use "cpu_index_self" for the processor index of the current processor.

Use "cpu_count" for the processor count obtained via
_SMP_Get_processor_count().

Use "cpu_max" for the processor maximum obtained by
rtems_configuration_get_maximum_processors().

Location:
cpukit
Files:
15 edited

Legend:

Unmodified
Added
Removed
  • cpukit/libmisc/cpuuse/cpuusagereset.c

    rf17e171 r3380ee8  
    4141{
    4242  #ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
    43     uint32_t processor_count;
    44     uint32_t processor;
     43    uint32_t cpu_count;
     44    uint32_t cpu_index;
    4545
    4646    _TOD_Get_uptime( &CPU_usage_Uptime_at_last_reset );
    4747
    48     processor_count = rtems_get_processor_count();
    49     for ( processor = 0 ; processor < processor_count ; ++processor ) {
    50       Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( processor );
     48    cpu_count = rtems_get_processor_count();
     49    for ( cpu_index = 0 ; cpu_index < cpu_count ; ++cpu_index ) {
     50      Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    5151
    52       per_cpu->time_of_last_context_switch = CPU_usage_Uptime_at_last_reset;
     52      cpu->time_of_last_context_switch = CPU_usage_Uptime_at_last_reset;
    5353    }
    5454  #else
  • cpukit/score/include/rtems/score/percpu.h

    rf17e171 r3380ee8  
    348348
    349349#if defined( RTEMS_SMP )
    350 #define _Per_CPU_Acquire( per_cpu ) \
     350#define _Per_CPU_Acquire( cpu ) \
    351351  _SMP_ticket_lock_Acquire( \
    352     &( per_cpu )->Lock, \
    353     &( per_cpu )->Lock_stats_context \
     352    &( cpu )->Lock, \
     353    &( cpu )->Lock_stats_context \
    354354  )
    355355#else
    356 #define _Per_CPU_Acquire( per_cpu ) \
    357   do { \
    358     (void) ( per_cpu ); \
    359   } while ( 0 )
    360 #endif
    361 
    362 #if defined( RTEMS_SMP )
    363 #define _Per_CPU_Release( per_cpu ) \
     356#define _Per_CPU_Acquire( cpu ) \
     357  do { \
     358    (void) ( cpu ); \
     359  } while ( 0 )
     360#endif
     361
     362#if defined( RTEMS_SMP )
     363#define _Per_CPU_Release( cpu ) \
    364364  _SMP_ticket_lock_Release( \
    365     &( per_cpu )->Lock, \
    366     &( per_cpu )->Lock_stats_context \
     365    &( cpu )->Lock, \
     366    &( cpu )->Lock_stats_context \
    367367  )
    368368#else
    369 #define _Per_CPU_Release( per_cpu ) \
    370   do { \
    371     (void) ( per_cpu ); \
    372   } while ( 0 )
    373 #endif
    374 
    375 #if defined( RTEMS_SMP )
    376 #define _Per_CPU_ISR_disable_and_acquire( per_cpu, isr_cookie ) \
     369#define _Per_CPU_Release( cpu ) \
     370  do { \
     371    (void) ( cpu ); \
     372  } while ( 0 )
     373#endif
     374
     375#if defined( RTEMS_SMP )
     376#define _Per_CPU_ISR_disable_and_acquire( cpu, isr_cookie ) \
    377377  do { \
    378378    _ISR_Disable_without_giant( isr_cookie ); \
    379     _Per_CPU_Acquire( per_cpu ); \
    380   } while ( 0 )
    381 #else
    382 #define _Per_CPU_ISR_disable_and_acquire( per_cpu, isr_cookie ) \
     379    _Per_CPU_Acquire( cpu ); \
     380  } while ( 0 )
     381#else
     382#define _Per_CPU_ISR_disable_and_acquire( cpu, isr_cookie ) \
    383383  do { \
    384384    _ISR_Disable( isr_cookie ); \
    385     (void) ( per_cpu ); \
    386   } while ( 0 )
    387 #endif
    388 
    389 #if defined( RTEMS_SMP )
    390 #define _Per_CPU_Release_and_ISR_enable( per_cpu, isr_cookie ) \
    391   do { \
    392     _Per_CPU_Release( per_cpu ); \
     385    (void) ( cpu ); \
     386  } while ( 0 )
     387#endif
     388
     389#if defined( RTEMS_SMP )
     390#define _Per_CPU_Release_and_ISR_enable( cpu, isr_cookie ) \
     391  do { \
     392    _Per_CPU_Release( cpu ); \
    393393    _ISR_Enable_without_giant( isr_cookie ); \
    394394  } while ( 0 )
    395395#else
    396 #define _Per_CPU_Release_and_ISR_enable( per_cpu, isr_cookie ) \
    397   do { \
    398     (void) ( per_cpu ); \
     396#define _Per_CPU_Release_and_ISR_enable( cpu, isr_cookie ) \
     397  do { \
     398    (void) ( cpu ); \
    399399    _ISR_Enable( isr_cookie ); \
    400400  } while ( 0 )
     
    444444static inline Per_CPU_Control *_Per_CPU_Get( void )
    445445{
    446   Per_CPU_Control *per_cpu = _Per_CPU_Get_snapshot();
     446  Per_CPU_Control *cpu_self = _Per_CPU_Get_snapshot();
    447447
    448448  _Assert(
    449     per_cpu->thread_dispatch_disable_level != 0 || _ISR_Get_level() != 0
     449    cpu_self->thread_dispatch_disable_level != 0 || _ISR_Get_level() != 0
    450450  );
    451451
    452   return per_cpu;
     452  return cpu_self;
    453453}
    454454#else
     
    461461}
    462462
    463 static inline uint32_t _Per_CPU_Get_index( const Per_CPU_Control *per_cpu )
     463static inline uint32_t _Per_CPU_Get_index( const Per_CPU_Control *cpu )
    464464{
    465465  const Per_CPU_Control_envelope *per_cpu_envelope =
    466     ( const Per_CPU_Control_envelope * ) per_cpu;
     466    ( const Per_CPU_Control_envelope * ) cpu;
    467467
    468468  return ( uint32_t ) ( per_cpu_envelope - &_Per_CPU_Information[ 0 ] );
     
    470470
    471471static inline bool _Per_CPU_Is_processor_started(
    472   const Per_CPU_Control *per_cpu
     472  const Per_CPU_Control *cpu
    473473)
    474474{
    475475#if defined( RTEMS_SMP )
    476   return per_cpu->started;
    477 #else
    478   (void) per_cpu;
     476  return cpu->started;
     477#else
     478  (void) cpu;
    479479
    480480  return true;
     
    484484#if defined( RTEMS_SMP )
    485485
    486 static inline void _Per_CPU_Send_interrupt( const Per_CPU_Control *per_cpu )
     486static inline void _Per_CPU_Send_interrupt( const Per_CPU_Control *cpu )
    487487{
    488   _CPU_SMP_Send_interrupt( _Per_CPU_Get_index( per_cpu ) );
     488  _CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu ) );
    489489}
    490490
     
    497497
    498498void _Per_CPU_State_change(
    499   Per_CPU_Control *per_cpu,
     499  Per_CPU_Control *cpu,
    500500  Per_CPU_State new_state
    501501);
  • cpukit/score/include/rtems/score/profiling.h

    rf17e171 r3380ee8  
    3939
    4040static inline void _Profiling_Thread_dispatch_disable(
    41   Per_CPU_Control *per_cpu,
     41  Per_CPU_Control *cpu,
    4242  uint32_t previous_thread_dispatch_disable_level
    4343)
     
    4545#if defined( RTEMS_PROFILING )
    4646  if ( previous_thread_dispatch_disable_level == 0 ) {
    47     Per_CPU_Stats *stats = &per_cpu->Stats;
     47    Per_CPU_Stats *stats = &cpu->Stats;
    4848
    4949    stats->thread_dispatch_disabled_instant = _CPU_Counter_read();
     
    5151  }
    5252#else
    53   (void) per_cpu;
     53  (void) cpu;
    5454  (void) previous_thread_dispatch_disable_level;
    5555#endif
     
    5757
    5858static inline void _Profiling_Thread_dispatch_enable(
    59   Per_CPU_Control *per_cpu,
     59  Per_CPU_Control *cpu,
    6060  uint32_t new_thread_dispatch_disable_level
    6161)
     
    6363#if defined( RTEMS_PROFILING )
    6464  if ( new_thread_dispatch_disable_level == 0 ) {
    65     Per_CPU_Stats *stats = &per_cpu->Stats;
     65    Per_CPU_Stats *stats = &cpu->Stats;
    6666    CPU_Counter_ticks now = _CPU_Counter_read();
    6767    CPU_Counter_ticks delta = _CPU_Counter_difference(
     
    7777  }
    7878#else
    79   (void) per_cpu;
     79  (void) cpu;
    8080  (void) new_thread_dispatch_disable_level;
    8181#endif
     
    8383
    8484static inline void _Profiling_Update_max_interrupt_delay(
    85   Per_CPU_Control *per_cpu,
     85  Per_CPU_Control *cpu,
    8686  CPU_Counter_ticks interrupt_delay
    8787)
    8888{
    8989#if defined( RTEMS_PROFILING )
    90   Per_CPU_Stats *stats = &per_cpu->Stats;
     90  Per_CPU_Stats *stats = &cpu->Stats;
    9191
    9292  if ( stats->max_interrupt_delay < interrupt_delay ) {
     
    9494  }
    9595#else
    96   (void) per_cpu;
     96  (void) cpu;
    9797  (void) interrupt_delay;
    9898#endif
     
    100100
    101101void _Profiling_Outer_most_interrupt_entry_and_exit(
    102   Per_CPU_Control *per_cpu,
     102  Per_CPU_Control *cpu,
    103103  CPU_Counter_ticks interrupt_entry_instant,
    104104  CPU_Counter_ticks interrupt_exit_instant
  • cpukit/score/include/rtems/score/smpimpl.h

    rf17e171 r3380ee8  
    108108static inline void _SMP_Inter_processor_interrupt_handler( void )
    109109{
    110   Per_CPU_Control *self_cpu = _Per_CPU_Get();
     110  Per_CPU_Control *cpu_self = _Per_CPU_Get();
    111111
    112   if ( self_cpu->message != 0 ) {
     112  if ( cpu_self->message != 0 ) {
    113113    uint32_t  message;
    114114    ISR_Level level;
    115115
    116     _Per_CPU_ISR_disable_and_acquire( self_cpu, level );
    117     message = self_cpu->message;
    118     self_cpu->message = 0;
    119     _Per_CPU_Release_and_ISR_enable( self_cpu, level );
     116    _Per_CPU_ISR_disable_and_acquire( cpu_self, level );
     117    message = cpu_self->message;
     118    cpu_self->message = 0;
     119    _Per_CPU_Release_and_ISR_enable( cpu_self, level );
    120120
    121121    if ( ( message & SMP_MESSAGE_SHUTDOWN ) != 0 ) {
     
    131131 *  The target processor may be the sending processor.
    132132 *
    133  *  @param[in] cpu The target processor of the message.
     133 *  @param[in] cpu_index The target processor of the message.
    134134 *  @param[in] message The message.
    135135 */
    136 void _SMP_Send_message( uint32_t cpu, uint32_t message );
     136void _SMP_Send_message( uint32_t cpu_index, uint32_t message );
    137137
    138138/**
  • cpukit/score/src/cpuset.c

    rf17e171 r3380ee8  
    3333void _CPU_set_Handler_initialization()
    3434{
    35   int i;
    36   int max_cpus;
     35  uint32_t cpu_count;
     36  uint32_t cpu_index;
    3737
    3838  /* We do not support a cpu count over CPU_SETSIZE  */
    39   max_cpus = _SMP_Get_processor_count();
     39  cpu_count = _SMP_Get_processor_count();
    4040
    4141  /* This should never happen */
    42   _Assert( max_cpus <= CPU_SETSIZE );
     42  _Assert( cpu_count <= CPU_SETSIZE );
    4343
    4444  /*  Initialize the affinity to be the set of all available CPU's   */
     
    4747  CPU_ZERO_S( cpuset_default.setsize, &cpuset_default.preallocated );
    4848
    49   for (i=0; i<max_cpus; i++)
    50     CPU_SET_S(i, cpuset_default.setsize, cpuset_default.set );
     49  for (cpu_index=0; cpu_index<cpu_count; cpu_index++)
     50    CPU_SET_S((int) cpu_index, cpuset_default.setsize, cpuset_default.set );
    5151}
    5252
  • cpukit/score/src/debugisthreaddispatchingallowed.c

    rf17e171 r3380ee8  
    2525    bool dispatch_allowed;
    2626    ISR_Level level;
    27     Per_CPU_Control *per_cpu;
     27    Per_CPU_Control *cpu_self;
    2828
    2929    _ISR_Disable_without_giant( level );
    30     per_cpu = _Per_CPU_Get_snapshot();
    31     dispatch_allowed = per_cpu->thread_dispatch_disable_level == 0;
     30    cpu_self = _Per_CPU_Get_snapshot();
     31    dispatch_allowed = cpu_self->thread_dispatch_disable_level == 0;
    3232    _ISR_Enable_without_giant( level );
    3333
  • cpukit/score/src/isr.c

    rf17e171 r3380ee8  
    4242  {
    4343    size_t stack_size = rtems_configuration_get_interrupt_stack_size();
    44     uint32_t max_cpus = rtems_configuration_get_maximum_processors();
    45     uint32_t cpu;
     44    uint32_t cpu_max = rtems_configuration_get_maximum_processors();
     45    uint32_t cpu_index;
    4646
    4747    if ( !_Stack_Is_enough( stack_size ) )
     
    5252      );
    5353
    54     for ( cpu = 0 ; cpu < max_cpus; ++cpu ) {
    55       Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
     54    for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) {
     55      Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    5656      void *low = _Workspace_Allocate_or_fatal_error( stack_size );
    5757      void *high = _Addresses_Add_offset( low, stack_size );
     
    6161#endif
    6262
    63       per_cpu->interrupt_stack_low = low;
    64       per_cpu->interrupt_stack_high = high;
     63      cpu->interrupt_stack_low = low;
     64      cpu->interrupt_stack_high = high;
    6565
    6666      /*
     
    7272#if defined(_CPU_Interrupt_stack_setup)
    7373      _CPU_Interrupt_stack_setup(
    74         per_cpu->interrupt_stack_low,
    75         per_cpu->interrupt_stack_high
     74        cpu->interrupt_stack_low,
     75        cpu->interrupt_stack_high
    7676      );
    7777#endif
  • cpukit/score/src/percpu.c

    rf17e171 r3380ee8  
    3030
    3131static void _Per_CPU_State_busy_wait(
    32   const Per_CPU_Control *per_cpu,
     32  const Per_CPU_Control *cpu,
    3333  Per_CPU_State new_state
    3434)
    3535{
    36   Per_CPU_State state = per_cpu->state;
     36  Per_CPU_State state = cpu->state;
    3737
    3838  switch ( new_state ) {
     
    4343      ) {
    4444        _CPU_SMP_Processor_event_receive();
    45         state = per_cpu->state;
     45        state = cpu->state;
    4646      }
    4747      break;
     
    5252      ) {
    5353        _CPU_SMP_Processor_event_receive();
    54         state = per_cpu->state;
     54        state = cpu->state;
    5555      }
    5656      break;
     
    109109
    110110void _Per_CPU_State_change(
    111   Per_CPU_Control *per_cpu,
     111  Per_CPU_Control *cpu,
    112112  Per_CPU_State new_state
    113113)
     
    117117  Per_CPU_State next_state;
    118118
    119   _Per_CPU_State_busy_wait( per_cpu, new_state );
     119  _Per_CPU_State_busy_wait( cpu, new_state );
    120120
    121121  _SMP_lock_ISR_disable_and_acquire( lock, &lock_context );
    122122
    123   next_state = _Per_CPU_State_get_next( per_cpu->state, new_state );
    124   per_cpu->state = next_state;
     123  next_state = _Per_CPU_State_get_next( cpu->state, new_state );
     124  cpu->state = next_state;
    125125
    126126  if ( next_state == PER_CPU_STATE_SHUTDOWN ) {
    127     uint32_t ncpus = rtems_configuration_get_maximum_processors();
    128     uint32_t cpu;
     127    uint32_t cpu_max = rtems_configuration_get_maximum_processors();
     128    uint32_t cpu_index;
    129129
    130     for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
    131       Per_CPU_Control *other_cpu = _Per_CPU_Get_by_index( cpu );
     130    for ( cpu_index = 0 ; cpu_index < cpu_max ; ++cpu_index ) {
     131      Per_CPU_Control *cpu_other = _Per_CPU_Get_by_index( cpu_index );
    132132
    133       if ( per_cpu != other_cpu ) {
    134         switch ( other_cpu->state ) {
     133      if ( cpu_other != cpu ) {
     134        switch ( cpu_other->state ) {
    135135          case PER_CPU_STATE_UP:
    136             _SMP_Send_message( cpu, SMP_MESSAGE_SHUTDOWN );
     136            _SMP_Send_message( cpu_index, SMP_MESSAGE_SHUTDOWN );
    137137            break;
    138138          default:
     
    141141        }
    142142
    143         other_cpu->state = PER_CPU_STATE_SHUTDOWN;
     143        cpu_other->state = PER_CPU_STATE_SHUTDOWN;
    144144      }
    145145    }
  • cpukit/score/src/profilingisrentryexit.c

    rf17e171 r3380ee8  
    2020
    2121void _Profiling_Outer_most_interrupt_entry_and_exit(
    22   Per_CPU_Control *per_cpu,
     22  Per_CPU_Control *cpu,
    2323  CPU_Counter_ticks interrupt_entry_instant,
    2424  CPU_Counter_ticks interrupt_exit_instant
     
    2626{
    2727#if defined( RTEMS_PROFILING )
    28   Per_CPU_Stats *stats = &per_cpu->Stats;
     28  Per_CPU_Stats *stats = &cpu->Stats;
    2929  CPU_Counter_ticks delta = _CPU_Counter_difference(
    3030    interrupt_exit_instant,
     
    3939  }
    4040#else
    41   (void) per_cpu;
     41  (void) cpu;
    4242  (void) interrupt_entry_instant;
    4343  (void) interrupt_exit_instant;
  • cpukit/score/src/smp.c

    rf17e171 r3380ee8  
    4242static void _SMP_Start_processors( uint32_t cpu_count )
    4343{
    44   uint32_t cpu_self = _SMP_Get_current_processor();
     44  uint32_t cpu_index_self = _SMP_Get_current_processor();
    4545  uint32_t cpu_index;
    4646
     
    4949    const Scheduler_Assignment *assignment =
    5050      _Scheduler_Get_assignment( cpu_index );
    51     Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu_index );
     51    Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    5252    bool started;
    5353
    54     if ( cpu_index != cpu_self ) {
     54    if ( cpu_index != cpu_index_self ) {
    5555      if ( _Scheduler_Should_start_processor( assignment ) ) {
    5656        started = _CPU_SMP_Start_processor( cpu_index );
     
    7070    }
    7171
    72     per_cpu->started = started;
     72    cpu->started = started;
    7373
    7474    if ( started ) {
     
    8787
    8888  for ( cpu_index = 0 ; cpu_index < cpu_max; ++cpu_index ) {
    89     Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu_index );
     89    Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    9090
    91     _SMP_ticket_lock_Initialize( &per_cpu->Lock, "per-CPU" );
     91    _SMP_ticket_lock_Initialize( &cpu->Lock, "per-CPU" );
    9292  }
    9393
     
    117117{
    118118  Per_CPU_Control *self_cpu = _Per_CPU_Get();
    119   uint32_t ncpus = _SMP_Get_processor_count();
    120   uint32_t cpu;
     119  uint32_t cpu_count = _SMP_Get_processor_count();
     120  uint32_t cpu_index;
    121121
    122122  _Per_CPU_State_change( self_cpu, PER_CPU_STATE_READY_TO_START_MULTITASKING );
    123123
    124   for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
    125     Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
     124  for ( cpu_index = 0 ; cpu_index < cpu_count ; ++cpu_index ) {
     125    Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    126126
    127     _Per_CPU_State_change( per_cpu, PER_CPU_STATE_REQUEST_START_MULTITASKING );
     127    _Per_CPU_State_change( cpu, PER_CPU_STATE_REQUEST_START_MULTITASKING );
    128128  }
    129129}
     
    157157}
    158158
    159 void _SMP_Send_message( uint32_t cpu, uint32_t message )
     159void _SMP_Send_message( uint32_t cpu_index, uint32_t message )
    160160{
    161   Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( cpu );
     161  Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    162162  ISR_Level level;
    163163
    164   _Per_CPU_ISR_disable_and_acquire( per_cpu, level );
    165   per_cpu->message |= message;
    166   _Per_CPU_Release_and_ISR_enable( per_cpu, level );
     164  _Per_CPU_ISR_disable_and_acquire( cpu, level );
     165  cpu->message |= message;
     166  _Per_CPU_Release_and_ISR_enable( cpu, level );
    167167
    168   _CPU_SMP_Send_interrupt( cpu );
     168  _CPU_SMP_Send_interrupt( cpu_index );
    169169}
    170170
    171171void _SMP_Broadcast_message( uint32_t message )
    172172{
    173   uint32_t self = _SMP_Get_current_processor();
    174   uint32_t ncpus = _SMP_Get_processor_count();
    175   uint32_t cpu;
     173  uint32_t cpu_count = _SMP_Get_processor_count();
     174  uint32_t cpu_index_self = _SMP_Get_current_processor();
     175  uint32_t cpu_index;
    176176
    177177  _Assert( _Debug_Is_thread_dispatching_allowed() );
    178178
    179   for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
    180     if ( cpu != self ) {
    181       _SMP_Send_message( cpu, message );
     179  for ( cpu_index = 0 ; cpu_index < cpu_count ; ++cpu_index ) {
     180    if ( cpu_index != cpu_index_self ) {
     181      _SMP_Send_message( cpu_index, message );
    182182    }
    183183  }
  • cpukit/score/src/threadcreateidle.c

    rf17e171 r3380ee8  
    2424#include <rtems/config.h>
    2525
    26 static void _Thread_Create_idle_for_cpu( Per_CPU_Control *per_cpu )
     26static void _Thread_Create_idle_for_cpu( Per_CPU_Control *cpu )
    2727{
    2828  Objects_Name    name;
     
    4141    &_Thread_Internal_information,
    4242    idle,
    43     _Scheduler_Get_by_CPU( per_cpu ),
     43    _Scheduler_Get_by_CPU( cpu ),
    4444    NULL,        /* allocate the stack */
    4545    _Stack_Ensure_minimum( rtems_configuration_get_idle_task_stack_size() ),
     
    5757   *             MUST be done before _Thread_Start is invoked.
    5858   */
    59   per_cpu->heir      =
    60   per_cpu->executing = idle;
     59  cpu->heir      =
     60  cpu->executing = idle;
    6161
    6262  _Thread_Start(
     
    6666    NULL,
    6767    0,
    68     per_cpu
     68    cpu
    6969  );
    7070}
     
    7272void _Thread_Create_idle( void )
    7373{
    74   uint32_t processor_count = _SMP_Get_processor_count();
    75   uint32_t processor;
     74  uint32_t cpu_count = _SMP_Get_processor_count();
     75  uint32_t cpu_index;
    7676
    77   for ( processor = 0 ; processor < processor_count ; ++processor ) {
    78     Per_CPU_Control *per_cpu = _Per_CPU_Get_by_index( processor );
     77  for ( cpu_index = 0 ; cpu_index < cpu_count ; ++cpu_index ) {
     78    Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
    7979
    80     if ( _Per_CPU_Is_processor_started( per_cpu ) ) {
    81       _Thread_Create_idle_for_cpu( per_cpu );
     80    if ( _Per_CPU_Is_processor_started( cpu ) ) {
     81      _Thread_Create_idle_for_cpu( cpu );
    8282    }
    8383  }
  • cpukit/score/src/threaddispatch.c

    rf17e171 r3380ee8  
    4343{
    4444  ISR_Level        level;
    45   Per_CPU_Control *cpu;
     45  Per_CPU_Control *cpu_self;
    4646  Thread_Action   *action;
    4747
    48   cpu = _Thread_Action_ISR_disable_and_acquire( executing, &level );
     48  cpu_self = _Thread_Action_ISR_disable_and_acquire( executing, &level );
    4949  action = _Thread_Get_post_switch_action( executing );
    5050
     
    5252    _Chain_Set_off_chain( &action->Node );
    5353
    54     ( *action->handler )( executing, action, cpu, level );
    55 
    56     cpu = _Thread_Action_ISR_disable_and_acquire( executing, &level );
     54    ( *action->handler )( executing, action, cpu_self, level );
     55
     56    cpu_self = _Thread_Action_ISR_disable_and_acquire( executing, &level );
    5757    action = _Thread_Get_post_switch_action( executing );
    5858  }
    5959
    60   _Thread_Action_release_and_ISR_enable( cpu, level );
     60  _Thread_Action_release_and_ISR_enable( cpu_self, level );
    6161}
    6262
    6363void _Thread_Dispatch( void )
    6464{
    65   Per_CPU_Control  *per_cpu;
     65  Per_CPU_Control  *cpu_self;
    6666  Thread_Control   *executing;
    6767  Thread_Control   *heir;
     
    7272#endif
    7373
    74   per_cpu = _Per_CPU_Get();
    75   _Assert( per_cpu->thread_dispatch_disable_level == 0 );
    76   _Profiling_Thread_dispatch_disable( per_cpu, 0 );
    77   per_cpu->thread_dispatch_disable_level = 1;
     74  cpu_self = _Per_CPU_Get();
     75  _Assert( cpu_self->thread_dispatch_disable_level == 0 );
     76  _Profiling_Thread_dispatch_disable( cpu_self, 0 );
     77  cpu_self->thread_dispatch_disable_level = 1;
    7878
    7979#if defined( RTEMS_SMP )
     
    8484   *  Now determine if we need to perform a dispatch on the current CPU.
    8585   */
    86   executing = per_cpu->executing;
    87   _Per_CPU_ISR_disable_and_acquire( per_cpu, level );
     86  executing = cpu_self->executing;
     87  _Per_CPU_ISR_disable_and_acquire( cpu_self, level );
    8888#if defined( RTEMS_SMP )
    8989  /*
     
    9494   * _Thread_Handler() since _Context_switch() may branch to this function.
    9595   */
    96   if ( per_cpu->dispatch_necessary ) {
     96  if ( cpu_self->dispatch_necessary ) {
    9797#else
    98   while ( per_cpu->dispatch_necessary ) {
    99 #endif
    100     per_cpu->dispatch_necessary = false;
     98  while ( cpu_self->dispatch_necessary ) {
     99#endif
     100    cpu_self->dispatch_necessary = false;
    101101
    102102#if defined( RTEMS_SMP )
     
    109109#endif
    110110
    111     heir = per_cpu->heir;
    112     per_cpu->executing = heir;
     111    heir = cpu_self->heir;
     112    cpu_self->executing = heir;
    113113
    114114#if defined( RTEMS_SMP )
     
    143143      _Thread_Update_cpu_time_used(
    144144        executing,
    145         &per_cpu->time_of_last_context_switch
     145        &cpu_self->time_of_last_context_switch
    146146      );
    147147    #else
    148148      {
    149         _TOD_Get_uptime( &per_cpu->time_of_last_context_switch );
     149        _TOD_Get_uptime( &cpu_self->time_of_last_context_switch );
    150150        heir->cpu_time_used++;
    151151      }
     
    206206     * stack or non-volatile registers reflect the old execution environment.
    207207     */
    208     per_cpu = _Per_CPU_Get();
     208    cpu_self = _Per_CPU_Get();
    209209
    210210#if !defined( RTEMS_SMP )
     
    214214
    215215post_switch:
    216   _Assert( per_cpu->thread_dispatch_disable_level == 1 );
    217   per_cpu->thread_dispatch_disable_level = 0;
    218   _Profiling_Thread_dispatch_enable( per_cpu, 0 );
    219 
    220   _Per_CPU_Release_and_ISR_enable( per_cpu, level );
     216  _Assert( cpu_self->thread_dispatch_disable_level == 1 );
     217  cpu_self->thread_dispatch_disable_level = 0;
     218  _Profiling_Thread_dispatch_enable( cpu_self, 0 );
     219
     220  _Per_CPU_Release_and_ISR_enable( cpu_self, level );
    221221
    222222  _Thread_Run_post_switch_actions( executing );
  • cpukit/score/src/threaddispatchdisablelevel.c

    rf17e171 r3380ee8  
    3535};
    3636
    37 static void _Giant_Do_acquire( Per_CPU_Control *self_cpu )
     37static void _Giant_Do_acquire( Per_CPU_Control *cpu_self )
    3838{
    3939  Giant_Control *giant = &_Giant;
    4040
    41   if ( giant->owner_cpu != self_cpu ) {
    42     _SMP_lock_Acquire( &giant->lock, &self_cpu->Giant_lock_context );
    43     giant->owner_cpu = self_cpu;
     41  if ( giant->owner_cpu != cpu_self ) {
     42    _SMP_lock_Acquire( &giant->lock, &cpu_self->Giant_lock_context );
     43    giant->owner_cpu = cpu_self;
    4444    giant->nest_level = 1;
    4545  } else {
     
    4848}
    4949
    50 static void _Giant_Do_release( Per_CPU_Control *self_cpu )
     50static void _Giant_Do_release( Per_CPU_Control *cpu_self )
    5151{
    5252  Giant_Control *giant = &_Giant;
     
    5555  if ( giant->nest_level == 0 ) {
    5656    giant->owner_cpu = NO_OWNER_CPU;
    57     _SMP_lock_Release( &giant->lock, &self_cpu->Giant_lock_context );
     57    _SMP_lock_Release( &giant->lock, &cpu_self->Giant_lock_context );
    5858  }
    5959}
    6060
    61 void _Giant_Drop( Per_CPU_Control *self_cpu )
     61void _Giant_Drop( Per_CPU_Control *cpu_self )
    6262{
    6363  Giant_Control *giant = &_Giant;
     
    6565  _Assert( _ISR_Get_level() != 0 );
    6666
    67   if ( giant->owner_cpu == self_cpu ) {
     67  if ( giant->owner_cpu == cpu_self ) {
    6868    giant->nest_level = 0;
    6969    giant->owner_cpu = NO_OWNER_CPU;
    70     _SMP_lock_Release( &giant->lock, &self_cpu->Giant_lock_context );
     70    _SMP_lock_Release( &giant->lock, &cpu_self->Giant_lock_context );
    7171  }
    7272}
     
    7676  ISR_Level isr_level;
    7777  uint32_t disable_level;
    78   Per_CPU_Control *self_cpu;
     78  Per_CPU_Control *cpu_self;
    7979
    8080  _ISR_Disable_without_giant( isr_level );
     
    8484   * thread migration.
    8585   */
    86   self_cpu = _Per_CPU_Get();
     86  cpu_self = _Per_CPU_Get();
    8787
    88   _Giant_Do_acquire( self_cpu );
     88  _Giant_Do_acquire( cpu_self );
    8989
    90   disable_level = self_cpu->thread_dispatch_disable_level;
    91   _Profiling_Thread_dispatch_disable( self_cpu, disable_level );
     90  disable_level = cpu_self->thread_dispatch_disable_level;
     91  _Profiling_Thread_dispatch_disable( cpu_self, disable_level );
    9292  ++disable_level;
    93   self_cpu->thread_dispatch_disable_level = disable_level;
     93  cpu_self->thread_dispatch_disable_level = disable_level;
    9494
    9595  _ISR_Enable_without_giant( isr_level );
     
    102102  ISR_Level isr_level;
    103103  uint32_t disable_level;
    104   Per_CPU_Control *self_cpu;
     104  Per_CPU_Control *cpu_self;
    105105
    106106  _ISR_Disable_without_giant( isr_level );
    107107
    108   self_cpu = _Per_CPU_Get();
    109   disable_level = self_cpu->thread_dispatch_disable_level;
     108  cpu_self = _Per_CPU_Get();
     109  disable_level = cpu_self->thread_dispatch_disable_level;
    110110  --disable_level;
    111   self_cpu->thread_dispatch_disable_level = disable_level;
     111  cpu_self->thread_dispatch_disable_level = disable_level;
    112112
    113   _Giant_Do_release( self_cpu );
    114   _Assert( disable_level != 0 || _Giant.owner_cpu != self_cpu );
     113  _Giant_Do_release( cpu_self );
     114  _Assert( disable_level != 0 || _Giant.owner_cpu != cpu_self );
    115115
    116   _Profiling_Thread_dispatch_enable( self_cpu, disable_level );
     116  _Profiling_Thread_dispatch_enable( cpu_self, disable_level );
    117117  _ISR_Enable_without_giant( isr_level );
    118118
  • cpukit/score/src/threadhandler.c

    rf17e171 r3380ee8  
    149149       * release it here and set the desired interrupt level of the thread.
    150150       */
    151       Per_CPU_Control *per_cpu = _Per_CPU_Get();
    152 
    153       _Assert( per_cpu->thread_dispatch_disable_level == 1 );
     151      Per_CPU_Control *cpu_self = _Per_CPU_Get();
     152
     153      _Assert( cpu_self->thread_dispatch_disable_level == 1 );
    154154      _Assert( _ISR_Get_level() != 0 );
    155155
    156       per_cpu->thread_dispatch_disable_level = 0;
    157       _Profiling_Thread_dispatch_enable( per_cpu, 0 );
    158 
    159       _Per_CPU_Release( per_cpu );
     156      cpu_self->thread_dispatch_disable_level = 0;
     157      _Profiling_Thread_dispatch_enable( cpu_self, 0 );
     158
     159      _Per_CPU_Release( cpu_self );
    160160
    161161      level = executing->Start.isr_level;
  • cpukit/score/src/threadstartmultitasking.c

    rf17e171 r3380ee8  
    2323void _Thread_Start_multitasking( void )
    2424{
    25   Per_CPU_Control *self_cpu = _Per_CPU_Get();
     25  Per_CPU_Control *cpu_self = _Per_CPU_Get();
    2626  Thread_Control  *heir;
    2727
    2828#if defined(RTEMS_SMP)
    29   _Per_CPU_State_change( self_cpu, PER_CPU_STATE_UP );
     29  _Per_CPU_State_change( cpu_self, PER_CPU_STATE_UP );
    3030
    3131  /*
     
    3434   * _Per_CPU_Release().
    3535   */
    36   _Per_CPU_Acquire( self_cpu );
    37   self_cpu->thread_dispatch_disable_level = 1;
     36  _Per_CPU_Acquire( cpu_self );
     37  cpu_self->thread_dispatch_disable_level = 1;
    3838#endif
    3939
    40   heir = self_cpu->heir;
     40  heir = cpu_self->heir;
    4141
    4242#if defined(RTEMS_SMP)
    43   self_cpu->executing->is_executing = false;
     43  cpu_self->executing->is_executing = false;
    4444  heir->is_executing = true;
    4545#endif
    4646
    47   self_cpu->dispatch_necessary = false;
    48   self_cpu->executing = heir;
     47  cpu_self->dispatch_necessary = false;
     48  cpu_self->executing = heir;
    4949
    5050   /*
     
    7070#endif
    7171
    72   _Profiling_Thread_dispatch_disable( self_cpu, 0 );
     72  _Profiling_Thread_dispatch_disable( cpu_self, 0 );
    7373
    7474#if defined(_CPU_Start_multitasking)
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