Changeset 32f5a195 in rtems
- Timestamp:
- 06/29/21 12:06:03 (2 years ago)
- Branches:
- master
- Children:
- 23ec04c
- Parents:
- bc86a5fa
- git-author:
- Sebastian Huber <sebastian.huber@…> (06/29/21 12:06:03)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (07/26/21 17:57:31)
- Location:
- bsps
- Files:
-
- 37 edited
Legend:
- Unmodified
- Added
- Removed
-
bsps/arm/beagle/irq/irq.c
rbc86a5fa r32f5a195 151 151 } 152 152 153 voidbsp_interrupt_vector_disable(rtems_vector_number vector)153 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 154 154 { 155 155 uint32_t mask, cur; … … 161 161 mmio_write(omap_intr.base + mir_reg, cur | mask); 162 162 flush_data_cache(); 163 return RTEMS_SUCCESSFUL; 163 164 } 164 165 -
bsps/arm/csb336/irq/irq.c
rbc86a5fa r32f5a195 79 79 } 80 80 81 voidbsp_interrupt_vector_disable(rtems_vector_number vector)81 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 82 82 { 83 83 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 85 85 if (vector < MC9328MXL_NUM_INTS) 86 86 MC9328MXL_AITC_INTDISNUM = vector; 87 88 return RTEMS_SUCCESSFUL; 87 89 } 88 90 -
bsps/arm/csb337/irq/irq.c
rbc86a5fa r32f5a195 77 77 } 78 78 79 voidbsp_interrupt_vector_disable(rtems_vector_number vector)79 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 80 80 { 81 81 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 82 82 AIC_CTL_REG(AIC_IDCR) = 1 << vector; 83 return RTEMS_SUCCESSFUL; 83 84 } 84 85 -
bsps/arm/edb7312/irq/irq.c
rbc86a5fa r32f5a195 98 98 } 99 99 100 voidbsp_interrupt_vector_disable(rtems_vector_number vector)100 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 101 101 { 102 102 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 122 122 *EP7312_INTMR3 &= ~(1 << (vector - 21)); 123 123 } 124 125 return RTEMS_SUCCESSFUL; 124 126 } 125 127 -
bsps/arm/gumstix/irq/irq.c
rbc86a5fa r32f5a195 74 74 } 75 75 76 voidbsp_interrupt_vector_disable(rtems_vector_number vector)76 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 77 77 { 78 78 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 79 79 XSCALE_INT_ICMR &= ~(1 << vector); 80 return RTEMS_SUCCESSFUL; 80 81 } 81 82 -
bsps/arm/lpc24xx/irq/irq.c
rbc86a5fa r32f5a195 114 114 } 115 115 116 voidbsp_interrupt_vector_disable(rtems_vector_number vector)116 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 117 117 { 118 118 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 119 119 VICIntEnClear = 1U << vector; 120 return RTEMS_SUCCESSFUL; 120 121 } 121 122 -
bsps/arm/lpc32xx/irq/irq.c
rbc86a5fa r32f5a195 317 317 } 318 318 319 voidbsp_interrupt_vector_disable(rtems_vector_number vector)319 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 320 320 { 321 321 rtems_interrupt_level level; … … 327 327 lpc32xx_irq_clear_bit_in_register(vector, LPC32XX_IRQ_OFFSET_ER); 328 328 rtems_interrupt_enable(level); 329 330 return RTEMS_SUCCESSFUL; 329 331 } 330 332 -
bsps/arm/raspberrypi/irq/irq.c
rbc86a5fa r32f5a195 205 205 } 206 206 207 voidbsp_interrupt_vector_disable(rtems_vector_number vector)207 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 208 208 { 209 209 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 210 210 BCM2835_REG(bsp_vector_to_reg(vector)->disable_reg_addr) = 211 211 bsp_vector_to_mask(vector); 212 return RTEMS_SUCCESSFUL; 212 213 } 213 214 -
bsps/arm/rtl22xx/irq/irq.c
rbc86a5fa r32f5a195 76 76 } 77 77 78 voidbsp_interrupt_vector_disable(rtems_vector_number vector)78 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 79 79 { 80 80 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 81 81 VICIntEnClr = 1 << vector; 82 return RTEMS_SUCCESSFUL; 82 83 } 83 84 -
bsps/arm/shared/irq/irq-armv7m.c
rbc86a5fa r32f5a195 88 88 } 89 89 90 voidbsp_interrupt_vector_disable(rtems_vector_number vector)90 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 91 91 { 92 92 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 93 93 _ARMV7M_NVIC_Clear_enable((int) vector); 94 return RTEMS_SUCCESSFUL; 94 95 } 95 96 -
bsps/arm/smdk2410/irq/irq.c
rbc86a5fa r32f5a195 76 76 } 77 77 78 voidbsp_interrupt_vector_disable(rtems_vector_number vector)78 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 79 79 { 80 80 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 81 return RTEMS_SUCCESSFUL; 81 82 } 82 83 -
bsps/arm/tms570/irq/irq.c
rbc86a5fa r32f5a195 157 157 * @retval RTEMS_SUCCESSFUL interrupt source disabled. 158 158 */ 159 voidbsp_interrupt_vector_disable(159 rtems_status_code bsp_interrupt_vector_disable( 160 160 rtems_vector_number vector 161 161 ) … … 163 163 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 164 164 TMS570_VIM.REQENACLR[vector >> 5] = 1 << (vector & 0x1f); 165 return RTEMS_SUCCESSFUL; 165 166 } 166 167 -
bsps/i386/shared/irq/irq.c
rbc86a5fa r32f5a195 320 320 } 321 321 322 voidbsp_interrupt_vector_disable(rtems_vector_number vector)322 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 323 323 { 324 324 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 325 325 BSP_irq_disable_at_i8259a(vector); 326 return RTEMS_SUCCESSFUL; 326 327 } 327 328 -
bsps/include/bsp/irq-generic.h
rbc86a5fa r32f5a195 279 279 280 280 /** 281 * @brief Disables the interrupt vector with number @a vector.281 * @brief Disables the interrupt vector. 282 282 * 283 283 * This function shall disable the vector at the corresponding facility (in … … 287 287 * 288 288 * @note The implementation should use 289 * bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)) to valdiate the 290 * vector number. 291 * 292 * @note You must not install or remove an interrupt handler in this function. 293 * This may result in a deadlock. 294 */ 295 void bsp_interrupt_vector_disable(rtems_vector_number vector); 289 * bsp_interrupt_assert( bsp_interrupt_is_valid_vector( vector ) ) to validate 290 * the vector number in ::RTEMS_DEBUG configurations. 291 * 292 * @param vector is the interrupt vector number. 293 * 294 * @retval ::RTEMS_SUCCESSFUL The requested operation was successful. 295 * 296 * @retval ::RTEMS_UNSATISFIED The request to disable the interrupt vector has 297 * not been satisfied. 298 */ 299 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector ); 296 300 297 301 /** -
bsps/lm32/shared/irq/irq.c
rbc86a5fa r32f5a195 67 67 } 68 68 69 voidbsp_interrupt_vector_disable(rtems_vector_number vector)69 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 70 70 { 71 71 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 72 72 lm32_interrupt_mask(1 << vector); 73 return RTEMS_SUCCESSFUL; 73 74 } -
bsps/m68k/genmcf548x/irq/irq.c
rbc86a5fa r32f5a195 117 117 } 118 118 119 voidbsp_interrupt_vector_disable(rtems_vector_number vector)119 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 120 120 { 121 121 volatile uint32_t *imr = vector_to_imr(vector); … … 128 128 *imr |= bit; 129 129 rtems_interrupt_enable(level); 130 131 return RTEMS_SUCCESSFUL; 130 132 } 131 133 -
bsps/mips/shared/irq/irq.c
rbc86a5fa r32f5a195 116 116 } 117 117 118 voidbsp_interrupt_vector_disable(rtems_vector_number vector)118 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 119 119 { 120 120 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 121 return RTEMS_SUCCESSFUL; 121 122 } 122 123 -
bsps/powerpc/gen5200/irq/irq.c
rbc86a5fa r32f5a195 437 437 * This function disables a given siu interrupt 438 438 */ 439 voidbsp_interrupt_vector_disable( rtems_vector_number vector)439 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector) 440 440 { 441 441 int base_index = get_siu_irq_base_index( vector); … … 465 465 rtems_interrupt_enable( level); 466 466 } 467 468 return RTEMS_SUCCESSFUL; 467 469 } 468 470 -
bsps/powerpc/gen83xx/irq/irq.c
rbc86a5fa r32f5a195 441 441 } 442 442 443 voidbsp_interrupt_vector_disable( rtems_vector_number vector)443 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector) 444 444 { 445 445 rtems_vector_number vecnum = vector - BSP_IPIC_IRQ_LOWEST_OFFSET; … … 459 459 } 460 460 } 461 462 return RTEMS_SUCCESSFUL; 461 463 } 462 464 -
bsps/powerpc/mpc55xxevb/start/irq.c
rbc86a5fa r32f5a195 202 202 } 203 203 204 voidbsp_interrupt_vector_disable( rtems_vector_number vector)204 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector) 205 205 { 206 206 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 207 207 mpc55xx_intc_set_priority( vector, MPC55XX_INTC_DISABLED_PRIORITY); 208 } 208 return RTEMS_SUCCESSFUL; 209 } -
bsps/powerpc/mpc8260ads/irq/irq.c
rbc86a5fa r32f5a195 385 385 } 386 386 387 voidbsp_interrupt_vector_disable( rtems_vector_number irqnum)387 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum) 388 388 { 389 389 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(irqnum)); … … 395 395 BSP_irq_disable_at_cpm (irqnum); 396 396 } 397 398 return RTEMS_SUCCESSFUL; 397 399 } 398 400 -
bsps/powerpc/psim/irq/irq_init.c
rbc86a5fa r32f5a195 152 152 } 153 153 154 voidbsp_interrupt_vector_disable( rtems_vector_number irqnum)154 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum) 155 155 { 156 156 /* FIXME: do something */ 157 157 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(irqnum)); 158 return RTEMS_SUCCESSFUL; 158 159 } 159 160 -
bsps/powerpc/qemuppc/irq/irq_init.c
rbc86a5fa r32f5a195 88 88 } 89 89 90 voidbsp_interrupt_vector_disable( rtems_vector_number irqnum)90 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum) 91 91 { 92 92 /* FIXME: do something */ 93 93 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(irqnum)); 94 return RTEMS_SUCCESSFUL; 94 95 } 95 96 -
bsps/powerpc/qoriq/irq/irq.c
rbc86a5fa r32f5a195 138 138 } 139 139 140 voidbsp_interrupt_vector_disable(rtems_vector_number vector)140 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 141 141 { 142 142 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 143 143 ev_int_set_mask(vector, 1); 144 return RTEMS_SUCCESSFUL; 144 145 } 145 146 … … 404 405 } 405 406 406 voidbsp_interrupt_vector_disable(rtems_vector_number vector)407 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 407 408 { 408 409 pic_vector_enable(vector, VPR_MSK); 410 return RTEMS_SUCCESSFUL; 409 411 } 410 412 -
bsps/powerpc/shared/irq/ppc-irq-generic.c
rbc86a5fa r32f5a195 145 145 } 146 146 147 voidbsp_interrupt_vector_disable(rtems_vector_number vector)147 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 148 148 { 149 149 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 150 150 BSP_disable_irq_at_pic(vector); 151 return RTEMS_SUCCESSFUL; 151 152 } 152 153 -
bsps/powerpc/t32mppc/irq/irq.c
rbc86a5fa r32f5a195 74 74 } 75 75 76 voidbsp_interrupt_vector_disable(rtems_vector_number vector)76 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 77 77 { 78 78 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 79 return RTEMS_SUCCESSFUL; 79 80 } 80 81 -
bsps/powerpc/tqm8xx/irq/irq.c
rbc86a5fa r32f5a195 119 119 } 120 120 121 voidbsp_interrupt_vector_disable(rtems_vector_number vector)121 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 122 122 { 123 123 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 128 128 bsp_irq_disable_at_SIU(vector); 129 129 } 130 131 return RTEMS_SUCCESSFUL; 130 132 } 131 133 -
bsps/powerpc/virtex/irq/irq_init.c
rbc86a5fa r32f5a195 186 186 } 187 187 188 voidbsp_interrupt_vector_disable(rtems_vector_number vector)188 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 189 189 { 190 190 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 193 193 BSP_irq_disable_at_opbintc(vector); 194 194 } 195 196 return RTEMS_SUCCESSFUL; 195 197 } 196 198 -
bsps/riscv/griscv/irq/irq.c
rbc86a5fa r32f5a195 149 149 } 150 150 151 voidbsp_interrupt_vector_disable(rtems_vector_number vector)151 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 152 152 { 153 153 int irq = (int)vector; 154 154 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 155 155 GRLIB_Cpu_Mask_interrupt(irq, bsp_irq_cpu(irq)); 156 return RTEMS_SUCCESSFUL; 156 157 } 157 158 -
bsps/riscv/riscv/irq/irq.c
rbc86a5fa r32f5a195 324 324 } 325 325 326 voidbsp_interrupt_vector_disable(rtems_vector_number vector)326 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 327 327 { 328 328 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 364 364 rtems_interrupt_lock_release(&riscv_plic_lock, &lock_context); 365 365 } 366 367 return RTEMS_SUCCESSFUL; 366 368 } 367 369 -
bsps/shared/dev/irq/arm-gicv2.c
rbc86a5fa r32f5a195 128 128 } 129 129 130 voidbsp_interrupt_vector_disable(rtems_vector_number vector)130 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 131 131 { 132 132 volatile gic_dist *dist = ARM_GIC_DIST; … … 135 135 136 136 gic_id_disable(dist, vector); 137 return RTEMS_SUCCESSFUL; 137 138 } 138 139 -
bsps/shared/dev/irq/arm-gicv3.c
rbc86a5fa r32f5a195 244 244 } 245 245 246 voidbsp_interrupt_vector_disable(rtems_vector_number vector)246 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 247 247 { 248 248 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); … … 256 256 sgi_ppi->icspicer[0] = 1 << (vector % 32); 257 257 } 258 259 return RTEMS_SUCCESSFUL; 258 260 } 259 261 -
bsps/shared/irq/irq-default.c
rbc86a5fa r32f5a195 87 87 } 88 88 89 voidbsp_interrupt_vector_disable(rtems_vector_number vector)89 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 90 90 { 91 91 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 92 92 (void)vector; 93 return RTEMS_UNSATISFIED; 93 94 } 94 95 -
bsps/shared/irq/irq-enable-disable.c
rbc86a5fa r32f5a195 98 98 } 99 99 100 bsp_interrupt_vector_disable( vector ); 101 102 return RTEMS_SUCCESSFUL; 100 return bsp_interrupt_vector_disable( vector ); 103 101 } -
bsps/sparc/leon3/start/eirq.c
rbc86a5fa r32f5a195 168 168 } 169 169 170 voidbsp_interrupt_vector_disable(rtems_vector_number vector)170 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 171 171 { 172 172 #if defined(RTEMS_SMP) … … 193 193 BSP_Cpu_Mask_interrupt(vector, _LEON3_Get_current_processor()); 194 194 #endif 195 return RTEMS_SUCCESSFUL; 195 196 } 196 197 -
bsps/sparc/shared/irq/irq-shared.c
rbc86a5fa r32f5a195 93 93 } 94 94 95 voidbsp_interrupt_vector_disable(rtems_vector_number vector)95 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 96 96 { 97 97 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); 98 98 BSP_Cpu_Mask_interrupt(vector, 0); 99 return RTEMS_SUCCESSFUL; 99 100 } 100 101 #endif -
bsps/x86_64/amd64/interrupts/idt.c
rbc86a5fa r32f5a195 142 142 } 143 143 144 voidbsp_interrupt_vector_disable(rtems_vector_number vector)144 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) 145 145 { 146 146 /* XXX */ 147 return RTEMS_SUCCESSFUL; 147 148 } 148 149
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