Changeset 32eba74 in rtems


Ignore:
Timestamp:
Aug 1, 2011, 7:21:47 PM (10 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.11, 5, master
Children:
858e013f
Parents:
e3d64d4
Message:

2011-08-01 Jennifer Averett <Jennifer.Averett@…>

  • score/include/rtems/score/isr.h: Cleaned up comments.
Location:
cpukit
Files:
2 edited

Legend:

Unmodified
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  • cpukit/ChangeLog

    re3d64d4 r32eba74  
     12011-08-01      Jennifer Averett <Jennifer.Averett@OARcorp.com>
     2
     3        * score/include/rtems/score/isr.h: Cleaned up comments.
     4
    152011-08-01      Jennifer Averett <Jennifer.Averett@OARcorp.com>
    26
  • cpukit/score/include/rtems/score/isr.h

    re3d64d4 r32eba74  
    9191
    9292/**
     93 *  @brief Disable Interrupts
     94 *
    9395 *  This routine disables all interrupts so that a critical section
    94  *  of code can be executing without being interrupted.  Upon return,
    95  *  the argument _level will contain the previous interrupt mask level.
     96 *  of code can be executing without being interrupted.
     97 *
     98 *  @return The argument @a _level will contain the previous interrupt
     99 *          mask level.
    96100 */
    97101#define _ISR_Disable( _level ) \
     
    102106
    103107/**
     108 *  @brief Enable Interrupts
     109 *
    104110 *  This routine enables interrupts to the previous interrupt mask
    105111 *  LEVEL.  It is used at the end of a critical section of code to
    106112 *  enable interrupts so they can be processed again.
     113 *
     114 *  @param[in] level contains the interrupt level mask level
     115 *             previously returned by @ref _ISR_Disable_on_core.
    107116 */
    108117#define _ISR_Enable( _level ) \
     
    113122
    114123/**
     124 *  @brief Temporarily Enable Interrupts
     125 *
    115126 *  This routine temporarily enables interrupts to the previous
    116127 *  interrupt mask level and then disables all interrupts so that
    117128 *  the caller can continue into the second part of a critical
    118  *  section.  This routine is used to temporarily enable interrupts
     129 *  section.
     130 *
     131 *  This routine is used to temporarily enable interrupts
    119132 *  during a long critical section.  It is used in long sections of
    120133 *  critical code when a point is reached at which interrupts can
     
    123136 *  must be selected with care to ensure that the critical section
    124137 *  properly protects itself.
     138 *
     139 *  @param[in] level contains the interrupt level mask level
     140 *             previously returned by @ref _ISR_Disable_on_core.
    125141 */
    126142#define _ISR_Flash( _level ) \
     
    132148
    133149/**
     150 *  @brief Install Interrupt Handler Vector
     151 *
    134152 *  This routine installs new_handler as the interrupt service routine
    135153 *  for the specified vector.  The previous interrupt service routine is
    136154 *  returned as old_handler.
     155 *
     156 *  @param[in] _vector is the vector number
     157 *  @param[in] _new_handler is ISR handler to install
     158 *  @param[in] _old_handler is a pointer to a variable which will be set
     159 *             to the old handler
     160 *
     161 *  @return *_old_handler will be set to the old ISR handler
    137162 */
    138163#define _ISR_Install_vector( _vector, _new_handler, _old_handler ) \
     
    140165
    141166/**
     167 *  @brief Return Current Interrupt Level
     168 *
    142169 *  This routine returns the current interrupt level.
     170 *
     171 *  @return This method returns the current level.
    143172 */
    144173#define _ISR_Get_level() \
     
    146175
    147176/**
     177 *  @brief Set Current Interrupt Level
     178 *
    148179 *  This routine sets the current interrupt level to that specified
    149  *  by new_level.  The new interrupt level is effective when the
     180 *  by @a _new_level.  The new interrupt level is effective when the
    150181 *  routine exits.
     182 *
     183 *  @param[in] _new_level contains the desired interrupt level.
    151184 */
    152185#define _ISR_Set_level( _new_level ) \
     
    155188    _CPU_ISR_Set_level( _new_level ); \
    156189    RTEMS_COMPILER_MEMORY_BARRIER();  \
    157     } while (0)
    158 
    159 
    160 /**
     190  } while (0)
     191
     192/**
     193 *  @brief ISR Handler or Dispatcher
     194 *
    161195 *  This routine is the interrupt dispatcher.  ALL interrupts
    162196 *  are vectored to this routine so that minimal context can be saved
     
    173207
    174208/**
     209 *  @brief ISR Wrapper for Thread Dispatcher
     210 *
    175211 *  This routine provides a wrapper so that the routine
    176212 *  @ref _Thread_Dispatch can be invoked when a reschedule is necessary
     
    181217 *  of registers which are not preserved across routine invocations.
    182218 *
    183  *  @note  Implemented in assembly language.
     219 *  @note  Typically mplemented in assembly language.
    184220 */
    185221void _ISR_Dispatch( void );
    186222
    187223/**
     224 *  @brief Is an ISR in Progress
     225 *
    188226 *  This function returns true if the processor is currently servicing
    189227 *  and interrupt and false otherwise.   A return value of true indicates
    190  *  that the caller is an interrupt service routine, NOT a thread.  The
     228 *  that the caller is an interrupt service routine, NOT a thread.
     229 *
     230 *  @return This methods returns true when called from an ISR.
    191231 */
    192232#if (CPU_PROVIDES_ISR_IS_IN_PROGRESS == TRUE)
    193 bool _ISR_Is_in_progress( void );
     233  bool _ISR_Is_in_progress( void );
    194234#else
    195 #define _ISR_Is_in_progress() \
    196         (_ISR_Nest_level != 0)
     235  #define _ISR_Is_in_progress() \
     236          (_ISR_Nest_level != 0)
    197237#endif
    198238
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