Changeset 32c9b83 in rtems


Ignore:
Timestamp:
Oct 19, 2019, 4:54:40 AM (3 weeks ago)
Author:
Chris Johns <chrisj@…>
Branches:
master
Children:
a7f5e42c
Parents:
2fdbdbc
Message:

libdebugger/arm: Clean up the building on arm variants.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/libdebugger/rtems-debugger-arm.c

    r2fdbdbc r32c9b83  
    5252 * ARM Variant controls.
    5353 */
    54 #if defined(__ARM_ARCH_7A__) || \
    55     defined(__ARM_ARCH_7R__)
     54#if (__ARM_ARCH >= 7) && \
     55    (__ARM_ARCH_PROFILE == 'A' || __ARM_ARCH_PROFILE == 'R')
    5656  #define ARM_CP15 1
    5757#endif
    5858
    59 #if (defined(__ARM_ARCH_7M__) || \
    60      defined(__ARM_ARCH_7EM__))
     59#if (__ARM_ARCH >= 7) && \
     60    (__ARM_ARCH_PROFILE == 'M')
    6161  #define ARM_THUMB_ONLY 1
    6262#else
     
    8181 * If the variant only supports thumb insturctions disable the support.
    8282 */
    83 #if !ARM_THUMB_ONLY && defined(__thumb__)
     83#define NEEDS_THUMB_SWITCH !ARM_THUMB_ONLY && defined(__thumb__)
     84
     85#if NEEDS_THUMB_SWITCH
    8486  #define ARM_SWITCH_REG       uint32_t arm_switch_reg
    8587  #define ARM_SWITCH_REG_ASM   [arm_switch_reg] "=&r" (arm_switch_reg)
     
    206208 * The various status registers.
    207209 */
    208 #if defined(ARM_MULTILIB_ARCH_V4)
     210#if defined(ARM_MULTILIB_ARCH_V4) || defined(ARM_MULTILIB_ARCH_V6M)
    209211 #define FRAME_SR(_frame) (_frame)->register_cpsr
    210212#elif defined(ARM_MULTILIB_ARCH_V7M)
     
    344346 * Use to locally probe and catch exceptions when accessinf suspect addresses.
    345347 */
     348#if ARM_CP15
    346349static void __attribute__((naked)) arm_debug_unlock_abort(void);
     350#endif
    347351
    348352/*
     
    824828{
    825829  uint32_t val;
    826   void*    abort_handler;
    827830  int      rc = -1;
     831
     832#if ARM_CP15
     833  void* abort_handler;
     834#endif
    828835
    829836  /*
     
    14001407 *       instruction set being used.
    14011408 */
    1402 #define EXCEPTION_ENTRY_EXC_V4()                                        \
     1409#define EXCEPTION_ENTRY_EXC()                                           \
    14031410  __asm__ volatile(                                                     \
    14041411    ASM_ARM_MODE                                                        \
     
    14451452#define ARM_CLEAR_THUMB_MODE "bic  r1, r1, %[psr_t]\n" /* clear thumb */
    14461453
    1447 #define EXCEPTION_ENTRY_THREAD_V4(_frame)                               \
     1454#define EXCEPTION_ENTRY_THREAD(_frame)                                  \
    14481455  __asm__ volatile(                                                     \
    14491456    ASM_ARM_MODE                                                        \
     
    15291536 *       instruction set being used.
    15301537 */
    1531 #define EXCEPTION_EXIT_THREAD_V4(_frame)                                \
     1538#define EXCEPTION_EXIT_THREAD(_frame)                                   \
    15321539  __asm__ volatile(                                                     \
    15331540    ASM_ARM_MODE                                                        \
     
    15701577    : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "memory")
    15711578
    1572 #define EXCEPTION_EXIT_EXC_V4()                                         \
     1579#define EXCEPTION_EXIT_EXC()                                            \
    15731580  __asm__ volatile(                                                     \
    15741581    ASM_ARM_MODE                                                        \
    15751582    "ldr  lr, [sp]\n"                        /* recover the link reg */ \
    15761583    "add  sp, #4\n"                                                     \
    1577     "ldm  sp, {r0-r12}\n"            /* restore the trhead's context */ \
     1584    "ldm  sp, {r0-r12}\n"            /* restore the thread's context */ \
    15781585    "add  sp, %[frame_size]\n"                     /* free the frame */ \
    15791586    "subs pc, lr, #0\n"                       /* return from the exc */ \
     
    15821589    : "memory")
    15831590
    1584 /**
    1585  * ARM Variant support.
    1586  */
    1587 #if defined(ARM_MULTILIB_ARCH_V4)
    1588  #define EXCEPTION_ENTRY_EXC()               EXCEPTION_ENTRY_EXC_V4()
    1589  #define EXCEPTION_ENTRY_THREAD(_frame)      EXCEPTION_ENTRY_THREAD_V4(_frame)
    1590  #define EXCEPTION_EXIT_THREAD(_frame)       EXCEPTION_EXIT_THREAD_V4(_frame)
    1591  #define EXCEPTION_EXIT_EXC()                EXCEPTION_EXIT_EXC_V4()
    1592 #elif defined(ARM_MULTILIB_ARCH_V7M)
    1593  #define EXCEPTION_ENTRY_EXC()               (void) arm_switch_reg
    1594  #define EXCEPTION_ENTRY_THREAD(_frame)      (_frame) = NULL
    1595  #define EXCEPTION_EXIT_THREAD(_frame)       (_frame) = NULL
    1596  #define EXCEPTION_EXIT_EXC()                (void) arm_switch_reg
    1597 #else
    1598  #error ARM architecture is not supported.
    1599 #endif
    1600 
    16011591/*
    16021592 * This is used to catch faulting accesses.
    16031593 */
     1594#if ARM_CP15
    16041595static void __attribute__((naked))
    16051596arm_debug_unlock_abort(void)
     
    16111602  longjmp(unlock_abort_jmpbuf, -1);
    16121603}
     1604#endif
    16131605
    16141606static void __attribute__((naked))
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