Ignore:
Timestamp:
May 5, 2009, 4:18:06 PM (11 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.9
Children:
8e230e6
Parents:
56e12a17
Message:

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
File:
1 edited

Legend:

Unmodified
Added
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  • c/src/lib/libbsp/powerpc/score603e/include/gen2.h

    r56e12a17 r31a5ec8  
    33 *  This include file contains all Generation 2 board addreses
    44 *
    5  *  COPYRIGHT (c) 1989-1997.
     5 *  COPYRIGHT (c) 1989-2009.
    66 *  On-Line Applications Research Corporation (OAR).
    77 *
    8  *  The license and distribution terms for this file may in
    9  *  the file LICENSE in this distribution or at
     8 *  The license and distribution terms for this file may be
     9 *  found in the file LICENSE in this distribution or at
    1010 *  http://www.rtems.com/license/LICENSE.
    1111 *
    12  *  $Id:
     12 *  $Id$
    1313 */
    1414
     
    179179 */
    180180
    181 /*
    182  * First Score Unique IRQ
    183  */
    184 #define Score_IRQ_First ( PPC_IRQ_LAST +  1 )
    185 
    186 /*
    187  * The Following Are part of a Score603e FPGA.
    188  */
    189 #define SCORE603E_IRQ00   ( Score_IRQ_First +  0 )
    190 #define SCORE603E_IRQ01   ( Score_IRQ_First +  1 )
    191 #define SCORE603E_IRQ02   ( Score_IRQ_First +  2 )
    192 #define SCORE603E_IRQ03   ( Score_IRQ_First +  3 )
    193 #define SCORE603E_IRQ04   ( Score_IRQ_First +  4 )
    194 #define SCORE603E_IRQ05   ( Score_IRQ_First +  5 )
    195 #define SCORE603E_IRQ06   ( Score_IRQ_First +  6 )
    196 #define SCORE603E_IRQ07   ( Score_IRQ_First +  7 )
    197 #define SCORE603E_IRQ08   ( Score_IRQ_First +  8 )
    198 #define SCORE603E_IRQ09   ( Score_IRQ_First +  9 )
    199 #define SCORE603E_IRQ10   ( Score_IRQ_First + 10 )
    200 #define SCORE603E_IRQ11   ( Score_IRQ_First + 11 )
    201 #define SCORE603E_IRQ12   ( Score_IRQ_First + 12 )
    202 #define SCORE603E_IRQ13   ( Score_IRQ_First + 13 )
    203 #define SCORE603E_IRQ14   ( Score_IRQ_First + 14 )
    204 #define SCORE603E_IRQ15   ( Score_IRQ_First + 15 )
    205 
    206 #define SCORE603E_TIMER1_IRQ           SCORE603E_IRQ00
    207 #define SCORE603E_TIMER2_IRQ           SCORE603E_IRQ01
    208 #define SCORE603E_TIMER3_IRQ           SCORE603E_IRQ02
    209 #define SCORE603E_85C30_1_IRQ          SCORE603E_IRQ03
    210 #define SCORE603E_85C30_0_IRQ          SCORE603E_IRQ04
    211 #define SCORE603E_RTC_IRQ              SCORE603E_IRQ05
    212 #define SCORE603E_PCI_IRQ_0            SCORE603E_IRQ06
    213 #define SCORE603E_PCI_IRQ_1            SCORE603E_IRQ07
    214 #define SCORE603E_PCI_IRQ_2            SCORE603E_IRQ08
    215 #define SCORE603E_PCI_IRQ_3            SCORE603E_IRQ09
    216 #define SCORE603E_UNIVERSE_IRQ         SCORE603E_IRQ10
    217 #define SCORE603E_1553_IRQ             SCORE603E_IRQ11
    218 #define SCORE603E_MAIL_BOX_IRQ_0       SCORE603E_IRQ12
    219 #define SCORE603E_MAIL_BOX_IRQ_1       SCORE603E_IRQ13
    220 #define SCORE603E_MAIL_BOX_IRQ_2       SCORE603E_IRQ14
    221 #define SCORE603E_MAIL_BOX_IRQ_3       SCORE603E_IRQ15
    222 
    223 /*
    224  * The Score FPGA maps all interrupts comming from the PMC card to
    225  * the FPGA interrupt SCORE603E_PCI_IRQ_0 the PMC status word must be
    226  * read to indicate which interrupt was chained to the FPGA.
    227  */
    228 #define SCORE603E_IRQ16   ( Score_IRQ_First + 16 )
    229 #define SCORE603E_IRQ17   ( Score_IRQ_First + 17 )
    230 #define SCORE603E_IRQ18   ( Score_IRQ_First + 18 )
    231 #define SCORE603E_IRQ19   ( Score_IRQ_First + 19 )
    232 
    233 /*
    234  * IRQ'a read from the PMC card
    235  */
    236 #define SCORE603E_85C30_4_IRQ          SCORE603E_IRQ16    /* SCC 422-1 */
    237 #define SCORE603E_85C30_2_IRQ          SCORE603E_IRQ17    /* SCC 232-1 */
    238 #define SCORE603E_85C30_5_IRQ          SCORE603E_IRQ18    /* SCC 422-2 */
    239 #define SCORE603E_85C30_3_IRQ          SCORE603E_IRQ19    /* SCC 232-2 */
    240 
    241 #define MAX_BOARD_IRQS                 SCORE603E_IRQ19
    242181
    243182/*
     
    265204  (int) (((_value) * 4000) / 6667)
    266205
    267 #endif
    268 
    269206#ifdef __cplusplus
    270207}
    271208#endif
     209
     210#endif
     211
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