Ignore:
Timestamp:
May 5, 2009, 4:18:06 PM (11 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.9
Children:
8e230e6
Parents:
56e12a17
Message:

2009-05-05 Jennifer Averett <jennifer.averett@…>

  • Makefile.am, README, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/coverhd.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, timer/timer.c, tod/tod.c: Updated and tested with the latest powerpc isr source
  • irq/no_pic.c: New file.
  • irq/irq.c, startup/genpvec.c, startup/setvec.c, startup/vmeintr.c: Removed.
File:
1 edited

Legend:

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  • c/src/lib/libbsp/powerpc/score603e/console/85c30.c

    r56e12a17 r31a5ec8  
    55 *  Currently only polled mode is supported.
    66 *
    7  *  COPYRIGHT (c) 1989-2008.
     7 *  COPYRIGHT (c) 1989-2009.
    88 *  On-Line Applications Research Corporation (OAR).
    99 *
     
    1111 *  found in the file LICENSE in this distribution or at
    1212 *  http://www.rtems.com/license/LICENSE.
    13  *
    14  *  $Id:
     13 * 
     14 *  $Id$
    1515 */
    1616
     
    130130  uint16_t                baud_constant;
    131131
    132 printk("initialize_85c30_port start\n");
    133 
    134132  Setup = Port->Protocol;
    135133  ctrl  = Port->ctrl;
     
    156154   *  Set Write Register 2 to contain the interrupt vector
    157155   */
    158 printk("initialize_85c30_port 2, %d\n", Port->Chip->vector );
    159156  Write_85c30_register( ctrl, 2, Port->Chip->vector );
    160157#endif
     
    163160   *  Set Write Register 3 to disable the Receiver
    164161   */
    165 printk("initialize_85c30_port 0x03, 0x00\n");
    166162  Write_85c30_register( ctrl, 0x03, 0x00 );
    167163
     
    169165   *  Set Write Register 5 to disable the Transmitter
    170166   */
    171 printk("initialize_85c30_port 5, 0x00\n");
    172167  Write_85c30_register( ctrl, 5, 0x00 );
    173168
     
    179174   *  Set Write Register 9 to disable all interrupt sources
    180175   */
    181 printk("initialize_85c30_port 9, 0x00\n");
    182176  Write_85c30_register( ctrl, 9, 0x00 );
    183177
     
    185179   *  Set Write Register 10 for simple Asynchronous operation
    186180   */
    187 printk("initialize_85c30_port 0x0a, 0x00\n");
    188181  Write_85c30_register( ctrl, 0x0a, 0x00 );
    189182
     
    193186   * as the output source for TRxC pin via register 11
    194187   */
    195 printk("initialize_85c30_port 0x0b, 0x56\n");
    196188  Write_85c30_register( ctrl, 0x0b, 0x56 );
    197189
     
    203195   * baud rate will be equilvalent to 9600, via register 12.
    204196   */
    205 printk("initialize_85c30_port 0x0c, 0x%x\n", value & 0xff);
    206197  Write_85c30_register( ctrl, 0x0c, value & 0xff );
    207198
     
    210201   * Setup the upper 8 bits time constants = 0
    211202   */
    212 printk("initialize_85c30_port 0x0d, 0x%x\n", value>>8);
    213203  Write_85c30_register( ctrl, 0x0d, value>>8 );
    214204
     
    219209   * SCC's PCLK input via register 14.
    220210   */
    221 printk("initialize_85c30_port 0x0e, 0x07\n");
    222211  Write_85c30_register( ctrl, 0x0e, 0x07 );
    223212
     
    235224  value = value | Char_size_85c30[ Setup->read_char_bits ].read_setup;
    236225
    237 printk("initialize_85c30_port 0x03, 0x%x\n", value);
    238226  Write_85c30_register( ctrl, 0x03, value );
    239227
     
    250238  value = 0x8a;
    251239  value = value |  Char_size_85c30[ Setup->write_char_bits ].write_setup;
    252 printk("initialize_85c30_port 0x05, 0x%x\n", value);
    253240  Write_85c30_register( ctrl, 0x05, value );
    254241
     
    257244   * via register 0
    258245   */
    259 printk("initialize_85c30_port 0x00, 0xf0\n");
    260246   Write_85c30_register( ctrl, 0x00, 0xf0 );
    261247
     
    264250   *  Set Write Register 1 to interrupt on Rx characters or special condition.
    265251   */
    266 printk("initialize_85c30_port 1, 0x10\n");
    267252  Write_85c30_register( ctrl, 1, 0x10 );
    268253#endif
     
    272257   */
    273258
    274 printk("initialize_85c30_port 15, 0x00\n");
    275259  Write_85c30_register( ctrl, 15, 0x00 );
    276260
     
    278262   *  Set the Command Register to Reset Ext/STATUS.
    279263   */
    280 printk("initialize_85c30_port 0x00, 0x10\n");
    281264  Write_85c30_register( ctrl, 0x00, 0x10 );
    282265
     
    289272   *    Enables Tx interrupt.
    290273   */
    291 printk("initialize_85c30_port 1, 0x16\n");
    292274  Write_85c30_register( ctrl, 1, 0x16 );
    293275
     
    296278   *  Changed from 0 to a
    297279   */
    298 printk("initialize_85c30_port 9, 0x0A\n");
    299280  Write_85c30_register( ctrl, 9, 0x0A );
    300281
     
    304285   *  Issue reset highest Interrupt Under Service (IUS) command.
    305286   */
    306 printk("initialize_85c30_port STATUS_REGISTER, 0X38\n");
    307287  Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );
    308288
    309289#endif
    310290
    311 printk("initialize_85c30_port end of method\n");
    312291}
    313292
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