Changeset 3013e18 in rtems


Ignore:
Timestamp:
Dec 2, 1997, 4:27:15 PM (23 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
744df795
Parents:
bfad6e2
Message:

Modified SPARC to PowerPC. Modified specific requirements to be
for the PowerPC instead of the SPARC.

Location:
doc/supplements/powerpc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • doc/supplements/powerpc/bsp.t

    rbfad6e2 r3013e18  
    7676enabled.
    7777
    78 If this SPARC implementation supports on-chip caching
     78If this PowerPC implementation supports on-chip caching
    7979and this is to be utilized, then it should be enabled during the
    8080reset application initialization code.
     
    8484Applications User's Manual for the reset code
    8585which is executed before the call to
    86 rtems_initialize executive, the SPARC version has the following
     86rtems_initialize executive, the PowrePC version has the following
    8787specific requirements:
    8888
    8989@itemize @bullet
    90 @item Must leave the S bit of the status register set so that
    91 the SPARC remains in the supervisor state.
     90@item Must leave the PR bit of the machine state register set so that
     91the PowerPC remains in the supervisor state.
    9292
    9393@item Must set stack pointer (sp) such that a minimum stack
     
    9595rtems_initialize executive directive.
    9696
    97 @item Must disable all external interrupts (i.e. set the pil
    98 to 15).
     97@item Must disable all external interrupts (i.e. clear the EI (EE)
     98bit of the machine state register).
    9999
    100100@item Must enable traps so window overflow and underflow
    101101conditions can be properly handled.
    102102
    103 @item Must initialize the SPARC's initial trap table with at
     103@item Must initialize the PowerPC's initial trap table with at
    104104least trap handlers for register window overflow and register
    105105window underflow.
  • doc/supplements/powerpc/bsp.texi

    rbfad6e2 r3013e18  
    7676enabled.
    7777
    78 If this SPARC implementation supports on-chip caching
     78If this PowerPC implementation supports on-chip caching
    7979and this is to be utilized, then it should be enabled during the
    8080reset application initialization code.
     
    8484Applications User's Manual for the reset code
    8585which is executed before the call to
    86 rtems_initialize executive, the SPARC version has the following
     86rtems_initialize executive, the PowrePC version has the following
    8787specific requirements:
    8888
    8989@itemize @bullet
    90 @item Must leave the S bit of the status register set so that
    91 the SPARC remains in the supervisor state.
     90@item Must leave the PR bit of the machine state register set so that
     91the PowerPC remains in the supervisor state.
    9292
    9393@item Must set stack pointer (sp) such that a minimum stack
     
    9595rtems_initialize executive directive.
    9696
    97 @item Must disable all external interrupts (i.e. set the pil
    98 to 15).
     97@item Must disable all external interrupts (i.e. clear the EI (EE)
     98bit of the machine state register).
    9999
    100100@item Must enable traps so window overflow and underflow
    101101conditions can be properly handled.
    102102
    103 @item Must initialize the SPARC's initial trap table with at
     103@item Must initialize the PowerPC's initial trap table with at
    104104least trap handlers for register window overflow and register
    105105window underflow.
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