Changeset 3013e18 in rtems
- Timestamp:
- 12/02/97 16:27:15 (25 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 744df795
- Parents:
- bfad6e2
- Location:
- doc/supplements/powerpc
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
doc/supplements/powerpc/bsp.t
rbfad6e2 r3013e18 76 76 enabled. 77 77 78 If this SPARC implementation supports on-chip caching78 If this PowerPC implementation supports on-chip caching 79 79 and this is to be utilized, then it should be enabled during the 80 80 reset application initialization code. … … 84 84 Applications User's Manual for the reset code 85 85 which is executed before the call to 86 rtems_initialize executive, the SPARC version has the following86 rtems_initialize executive, the PowrePC version has the following 87 87 specific requirements: 88 88 89 89 @itemize @bullet 90 @item Must leave the S bit of the statusregister set so that91 the SPARC remains in the supervisor state.90 @item Must leave the PR bit of the machine state register set so that 91 the PowerPC remains in the supervisor state. 92 92 93 93 @item Must set stack pointer (sp) such that a minimum stack … … 95 95 rtems_initialize executive directive. 96 96 97 @item Must disable all external interrupts (i.e. set the pil98 to 15).97 @item Must disable all external interrupts (i.e. clear the EI (EE) 98 bit of the machine state register). 99 99 100 100 @item Must enable traps so window overflow and underflow 101 101 conditions can be properly handled. 102 102 103 @item Must initialize the SPARC's initial trap table with at103 @item Must initialize the PowerPC's initial trap table with at 104 104 least trap handlers for register window overflow and register 105 105 window underflow. -
doc/supplements/powerpc/bsp.texi
rbfad6e2 r3013e18 76 76 enabled. 77 77 78 If this SPARC implementation supports on-chip caching78 If this PowerPC implementation supports on-chip caching 79 79 and this is to be utilized, then it should be enabled during the 80 80 reset application initialization code. … … 84 84 Applications User's Manual for the reset code 85 85 which is executed before the call to 86 rtems_initialize executive, the SPARC version has the following86 rtems_initialize executive, the PowrePC version has the following 87 87 specific requirements: 88 88 89 89 @itemize @bullet 90 @item Must leave the S bit of the statusregister set so that91 the SPARC remains in the supervisor state.90 @item Must leave the PR bit of the machine state register set so that 91 the PowerPC remains in the supervisor state. 92 92 93 93 @item Must set stack pointer (sp) such that a minimum stack … … 95 95 rtems_initialize executive directive. 96 96 97 @item Must disable all external interrupts (i.e. set the pil98 to 15).97 @item Must disable all external interrupts (i.e. clear the EI (EE) 98 bit of the machine state register). 99 99 100 100 @item Must enable traps so window overflow and underflow 101 101 conditions can be properly handled. 102 102 103 @item Must initialize the SPARC's initial trap table with at103 @item Must initialize the PowerPC's initial trap table with at 104 104 least trap handlers for register window overflow and register 105 105 window underflow.
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