Changeset 2e19bfd in rtems


Ignore:
Timestamp:
12/23/14 11:27:53 (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
b1268e6
Parents:
0d0095f1
git-author:
Sebastian Huber <sebastian.huber@…> (12/23/14 11:27:53)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/09/15 13:05:46)
Message:

powerpc: Use PPC_HAS_FPU

Provide floating point context support only if PPC_HAS_FPU == 1.

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S

    r0d0095f1 r2e19bfd  
    5757#define PPC_CONTEXT_CACHE_LINE_4 (5 * PPC_DEFAULT_CACHE_LINE_SIZE)
    5858
     59        BEGIN_CODE
     60
     61#if PPC_HAS_FPU == 1
     62
    5963/*
    60  * Offsets for various Contexts
     64 * Offsets for Context_Control_fp
    6165 */
    6266
     
    105109        .set    FP_FPSCR, (FP_31 + FP_SIZE)
    106110
    107         BEGIN_CODE
    108111/*
    109112 *  _CPU_Context_save_fp_context
     
    122125        PUBLIC_PROC (_CPU_Context_save_fp)
    123126PROC (_CPU_Context_save_fp):
    124 #if (PPC_HAS_FPU == 1)
    125127/* A FP context switch may occur in an ISR or exception handler when the FPU is not
    126128 * available. Therefore, we must explicitely enable it here!
     
    172174        isync
    1731751:
    174 #endif
    175176        blr
    176177
     
    191192        PUBLIC_PROC (_CPU_Context_restore_fp)
    192193PROC (_CPU_Context_restore_fp):
    193 #if (PPC_HAS_FPU == 1)
    194194        lwz     r3, 0(r3)
    195195/* A FP context switch may occur in an ISR or exception handler when the FPU is not
     
    241241        isync
    2422421:
    243 #endif
    244243        blr
     244#endif /* PPC_HAS_FPU == 1 */
    245245
    246246        ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
  • cpukit/score/cpu/powerpc/rtems/score/cpu.h

    r0d0095f1 r2e19bfd  
    393393#ifndef ASM
    394394typedef struct {
     395#if (PPC_HAS_FPU == 1)
    395396    /* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over
    396397     * procedure calls.  However, this would mean that the interrupt
     
    406407    uint32_t    fpscr;
    407408#endif
     409#endif /* (PPC_HAS_FPU == 1) */
    408410} Context_Control_fp;
    409411
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