Index: bsps/powerpc/mvme3100/include/bsp.h
===================================================================
--- bsps/powerpc/mvme3100/include/bsp.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/bsp.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,343 @@
+/**
+ *  @file
+ *
+ *  @ingroup mvme3100_bsp
+ *
+ *  @brief This file contains BSP API definition.
+ */
+
+/*
+ *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
+ */
+#ifndef LIBBSP_POWERPC_MVME3100_BSP_H
+#define LIBBSP_POWERPC_MVME3100_BSP_H
+
+#ifndef ASM
+
+#include <bspopts.h>
+#include <bsp/default-initial-extension.h>
+
+#include <rtems.h>
+#include <libcpu/io.h>
+#include <bsp/vectors.h>
+
+/**
+ *  @defgroup mvme3100_bsp confdefs.h overrides
+ *
+ *  @ingroup powerpc_mvme3100
+ *
+ *  @brief confdefs.h overrides for this BSP:
+ */
+
+#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
+
+/*
+ * diagram illustrating the role of the configuration
+ * constants
+ *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
+ *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
+ *                       address being 'visible' or not!).
+ * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
+ * _VME_A32_WIN0_ON_VME: VME address of that same window
+ *
+ * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
+ * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
+ * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
+ * the base address read from PCI config.space in order to translate that
+ * into a CPU address.
+ *
+ * NOTE: VME addresses should NEVER be translated using these constants!
+ *       they are strictly for BSP internal use. Drivers etc. should use
+ *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
+ *
+ *           CPU ADDR                  PCI_ADDR                                VME ADDR
+ *
+ *           00000000                  XXXXXXXX                                XXXXXXXX
+ *    ^  ^   ........
+ *    |  |
+ *    |  |  e.g., RAM                  XXXXXXXX
+ *    |  |                                                                     00000000
+ *    |  |  .........                                                          ^
+ *    |  |            (possible offset                                         |
+ *    |  |             between pci and XXXXXXXX                                | ......
+ *    |  |             cpu addresses)                                          |
+ *    |  v                                                                     |
+ *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
+ *    |     ........                   ........               ^                |
+ *    |                                invisible              |                |
+ *    |     ........                   from CPU               |                |
+ *    v                                                       |                |
+ *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
+ *                                                            |                |
+ *        pci devices   pci window                            |                |
+ *       visible here                                         v                v
+ *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
+ *                                                 vme window
+ *        VME devices   hostbridge                 mapped by
+ *       visible here                              universe
+ *                    =====================================================
+ *
+ */
+
+/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
+#define	_IO_BASE            0xe0000000 /* Motload's PCI IO base */
+#define	_ISA_MEM_BASE		CHRP_ISA_MEM_BASE
+/* address of our ram on the PCI bus   */
+#define	PCI_DRAM_OFFSET		CHRP_PCI_DRAM_OFFSET
+/* offset of pci memory as seen from the CPU */
+#define PCI_MEM_BASE		0
+/* where (in CPU addr. space) does the PCI window start */
+#define PCI_MEM_WIN0		0x80000000
+
+/*
+ *  Base address definitions for several devices
+ */
+
+#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
+#define BSP_OPEN_PIC_BIG_ENDIAN
+
+#define BSP_8540_CCSR_BASE   (0xe1000000)
+
+#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
+#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
+#define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
+#define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
+#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((uint32_t*)(addr), (val))
+
+#define BSP_CONSOLE_PORT	BSP_UART_COM1
+#define BSP_UART_BAUD_BASE	(-9600) /* use existing divisor to determine clock rate */
+#define BSP_UART_USE_SHARED_IRQS
+
+#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
+
+/* I2C Devices */
+/* Note that the i2c addresses stated in the manual are
+ * left-shifted by one bit.
+ */
+#define BSP_VPD_I2C_ADDR			(0xA8>>1)		/* the VPD EEPROM  */
+#define BSP_USR0_I2C_ADDR			(0xA4>>1)		/* the 1st user EEPROM */
+#define BSP_USR1_I2C_ADDR			(0xA6>>1)		/* the 2nd user EEPROM */
+#define BSP_THM_I2C_ADDR			(0x90>>1)		/* the DS1621 temperature sensor & thermostat */
+#define BSP_RTC_I2C_ADDR			(0xD0>>1)		/* the DS1375 wall-clock */
+
+#define BSP_I2C_BUS_DESCRIPTOR		mpc8540_i2c_bus_descriptor
+
+#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
+
+#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
+#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
+#define BSP_I2C_USR1_EEPROM_NAME      "usr1-eeprom"
+#define BSP_I2C_DS1621_NAME           "ds1621"
+#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
+#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
+#define BSP_I2C_DS1375_RAW_NAME       "ds1375-raw"
+#define BSP_I2C_RTC_RAW_NAME          BSP_I2C_DS1375_RAW_NAME
+
+#define	BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
+#define	BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
+#define	BSP_I2C_USR1_EEPROM_DEV_NAME     (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME)
+#define	BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
+#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
+#define	BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
+#define	BSP_I2C_DS1375_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME)
+
+/* Definitions useful for bootloader (netboot); where to find
+ * boot/'environment' parameters.
+ */
+#define BSP_EEPROM_BOOTPARMS_NAME        BSP_I2C_USR1_EEPROM_DEV_NAME
+#define BSP_EEPROM_BOOTPARMS_SIZE        1024
+#define BSP_EEPROM_BOOTPARMS_OFFSET      0
+#define BSP_BOOTPARMS_WRITE_ENABLE()     do { BSP_eeprom_write_enable(); } while (0)
+#define BSP_BOOTPARMS_WRITE_DISABLE()    do { BSP_eeprom_write_protect();} while (0)
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/* Initialize the I2C driver and register all devices
+ * RETURNS 0 on success, -1 on error.
+ *
+ * Access to the VPD and user EEPROMS as well
+ * as the ds1621 temperature sensor is possible
+ * by means of file nodes
+ *
+ *   /dev/i2c0.vpd-eeprom   (read-only)
+ *   /dev/i2c0.usr-eeprom   (read-write)
+ *   /dev/i2c0.usr1-eeprom  (read-write)
+ *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
+ *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
+ *   /dev/i2c0.ds1375-raw   (read-write; transfer bytes to/from the ds1375)
+ *
+ */
+int BSP_i2c_initialize(void);
+#define BSP_PREDRIVER_I2C_INIT
+
+/* System Control Register */
+#define BSP_MVME3100_SYS_CR				((volatile uint8_t *)0xe2000001)
+#define BSP_MVME3100_SYS_CR_RESET_MSK		(7<<5)
+#define BSP_MVME3100_SYS_CR_RESET			(5<<5)
+#define BSP_MVME3100_SYS_CR_EEPROM_WP		(1<<1)
+#define BSP_MVME3100_SYS_CR_TSTAT_MSK		(1<<0)
+
+/* LED support */
+#define BSP_MVME3100_SYS_IND_REG		((volatile uint8_t *)0xe2000002)
+#define BSP_LED_BRD_FAIL					(1<<0)
+#define BSP_LED_USR1						(1<<1)
+#define BSP_LED_USR2						(1<<2)
+#define BSP_LED_USR3						(1<<3)
+
+/* Flash CSR   */
+#define BSP_MVME3100_FLASH_CSR			((volatile uint8_t *)0xe2000003)
+#define BSP_MVME3100_FLASH_CSR_FLASH_RDY	(1<<0)
+#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL	(1<<1)
+#define BSP_MVME3100_FLASH_CSR_F_WP_HW		(1<<2)
+#define BSP_MVME3100_FLASH_CSR_F_WP_SW		(1<<3)
+#define BSP_MVME3100_FLASH_CSR_MAP_SEL		(1<<4)
+
+/* Phy interrupt detect */
+#define BSP_MVME3100_IRQ_DETECT_REG		((volatile uint8_t *)0xe2000007)
+
+/* Atomically set bits in a sys-register; The bits set in 'mask'
+ * are set in the register others; are left unmodified.
+ *
+ * RETURNS: old state.
+ *
+ * NOTE   : since BSP_setSysReg( reg, 0 ) does not make
+ *          any changes this call may be used
+ *          to read the current status w/o modifying it.
+ */
+uint8_t BSP_setSysReg(volatile uint8_t *r, uint8_t mask);
+
+/* Atomically clear bits in a sys-register; The bits set in 'mask'
+ * are cleared in the register; others are left unmodified.
+ *
+ * RETURNS: old state.
+ *
+ * NOTE   : since BSP_clrSysReg( reg, 0 ) does not make
+ *          any changes this call may be used
+ *          to read the current status w/o modifying it.
+ */
+
+uint8_t BSP_clrSysReg(volatile uint8_t *r, uint8_t mask);
+
+/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */
+
+/* Set write-protection for all EEPROM devices
+ * RETURNS: old status
+ */
+uint8_t BSP_eeprom_write_protect(void);
+
+/* Disengage write-protection for all EEPROM devices
+ * RETURNS: old status
+ */
+uint8_t BSP_eeprom_write_enable(void);
+
+/* Set LEDs that have their bit set in the mask
+ *
+ * RETURNS: old status.
+ *
+ * NOTE   : since BSP_setLEDs( 0 ) does not make
+ *          any changes this call may be used
+ *          to read the current status w/o modifying it.
+ */
+uint8_t BSP_setLEDs(uint8_t mask);
+
+/* Clear LEDs that have their bit set in the mask
+ *
+ * RETURNS: old status
+ *
+ * NOTE:  : see above (BSP_setLEDs)
+ */
+uint8_t BSP_clrLEDs(uint8_t mask);
+
+#if 0
+#define outport_byte(port,value) outb(value,port)
+#define outport_word(port,value) outw(value,port)
+#define outport_long(port,value) outl(value,port)
+
+#define inport_byte(port,value) (value = inb(port))
+#define inport_word(port,value) (value = inw(port))
+#define inport_long(port,value) (value = inl(port))
+#endif
+
+/*
+ * Total memory using RESIDUAL DATA
+ */
+extern unsigned int BSP_mem_size;
+/*
+ * PCI Bus Frequency
+ */
+extern unsigned int BSP_bus_frequency;
+/*
+ * processor clock frequency
+ */
+extern unsigned int BSP_processor_frequency;
+/*
+ * Time base divisior (how many tick for 1 second).
+ */
+extern unsigned int BSP_time_base_divisor;
+/*
+ * The commandline as passed from the bootloader.
+ */
+extern char *BSP_commandline_string;
+
+#define BSP_Convert_decrementer( _value ) \
+  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
+
+extern rtems_configuration_table  BSP_Configuration;
+/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
+extern int BSP_disconnect_clock_handler (void);
+extern int BSP_connect_clock_handler (void);
+
+/* clear hostbridge errors
+ *
+ * NOTE: The routine returns always (-1) if 'enableMCP==1'
+ *       [semantics needed by libbspExt] if the MCP input is not wired.
+ *       It returns and clears the error bits of the PCI status register.
+ *       MCP support is disabled because:
+ *         a) the 2100 has no raven chip
+ *         b) the raven (2300) would raise machine check interrupts
+ *            on PCI config space access to empty slots.
+ */
+extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
+extern void BSP_motload_pci_fixup(void);
+
+struct rtems_bsdnet_ifconfig;
+
+int
+rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
+
+#define RTEMS_BSP_NETWORK_DRIVER_NAME   "tse1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
+
+/*
+ * Prototypes for methods called only from .S for dependency tracking
+ */
+char *save_boot_params(
+  void *r3,
+  void *r4,
+  void *r5,
+  char *cmdline_start,
+  char *cmdline_end
+);
+void zero_bss(void);
+
+/*
+ * Prototypes for methods in the BSP that cross file boundaries
+ */
+extern void BSP_vme_config(void);
+extern void BSP_pciConfigDump_early( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+#endif
Index: bsps/powerpc/mvme3100/include/bsp/VMEConfig.h
===================================================================
--- bsps/powerpc/mvme3100/include/bsp/VMEConfig.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/bsp/VMEConfig.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,132 @@
+/**
+ *  @file
+ *
+ *  @ingroup powerpc_vmeconfig
+ *
+ *  @brief mvme3100 BSP specific address space configuration parameters
+ */
+
+#ifndef RTEMS_BSP_VME_CONFIG_H
+#define RTEMS_BSP_VME_CONFIG_H
+
+/*
+ * Authorship
+ * ----------
+ * This software was created by
+ *     Till Straumann <strauman@slac.stanford.edu>, 2002..2007,
+ * 	   Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * This software was produced by
+ *     the Stanford Linear Accelerator Center, Stanford University,
+ * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software.  Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+/*
+ * NOTE: the BSP (startup/bspstart.c) uses
+ * hardcoded window lengths that match this
+ * layout:
+ */
+
+#define _VME_A32_WIN0_ON_PCI	0xc0000000
+#define _VME_CSR_ON_PCI			0xce000000
+#define _VME_A24_ON_PCI			0xcf000000
+#define _VME_A16_ON_PCI			0xcfff0000
+
+/* start of the A32 window on the VME bus
+ * TODO: this should perhaps be a run-time configuration option
+ */
+#define _VME_A32_WIN0_ON_VME	0x20000000
+
+/* if _VME_DRAM_OFFSET is defined, the BSP
+ * will map the board RAM onto the VME bus, starting
+ * at _VME_DRAM_OFFSET
+ */
+#define _VME_DRAM_OFFSET		0xc0000000
+
+/* If your BSP requires a non-standard way to configure
+ * the VME interrupt manager then define the symbol
+ *
+ * BSP_VME_INSTALL_IRQ_MGR
+ *
+ * to a proper instruction sequence that installs the
+ * universe interrupt manager. This requires knowledge
+ * of the wiring between the universe and the PIC (main
+ * interrupt controller), i.e., which IRQ 'pins' of the
+ * universe are wired to which 'lines'/inputs at the PIC.
+ * (consult vmeUniverse.h for more information).
+ *
+ * When installing the universe IRQ manager it is also
+ * possible to specify whether it should try to share
+ * PIC interrupts with other sources. This might not
+ * be supported by all BSPs (but the unverse driver
+ * recognizes that).
+ *
+ * If BSP_VME_INSTALL_IRQ_MGR is undefined then
+ * the default algorithm is used (vme_universe.c):
+ *
+ * This default setup uses only a single wire. It reads
+ * the PIC 'line' from PCI configuration space and assumes
+ * this to be wired to the first (LIRQ0) IRQ input at the
+ * universe. The default setup tries to use interrupt
+ * sharing.
+ */
+
+extern int BSP_VMEInit(void);
+extern int BSP_VMEIrqMgrInstall(void);
+
+/**
+ *  @defgroup powerpc_vme BSP_VME_INSTALL_IRQ_MGR Support
+ *
+ *  @ingroup powerpc_mvme3100
+ *
+ *  @brief BSP_VME_INSTALL_IRQ_MGR Support Package
+ */
+#define BSP_VME_INSTALL_IRQ_MGR(err)    \
+	do {                                \
+		err = vmeTsi148InstallIrqMgrAlt(\
+			VMETSI148_IRQ_MGR_FLAG_SHARED, /* use shared IRQs */ \
+			0, BSP_VME0_IRQ,            \
+			1, BSP_VME1_IRQ,            \
+			2, BSP_VME2_IRQ,            \
+			3, BSP_VME3_IRQ,            \
+			-1 /* terminate list  */    \
+		);                              \
+	} while (0)
+
+/* This BSP uses the Tsi148 Driver */
+#define _VME_DRIVER_TSI148
+
+#endif
Index: bsps/powerpc/mvme3100/include/bsp/if_tsec_pub.h
===================================================================
--- bsps/powerpc/mvme3100/include/bsp/if_tsec_pub.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/bsp/if_tsec_pub.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,475 @@
+/**
+ *  @file
+ *
+ *  @ingroup powerpc_iftsecpub
+ *
+ *  @brief IF_TSEC_PUB Support
+ */
+
+#ifndef IF_TSEC_PUBLIC_INTERFACE_H
+#define IF_TSEC_PUBLIC_INTERFACE_H
+
+/*
+ * Authorship
+ * ----------
+ * This software ('mvme3100' RTEMS BSP) was created by
+ *
+ *     Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
+ * 	   Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * The 'mvme3100' BSP was produced by
+ *     the Stanford Linear Accelerator Center, Stanford University,
+ * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software.  Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+#include <rtems.h>
+#include <stdio.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Opaque driver handle */
+struct tsec_private;
+
+/********** Low-level Driver API ****************/
+
+/**
+ *  @defgroup powerpc_iftsecpub Low-level Driver API
+ *
+ *  @ingroup powerpc_mvme3100
+ *
+ *  @brief This API provides driver access to applications that
+ * want to use e.g., the second ethernet interface
+ * independently from the BSD TCP/IP stack. E.g., for
+ * raw ethernet packet communication...
+ */
+
+#define TSEC_TXIRQ ( (1<<(31-9)) | (1<<(31-11))                )
+#define TSEC_RXIRQ ( (1<<(31-0)) | (1<<(31- 3)) | (1<<(31-24)) )
+#define TSEC_LKIRQ (  1<<(31- 4)                               )
+/*
+ * Setup an interface.
+ * Allocates resources for descriptor rings and sets up the driver software structure.
+ *
+ * Arguments:
+ *	unit:
+ *		interface # (1..2). The interface must not be attached to BSD already.
+ *
+ *  driver_tid:
+ *		ISR posts RTEMS event # ('unit' - 1) to task with ID 'driver_tid' and disables interrupts
+ *		from this interface.
+ *
+ *	void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred):
+ *		Pointer to user-supplied callback to release a buffer that had been sent
+ *		by BSP_tsec_send_buf() earlier. The callback is passed 'cleanup_txbuf_arg'
+ *		and a flag indicating whether the send had been successful.
+ *		The driver no longer accesses 'user_buf' after invoking this callback.
+ *		CONTEXT: This callback is executed either by BSP_tsec_swipe_tx() or
+ *		BSP_tsec_send_buf(), BSP_tsec_init_hw(), BSP_tsec_stop_hw() (the latter
+ *		ones calling BSP_tsec_swipe_tx()).
+ *	void *cleanup_txbuf_arg:
+ *		Closure argument that is passed on to 'cleanup_txbuf()' callback;
+ *
+ *	void *(*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr),
+ *		Pointer to user-supplied callback to allocate a buffer for subsequent
+ *		insertion into the RX ring by the driver.
+ *		RETURNS: opaque handle to the buffer (which may be a more complex object
+ *				 such as an 'mbuf'). The handle is not used by the driver directly
+ *				 but passed back to the 'consume_rxbuf()' callback.
+ *				 Size of the available data area and pointer to buffer's data area
+ *				 in '*psize' and '*p_data_area', respectively.
+ *				 If no buffer is available, this routine should return NULL in which
+ *				 case the driver drops the last packet and re-uses the last buffer
+ *				 instead of handing it out to 'consume_rxbuf()'.
+ *		CONTEXT: Called when initializing the RX ring (BSP_tsec_init_hw()) or when
+ *				 swiping it (BSP_tsec_swipe_rx()).
+ *
+ *
+ *	void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len);
+ *		Pointer to user-supplied callback to pass a received buffer back to
+ *		the user. The driver no longer accesses the buffer after invoking this
+ *		callback (with 'len'>0, see below). 'user_buf' is the buffer handle
+ *		previously generated by 'alloc_rxbuf()'.
+ *		The callback is passed 'cleanup_rxbuf_arg' and a 'len'
+ *		argument giving the number of bytes that were received.
+ *		'len' may be <=0 in which case the 'user_buf' argument is NULL.
+ *		'len' == 0 means that the last 'alloc_rxbuf()' had failed,
+ *		'len' < 0 indicates a receiver error. In both cases, the last packet
+ *		was dropped/missed and the last buffer will be re-used by the driver.
+ *		NOTE: the data are 'prefixed' with two bytes, i.e., the ethernet packet header
+ *		      is stored at offset 2 in the buffer's data area. Also, the FCS (4 bytes)
+ *		      is appended. 'len' accounts for both.
+ *		CONTEXT: Called from BSP_tsec_swipe_rx().
+ *	void *cleanup_rxbuf_arg:
+ *		Closure argument that is passed on to 'consume_rxbuf()' callback;
+ *
+ *  rx_ring_size, tx_ring_size:
+ *		How many big to make the RX and TX descriptor rings. Note that the sizes
+ *		may be 0 in which case a reasonable default will be used.
+ *		If either ring size is < 0 then the RX or TX will be disabled.
+ *		Note that it is illegal in this case to use BSP_tsec_swipe_rx() or
+ *		BSP_tsec_swipe_tx(), respectively.
+ *
+ *  irq_mask:
+ *		Interrupts to enable. OR of flags from above.
+ *
+ */
+struct tsec_private *
+BSP_tsec_setup(
+	int		 unit,
+	rtems_id driver_tid,
+	void     (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred),
+	void *   cleanup_txbuf_arg,
+	void *   (*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr),
+	void     (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len),
+	void *   consume_rxbuf_arg,
+	int		 rx_ring_size,
+	int		 tx_ring_size,
+	int		 irq_mask
+);
+
+/*
+ * Alternate 'setup' routine allowing the user to install an ISR rather
+ * than a task ID.
+ * All parameters (other than 'isr' / 'isr_arg') and the return value
+ * are identical to the BSP_tsec_setup() entry point.
+ */
+struct tsec_private *
+BSP_tsec_setup_1(
+	int		 unit,
+	void     (*isr)(void *isr_arg),
+	void *   isr_arg,
+	void     (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred),
+	void *   cleanup_txbuf_arg,
+	void *   (*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr),
+	void     (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len),
+	void *   consume_rxbuf_arg,
+	int		 rx_ring_size,
+	int		 tx_ring_size,
+	int		 irq_mask
+);
+
+
+/*
+ * Descriptor scavenger; cleanup the TX ring, passing all buffers
+ * that have been sent to the cleanup_tx() callback.
+ * This routine is called from BSP_tsec_send_buf(), BSP_tsec_init_hw(),
+ * BSP_tsec_stop_hw().
+ *
+ * RETURNS: number of buffers processed.
+ */
+
+int
+BSP_tsec_swipe_tx(struct tsec_private *mp);
+
+
+/*
+ * Reset statistics counters.
+ */
+void
+BSP_tsec_reset_stats(struct tsec_private *mp);
+
+/*
+ * Initialize interface hardware
+ *
+ * 'mp'			handle obtained by from BSP_tsec_setup().
+ * 'promisc'	whether to set promiscuous flag.
+ * 'enaddr'		pointer to six bytes with MAC address. Read
+ *				from the device if NULL.
+ * NOTE:        multicast filter is cleared by this routine.
+ */
+void
+BSP_tsec_init_hw(struct tsec_private *mp, int promisc, unsigned char *enaddr);
+
+/*
+ * Clear multicast hash filter. No multicast frames are accepted
+ * after executing this routine (unless the hardware was initialized
+ * in 'promiscuous' mode).
+ *
+ * Reset reference count for all hash-table entries
+ * to zero (see BSP_tsec_mcast_filter_accept_del()).
+ */
+void
+BSP_tsec_mcast_filter_clear(struct tsec_private *mp);
+
+/*
+ * Program multicast filter to accept all multicast frames.
+ *
+ * Increment reference count for all hash-table entries
+ * by one (see BSP_tsec_mcast_filter_accept_del()).
+ */
+void
+BSP_tsec_mcast_filter_accept_all(struct tsec_private *mp);
+
+/*
+ * Add a MAC address to the multicast filter and increment
+ * the reference count for the matching hash-table entry
+ * (see BSP_tsec_mcast_filter_accept_del()).
+ *
+ * Existing entries are not changed but note that
+ * the filter is imperfect, i.e., multiple MAC addresses
+ * may alias to a single filter entry. Hence software
+ * filtering must still be performed.
+ *
+ */
+void
+BSP_tsec_mcast_filter_accept_add(struct tsec_private *mp, unsigned char *enaddr);
+
+/*
+ * Remove a MAC address from the (imperfec) multicast
+ * filter.
+ * Note that the driver maintains an internal reference
+ * counter for each multicast hash. The hash-table
+ * entry is only cleared when the reference count
+ * reaches zero ('del' has been called the same
+ * amount of times as 'add' for an address (or
+ * any alias) that matches a given table entry.
+ * BSP_tsec_mcast_filter_clear() resets all reference
+ * counters to zero.
+ */
+void
+BSP_tsec_mcast_filter_accept_del(struct tsec_private *mp, unsigned char *enaddr);
+
+/*
+ * Dump statistics to FILE 'f'. If NULL, stdout is used.
+ */
+void
+BSP_tsec_dump_stats(struct tsec_private *mp, FILE *f);
+
+/*
+ * Shutdown hardware and clean out the rings
+ */
+void
+BSP_tsec_stop_hw(struct tsec_private *mp);
+
+/*
+ * calls BSP_tsec_stop_hw(), releases all resources and marks the interface
+ * as unused.
+ * RETURNS 0 on success, nonzero on failure.
+ * NOTE:   the handle MUST NOT be used after successful execution of this
+ *         routine.
+ */
+int
+BSP_tsec_detach(struct tsec_private *mp);
+
+/*
+ * Enqueue a mbuf chain or a raw data buffer for transmission;
+ * RETURN: #bytes sent or -1 if there are not enough free descriptors
+ *
+ * If 'len' is <=0 then 'm_head' is assumed to point to a mbuf chain.
+ * OTOH, a raw data packet (or a different type of buffer)
+ * may be sent (non-BSD driver) by pointing data_p to the start of
+ * the data and passing 'len' > 0.
+ * 'm_head' is passed back to the 'cleanup_txbuf()' callback.
+ *
+ * Comments: software cache-flushing incurs a penalty if the
+ *           packet cannot be queued since it is flushed anyways.
+ *           The algorithm is slightly more efficient in the normal
+ *			 case, though.
+ *
+ * RETURNS: # bytes enqueued to device for transmission or -1 if no
+ *          space in the TX ring was available.
+ */
+
+int
+BSP_tsec_send_buf(struct tsec_private *mp, void *m_head, void *data_p, int len);
+
+/*
+ * Retrieve all received buffers from the RX ring, replacing them
+ * by fresh ones (obtained from the alloc_rxbuf() callback). The
+ * received buffers are passed to consume_rxbuf().
+ *
+ * RETURNS: number of buffers processed.
+ */
+int
+BSP_tsec_swipe_rx(struct tsec_private *mp);
+
+/* read ethernet address from hw to buffer */
+void
+BSP_tsec_read_eaddr(struct tsec_private *mp, unsigned char *eaddr);
+
+/* Read MII register */
+uint32_t
+BSP_tsec_mdio_rd(struct tsec_private *mp, unsigned reg);
+
+/* Write MII register */
+int
+BSP_tsec_mdio_wr(struct tsec_private *mp, unsigned reg, uint32_t val);
+
+/*
+ * read/write media word.
+ *   'cmd': can be SIOCGIFMEDIA, SIOCSIFMEDIA, 0 or 1. The latter
+ *          are aliased to the former for convenience.
+ *  'parg': pointer to media word.
+ *
+ * RETURNS: 0 on success, nonzero on error
+ */
+int
+BSP_tsec_media_ioctl(struct tsec_private *mp, int cmd, int *parg);
+
+/* Interrupt related routines */
+
+/*
+ * When it comes to interrupts the chip has two rather
+ * annoying features:
+ *   1 once an IRQ is pending, clearing the IMASK does not
+ *     de-assert the interrupt line.
+ *   2 the chip has three physical interrupt lines even though
+ *     all events are reported in a single register. Rather
+ *     useless; we must hook 3 ISRs w/o any real benefit.
+ *     In fact, it makes our life a bit more difficult:
+ *
+ * Hence, for (1) we would have to mask interrupts at the PIC
+ * but to re-enable them we would have to do that three times
+ * because of (2).
+ *
+ * Therefore, we take the following approach:
+ *
+ *   ISR masks all interrupts on the TSEC, acks/clears them
+ *   and stores the acked irqs in the device struct where
+ *   it is picked up by BSP_tsec_ack_irqs().
+ *   Since all interrupts are disabled until the daemon
+ *   re-enables them after calling BSP_tsec_ack_irqs()
+ *   no interrupts are lost.
+ *
+ * BUT:  NO isr (including PHY isrs) MUST INTERRUPT ANY
+ *       OTHER ONE, i.e., they all must have the same
+ *       priority. Otherwise, integrity of the cached
+ *       irq_pending variable may be compromised.
+ */
+
+/* Note: the BSP_tsec_enable/disable/ack_irqs() entry points
+ *       are deprecated.
+ *       The newer API where the user passes a mask allows
+ *       for more selective control.
+ */
+
+/* Enable interrupts at device */
+void
+BSP_tsec_enable_irqs(struct tsec_private *mp);
+
+/* Disable interrupts at device */
+void
+BSP_tsec_disable_irqs(struct tsec_private *mp);
+
+/*
+ * Acknowledge (and clear) interrupts.
+ * RETURNS: interrupts that were raised.
+ */
+uint32_t
+BSP_tsec_ack_irqs(struct tsec_private *mp);
+
+/* Enable interrupts included in 'mask' (leaving
+ * already enabled interrupts on). If the mask includes
+ * bits that were not passed to the 'setup' routine then
+ * the behavior is undefined.
+ */
+void
+BSP_tsec_enable_irq_mask(struct tsec_private *mp, uint32_t irq_mask);
+
+/* Disable interrupts included in 'mask' (leaving
+ * other ones that are currently enabled on). If the mask
+ * includes bits that were not passed to the 'setup' routine
+ * then the behavior is undefined.
+
+ * RETURNS: Bitmask of interrupts that were enabled upon entry
+ *          into this routine. This can be used to restore the previous
+ *          state.
+ */
+uint32_t
+BSP_tsec_disable_irq_mask(struct tsec_private *mp, uint32_t irq_mask);
+
+/* Acknowledge and clear selected interrupts.
+ *
+ * RETURNS: All pending interrupts.
+ *
+ * NOTE:    Only pending interrupts contained in 'mask'
+ *          are cleared. Others are left pending.
+ *
+ *          This routine can be used to check for pending
+ *          interrupts (pass mask ==  0) or to clear all
+ *          interrupts (pass mask == -1).
+ */
+uint32_t
+BSP_tsec_ack_irq_mask(struct tsec_private *mp, uint32_t mask);
+
+
+/* Retrieve the driver daemon TID that was passed to
+ * BSP_tsec_setup().
+ */
+
+rtems_id
+BSP_tsec_get_tid(struct tsec_private *mp);
+
+struct tsec_private *
+BSP_tsec_getp(unsigned index);
+
+/*
+ *
+ * Example driver task loop (note: no synchronization of
+ * buffer access shown!).
+ * RTEMS_EVENTx = 0,1 or 2 depending on IF unit.
+ *
+ *    / * setup (obtain handle) and initialize hw here * /
+ *
+ *    do {
+ *      / * ISR disables IRQs and posts event * /
+ *		rtems_event_receive( RTEMS_EVENTx, RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &evs );
+ *		irqs = BSP_tsec_ack_irqs(handle);
+ *      if ( irqs & BSP_TSEC_IRQ_TX ) {
+ *			BSP_tsec_swipe_tx(handle); / * cleanup_txbuf() callback executed * /
+ *		}
+ *      if ( irqs & BSP_TSEC_IRQ_RX ) {
+ *			BSP_tsec_swipe_rx(handle); / * alloc_rxbuf() and consume_rxbuf() executed * /
+ *		}
+ *		BSP_tsec_enable_irqs(handle);
+ *    } while (1);
+ *
+ */
+
+/* PUBLIC RTEMS BSDNET ATTACH FUNCTION */
+struct rtems_bsdnet_ifconfig;
+
+int
+rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
Index: bsps/powerpc/mvme3100/include/bsp/irq.h
===================================================================
--- bsps/powerpc/mvme3100/include/bsp/irq.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/bsp/irq.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,137 @@
+/**
+ *  @file
+ *
+ *  @ingroup powerpc_irq
+ *
+ *  @brief This include file describe the data structure and the functions
+ *  implemented by RTEMS to write interrupt handlers.
+ */
+
+/* irq.h
+ *
+ *  This include file describe the data structure and the functions implemented
+ *  by RTEMS to write interrupt handlers.
+ *
+ *  Copyright (C) 1999 valette@crf.canon.fr
+ *
+ *  This code is heavilly inspired by the public specification of STREAM V2
+ *  that can be found at :
+ *
+ *      <http://www.chorus.com/Documentation/index.html> by following
+ *  the STREAM API Specification Document link.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
+ */
+
+#ifndef BSP_POWERPC_IRQ_H
+#define BSP_POWERPC_IRQ_H
+
+#define BSP_SHARED_HANDLER_SUPPORT      1
+#include <rtems/irq.h>
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @defgroup powerpc_irq Definitions
+ *
+ *  @ingroup powerpc_mvme3100
+ *
+ *  @brief rtems_irq_number Definitions
+ */
+
+/* Must pad number of external sources to 16 because
+ * of the layout of vector/priority registers in the
+ * 8540's openpic where there is a gap between
+ * registers corresponding to external and core sources.
+ */
+#define BSP_EXT_IRQ_NUMBER          (16)
+#define BSP_CORE_IRQ_NUMBER			(32)
+
+/* openpic glue code from shared/irq assigns priorities and configures
+ * initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy
+ * boards). Hence PCI_IRQ_NUMBER must also cover the internal sources
+ * even though they have nothing to do with PCI.
+ */
+#define BSP_PCI_IRQ_NUMBER			(BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER)
+#define BSP_PCI_IRQ_LOWEST_OFFSET	(0)
+#define BSP_PCI_IRQ_MAX_OFFSET		(BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
+
+#define BSP_CORE_IRQ_LOWEST_OFFSET  (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER)
+#define BSP_CORE_IRQ_MAX_OFFSET		(BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1)
+
+/*
+ * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
+ * handler might be connected
+ */
+#define BSP_PROCESSOR_IRQ_NUMBER	(1)
+#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1)
+#define BSP_PROCESSOR_IRQ_MAX_OFFSET	(BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
+/* Misc vectors for OPENPIC irqs (IPI, timers)
+ */
+#define BSP_MISC_IRQ_NUMBER		(8)
+#define BSP_MISC_IRQ_LOWEST_OFFSET	(BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
+#define BSP_MISC_IRQ_MAX_OFFSET		(BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
+/*
+ * Summary
+ */
+#define BSP_IRQ_NUMBER			(BSP_MISC_IRQ_MAX_OFFSET + 1)
+#define BSP_LOWEST_OFFSET		(BSP_PCI_IRQ_LOWEST_OFFSET)
+#define BSP_MAX_OFFSET			(BSP_MISC_IRQ_MAX_OFFSET)
+
+/*
+ * Some PCI IRQ symbolic name definition
+ */
+#define BSP_PCI_IRQ0			(BSP_PCI_IRQ_LOWEST_OFFSET)
+
+#define BSP_VME0_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  0)
+#define BSP_VME1_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  1)
+#define BSP_VME2_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  2)
+#define BSP_VME3_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  3)
+
+#define BSP_ABORT_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  8)
+#define BSP_TEMP_IRQ			(BSP_PCI_IRQ_LOWEST_OFFSET  +  9)
+#define BSP_PHY_IRQ				(BSP_PCI_IRQ_LOWEST_OFFSET  + 10)
+#define BSP_RTC_IRQ				(BSP_PCI_IRQ_LOWEST_OFFSET  + 11)
+
+/* Weird - they provide 3 different IRQ lines per ethernet controller
+ * but only one shared line for 2 UARTs ???
+ */
+#define BSP_UART_COM1_IRQ		(BSP_CORE_IRQ_LOWEST_OFFSET + 26)
+#define BSP_UART_COM2_IRQ		(BSP_CORE_IRQ_LOWEST_OFFSET + 26)
+#define BSP_I2C_IRQ				(BSP_CORE_IRQ_LOWEST_OFFSET + 27)
+
+/*
+ * Some internal (CORE) name definitions
+ */
+/* Ethernet (FEC) */
+#define BSP_CORE_IRQ_FEC		(BSP_CORE_IRQ_LOWEST_OFFSET + 25)
+/* i2c controller */
+#define BSP_CORE_IRQ_I2C		(BSP_CORE_IRQ_LOWEST_OFFSET + 27)
+
+/*
+ * Some Processor execption handled as RTEMS IRQ symbolic name definition
+ */
+#define BSP_DECREMENTER			(BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
+
+/*-------------------------------------------------------------------------+
+| Function Prototypes.
++--------------------------------------------------------------------------*/
+
+extern void BSP_rtems_irq_mng_init(unsigned cpuId);
+
+#include <bsp/irq_supp.h>
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif
+#endif
Index: bsps/powerpc/mvme3100/include/bsp/mpc8540_i2c_busdrv.h
===================================================================
--- bsps/powerpc/mvme3100/include/bsp/mpc8540_i2c_busdrv.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/bsp/mpc8540_i2c_busdrv.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,72 @@
+/**
+ *  @file
+ *
+ *  @ingroup powerpc_mpc8540i2cbusdrv
+ *
+ *  @brief I2C bus driver for mpc8540-based boards
+ */
+
+#ifndef MPC8540_I2C_BUS_DRIVER_H
+#define MPC8540_I2C_BUS_DRIVER_H
+
+/*
+ * Authorship
+ * ----------
+ * This software ('mvme3100' RTEMS BSP) was created by
+ *
+ *     Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
+ * 	   Stanford Linear Accelerator Center, Stanford University.
+ *
+ * Acknowledgement of sponsorship
+ * ------------------------------
+ * The 'mvme3100' BSP was produced by
+ *     the Stanford Linear Accelerator Center, Stanford University,
+ * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ *
+ * Government disclaimer of liability
+ * ----------------------------------
+ * Neither the United States nor the United States Department of Energy,
+ * nor any of their employees, makes any warranty, express or implied, or
+ * assumes any legal liability or responsibility for the accuracy,
+ * completeness, or usefulness of any data, apparatus, product, or process
+ * disclosed, or represents that its use would not infringe privately owned
+ * rights.
+ *
+ * Stanford disclaimer of liability
+ * --------------------------------
+ * Stanford University makes no representations or warranties, express or
+ * implied, nor assumes any liability for the use of this software.
+ *
+ * Stanford disclaimer of copyright
+ * --------------------------------
+ * Stanford University, owner of the copyright, hereby disclaims its
+ * copyright and all other rights in this software.  Hence, anyone may
+ * freely use it for any purpose without restriction.
+ *
+ * Maintenance of notices
+ * ----------------------
+ * In the interest of clarity regarding the origin and status of this
+ * SLAC software, this and all the preceding Stanford University notices
+ * are to remain affixed to any copy or derivative of this software made
+ * or distributed by the recipient and are to be affixed to any copy of
+ * software made or distributed by the recipient that contains a copy or
+ * derivative of this software.
+ *
+ * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
+ */
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#include <rtems.h>
+#include <rtems/libi2c.h>
+
+/* for registration with libi2c */
+extern rtems_libi2c_bus_t *mpc8540_i2c_bus_descriptor;
+
+#ifdef __cplusplus
+  }
+#endif
+
+#endif
Index: bsps/powerpc/mvme3100/include/tm27.h
===================================================================
--- bsps/powerpc/mvme3100/include/tm27.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/powerpc/mvme3100/include/tm27.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,1 @@
+#include <rtems/tm27-default.h>
