Index: bsps/mips/hurricane/headers.am
===================================================================
--- bsps/mips/hurricane/headers.am	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/mips/hurricane/headers.am	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,11 @@
+## This file was generated by "./boostrap -H".
+
+include_HEADERS =
+include_HEADERS += ../../../../../../bsps/mips/hurricane/include/bsp.h
+include_HEADERS += include/bspopts.h
+include_HEADERS += ../../../../../../bsps/mips/hurricane/include/tm27.h
+include_HEADERS += ../../../../../../bsps/mips/hurricane/include/usc.h
+
+include_bspdir = $(includedir)/bsp
+include_bsp_HEADERS =
+include_bsp_HEADERS += ../../../../../../bsps/mips/hurricane/include/bsp/irq.h
Index: bsps/mips/hurricane/include/bsp.h
===================================================================
--- bsps/mips/hurricane/include/bsp.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/mips/hurricane/include/bsp.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,79 @@
+/**
+ *  @file
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_MIPS_HURRICANE_BSP_H
+#define LIBBSP_MIPS_HURRICANE_BSP_H
+
+#ifndef ASM
+
+#include <bspopts.h>
+#include <bsp/default-initial-extension.h>
+
+#include <rtems.h>
+#include <libcpu/rm5231.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void WriteDisplay( char * string );
+
+extern uint32_t mips_get_timer( void );
+
+#define BSP_FEATURE_IRQ_EXTENSION
+#define BSP_SHARED_HANDLER_SUPPORT      1
+
+#define CPU_CLOCK_RATE_MHZ     (200)
+#define CLOCKS_PER_MICROSECOND ( CPU_CLOCK_RATE_MHZ ) /* equivalent to CPU clock speed in MHz */
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ *
+ *  NOTE: This macro generates a warning like "integer constant out
+ *        of range" which is safe to ignore.  In 64 bit mode, unsigned32
+ *        types are actually 64 bits long so that comparisons between
+ *        unsigned32 types and pointers are valid.  The warning is caused
+ *        by code in the delay macro that is necessary for 64 bit mode.
+ */
+
+#define rtems_bsp_delay( microseconds ) \
+  { \
+     uint32_t _end_clock = \
+          mips_get_timer() + microseconds * CLOCKS_PER_MICROSECOND; \
+     _end_clock %= 0x100000000;  /* make sure result is 32 bits */ \
+     \
+     /* handle timer overflow, if necessary */ \
+     while ( _end_clock < mips_get_timer() );  \
+     \
+     while ( _end_clock > mips_get_timer() ); \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+/*
+ * Prototypes for methods called from .S for dependency tracking
+ */
+void init_tlb(void);
+void resettlb(int i);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+#endif	/* __HURRICANE_BSP_h */
Index: bsps/mips/hurricane/include/bsp/irq.h
===================================================================
--- bsps/mips/hurricane/include/bsp/irq.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/mips/hurricane/include/bsp/irq.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,40 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief interrupt definitions.
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2012.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_MIPS_XXX_IRQ_H
+#define LIBBSP_MIPS_XXX_IRQ_H
+
+#ifndef ASM
+  #include <rtems.h>
+  #include <rtems/irq.h>
+  #include <rtems/irq-extension.h>
+  #include <rtems/score/mips.h>
+#endif
+
+/**
+ * @addtogroup bsp_interrupt
+ *
+ * @{
+ */
+
+#define BSP_INTERRUPT_VECTOR_MIN    0
+#define RM5231_MAXIMUM_VECTORS      (MIPS_INTERRUPT_BASE+8)
+#define BSP_INTERRUPT_VECTOR_MAX    RM5231_MAXIMUM_VECTORS
+
+/** @} */
+
+#endif /* LIBBSP_MIPS_JMR3904_IRQ_H */
Index: bsps/mips/hurricane/include/tm27.h
===================================================================
--- bsps/mips/hurricane/include/tm27.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/mips/hurricane/include/tm27.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,1 @@
+#include <rtems/tm27-default.h>
Index: bsps/mips/hurricane/include/usc.h
===================================================================
--- bsps/mips/hurricane/include/usc.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
+++ bsps/mips/hurricane/include/usc.h	(revision 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9)
@@ -0,0 +1,32 @@
+/* USC constants */
+
+#ifndef _USC_H__
+#define _USC_H__
+
+
+#define USC_REG_BASE	(0x1D000000 | 0xA0000000)
+
+/* Internal register addresses */
+#define SYSTEM (USC_REG_BASE + 0x73)
+
+#define INT_CFG0 (USC_REG_BASE + 0xE0)
+#define INT_CFG1 (USC_REG_BASE + 0xE4)
+#define INT_CFG2 (USC_REG_BASE + 0xE8)
+#define INT_STAT (USC_REG_BASE + 0xEC)
+
+#define WD_HBI (USC_REG_BASE + 0xF4)
+
+#define INT_CFG3 (USC_REG_BASE + 0x158)
+
+/* INT_CFGx register masks */
+#define HBI_MASK	0x00200000	/* Heartbeat timer interrupt mask */
+#define WDI_MASK	0x00400000	/* Watchdog timer interrupt mask */
+#define MODE_TOTEM_POLE	0x20000000	/* Totem Pole Output Mode */
+
+/* WD_HBI register bits */
+#define WD_EN 0x00800000	/* Watchdog enable */
+#define HBI_4000_PS	0x00200000	/* Heartbeat timer prescaler = 4000 */
+#define WD_INIT 0x10	/* Watchdog reset pattern (written to byte 2 in WD_HBI register) */
+
+
+#endif /* _USC_H__ */
