Ignore:
Timestamp:
Jun 5, 2014, 8:03:06 AM (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
1468d70
Parents:
40599e7e
git-author:
Sebastian Huber <sebastian.huber@…> (06/05/14 08:03:06)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/06/14 06:02:10)
Message:

bsp/altera-cyclone-v: Move SMP support

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspstart.c

    r40599e7e r2a1d86c  
    11/*
    2  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    1313 */
    1414
    15 #include <assert.h>
    16 #include <stdint.h>
    17 #include <bsp.h>
    1815#include <bsp/bootcard.h>
    1916#include <bsp/irq-generic.h>
    20 #include <bsp/linker-symbols.h>
    21 #include <bsp/start.h>
    2217#include <bsp/nocache-heap.h>
    23 #include <rtems/config.h>
    24 #include "socal/alt_rstmgr.h"
    25 #include "socal/alt_sysmgr.h"
    26 #include "socal/hps.h"
    27 
    28 #ifndef MIN
    29 #define MIN( a, b ) ( ( a ) < ( b ) ? ( a ) : ( b ) )
    30 #endif
    31 
    32 #define BSPSTART_MAX_CORES_PER_CONTROLLER 2
    33 
    34 static void bsp_start_secondary_cores( void )
    35 {
    36 #ifdef RTEMS_SMP
    37   volatile uint32_t *mpumodrst       = ALT_RSTMGR_MPUMODRST_ADDR;
    38   uint32_t          *cpu1_start_addr = (
    39     ALT_SYSMGR_ROMCODE_ADDR + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST );
    40   const uint32_t     CORES           = MIN(
    41     (uintptr_t) bsp_processor_count,
    42     rtems_configuration_get_maximum_processors() );
    43   unsigned int       index;
    44 
    45 
    46   /* Memory would get overwritten if a too small processor count
    47    * would be specified */
    48   assert(
    49     (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER );
    50 
    51   if ( (uintptr_t) bsp_processor_count >= BSPSTART_MAX_CORES_PER_CONTROLLER ) {
    52     for ( index = 1; index < CORES; ++index ) {
    53       /* set the start address from where the core will execute */
    54       (*cpu1_start_addr) = ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET(
    55         (uintptr_t) _start );
    56 
    57       /* Make the core finish it's reset */
    58       (*mpumodrst) &= ~ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK;
    59     }
    60   }
    61 #endif /* #ifdef RTEMS_SMP */
    62 }
    6318
    6419void bsp_start( void )
     
    6621  bsp_interrupt_initialize();
    6722  altera_cyclone_v_nocache_init_heap();
    68   bsp_start_secondary_cores();
    6923}
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