Changeset 28eeb6a in rtems


Ignore:
Timestamp:
Sep 2, 2016, 11:59:21 PM (3 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
4.11
Children:
be62c0b0
Parents:
00dfdd6
git-author:
Pavel Pisa <pisa@…> (09/02/16 23:59:21)
git-committer:
Pavel Pisa <pisa@…> (10/02/16 08:40:34)
Message:

bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by level.

New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).

Updates #2782
Updates #2783

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/shared/include/arm-cp15.h

    r00dfdd6 r28eeb6a  
    10841084
    10851085ARM_CP15_TEXT_SECTION static inline void
     1086arm_cp15_cache_invalidate_level(uint32_t level, uint32_t inst_data_fl)
     1087{
     1088  uint32_t ccsidr;
     1089  uint32_t line_power;
     1090  uint32_t associativity;
     1091  uint32_t way;
     1092  uint32_t way_shift;
     1093
     1094  ccsidr = arm_cp15_get_cache_size_id_for_level((level << 1) | inst_data_fl);
     1095
     1096  line_power = arm_ccsidr_get_line_power(ccsidr);
     1097  associativity = arm_ccsidr_get_associativity(ccsidr);
     1098  way_shift = __builtin_clz(associativity - 1);
     1099
     1100  for (way = 0; way < associativity; ++way) {
     1101    uint32_t num_sets = arm_ccsidr_get_num_sets(ccsidr);
     1102    uint32_t set;
     1103
     1104    for (set = 0; set < num_sets; ++set) {
     1105      uint32_t set_way = (way << way_shift)
     1106        | (set << line_power)
     1107        | (level << 1);
     1108
     1109      arm_cp15_data_cache_invalidate_line_by_set_and_way(set_way);
     1110    }
     1111  }
     1112}
     1113
     1114ARM_CP15_TEXT_SECTION static inline void
    10861115arm_cp15_data_cache_invalidate_all_levels(void)
    10871116{
     
    10951124    /* Check if this level has a data cache or unified cache */
    10961125    if (((ctype & (0x6)) == 2) || (ctype == 4)) {
    1097       uint32_t ccsidr;
    1098       uint32_t line_power;
    1099       uint32_t associativity;
    1100       uint32_t way;
    1101       uint32_t way_shift;
    1102 
    1103       ccsidr = arm_cp15_get_cache_size_id_for_level(level << 1);
    1104 
    1105       line_power = arm_ccsidr_get_line_power(ccsidr);
    1106       associativity = arm_ccsidr_get_associativity(ccsidr);
    1107       way_shift = __builtin_clz(associativity - 1);
    1108 
    1109       for (way = 0; way < associativity; ++way) {
    1110         uint32_t num_sets = arm_ccsidr_get_num_sets(ccsidr);
    1111         uint32_t set;
    1112 
    1113         for (set = 0; set < num_sets; ++set) {
    1114           uint32_t set_way = (way << way_shift)
    1115             | (set << line_power)
    1116             | (level << 1);
    1117 
    1118           arm_cp15_data_cache_invalidate_line_by_set_and_way(set_way);
    1119         }
    1120       }
     1126      arm_cp15_cache_invalidate_level(level, 0);
    11211127    }
    11221128  }
     
    11531159    : "memory"
    11541160  );
     1161}
     1162
     1163ARM_CP15_TEXT_SECTION static inline void
     1164arm_cp15_data_cache_clean_level(uint32_t level)
     1165{
     1166  uint32_t ccsidr;
     1167  uint32_t line_power;
     1168  uint32_t associativity;
     1169  uint32_t way;
     1170  uint32_t way_shift;
     1171
     1172  ccsidr = arm_cp15_get_cache_size_id_for_level(level << 1);
     1173
     1174  line_power = arm_ccsidr_get_line_power(ccsidr);
     1175  associativity = arm_ccsidr_get_associativity(ccsidr);
     1176  way_shift = __builtin_clz(associativity - 1);
     1177
     1178  for (way = 0; way < associativity; ++way) {
     1179    uint32_t num_sets = arm_ccsidr_get_num_sets(ccsidr);
     1180    uint32_t set;
     1181
     1182    for (set = 0; set < num_sets; ++set) {
     1183      uint32_t set_way = (way << way_shift)
     1184        | (set << line_power)
     1185        | (level << 1);
     1186
     1187      arm_cp15_data_cache_clean_line_by_set_and_way(set_way);
     1188    }
     1189  }
    11551190}
    11561191
     
    11671202    /* Check if this level has a data cache or unified cache */
    11681203    if (((ctype & (0x6)) == 2) || (ctype == 4)) {
    1169       uint32_t ccsidr;
    1170       uint32_t line_power;
    1171       uint32_t associativity;
    1172       uint32_t way;
    1173       uint32_t way_shift;
    1174 
    1175       ccsidr = arm_cp15_get_cache_size_id_for_level(level << 1);
    1176 
    1177       line_power = arm_ccsidr_get_line_power(ccsidr);
    1178       associativity = arm_ccsidr_get_associativity(ccsidr);
    1179       way_shift = __builtin_clz(associativity - 1);
    1180 
    1181       for (way = 0; way < associativity; ++way) {
    1182         uint32_t num_sets = arm_ccsidr_get_num_sets(ccsidr);
    1183         uint32_t set;
    1184 
    1185         for (set = 0; set < num_sets; ++set) {
    1186           uint32_t set_way = (way << way_shift)
    1187             | (set << line_power)
    1188             | (level << 1);
    1189 
    1190           arm_cp15_data_cache_clean_line_by_set_and_way(set_way);
    1191         }
    1192       }
     1204      arm_cp15_data_cache_clean_level(level);
    11931205    }
    11941206  }
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