Changeset 270ce1ff in rtems


Ignore:
Timestamp:
Nov 22, 2004, 10:13:35 PM (16 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
faed5fa
Parents:
30b4141
Message:

2004-11-22 Jennifer Averett <jennifer@…>

PR 581/bsps

  • Makefile.am, bsp_specs, configure.ac, include/bsp.h, include/tm27.h, start/start.S, startup/bspstart.c, startup/linkcmds, tools/Makefile.am, tools/psim, vectors/vectors.S, wrapup/Makefile.am: Convert PSIM to new exception model.
  • irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c: New files.
  • startup/setvec.c, timer/timer.c: Removed.
Location:
c/src/lib/libbsp/powerpc/psim
Files:
4 added
2 deleted
13 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/psim/ChangeLog

    r30b4141 r270ce1ff  
     12004-11-22      Jennifer Averett <jennifer@OARcorp.com>
     2
     3        PR 581/bsps
     4        * Makefile.am, bsp_specs, configure.ac, include/bsp.h, include/tm27.h,
     5        start/start.S, startup/bspstart.c, startup/linkcmds,
     6        tools/Makefile.am, tools/psim, vectors/vectors.S, wrapup/Makefile.am:
     7        Convert PSIM to new exception model.
     8        * irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c: New files.
     9        * startup/setvec.c, timer/timer.c: Removed.
     10
    1112004-09-24      Ralf Corsepius <ralf_corsepius@rtems.org>
    212
  • c/src/lib/libbsp/powerpc/psim/Makefile.am

    r30b4141 r270ce1ff  
    2121CLEANFILES =
    2222noinst_DATA =
     23
     24include_bspdir = $(includedir)/bsp
    2325
    2426include_HEADERS += include/coverhd.h
     
    2931project_lib_DATA = start$(LIB_VARIANT).$(OBJEXT)
    3032
     33EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S
     34rtems_crti$(LIB_VARIANT).$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
     35        $(CPPASCOMPILE) -DASM -o $@ -c $<
     36project_lib_DATA += rtems_crti$(LIB_VARIANT).$(OBJEXT)
     37
    3138dist_project_lib_DATA += startup/linkcmds
    3239
     
    3542startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
    3643    ../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
    37     ../../shared/main.c ../../shared/sbrk.c startup/setvec.c \
    38     ../../shared/gnatinstallhandler.c
     44    ../../shared/main.c ../../shared/sbrk.c ../../shared/gnatinstallhandler.c
    3945startup_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
    4046startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     
    4854noinst_DATA += startup$(LIB_VARIANT).rel
    4955
    50 EXTRA_PROGRAMS += clock.rel
    51 CLEANFILES += clock.rel
    52 clock_rel_SOURCES = clock/clock.c
    53 clock_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
    54 clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    55 
    56 EXTRA_PROGRAMS += clock_g.rel
    57 CLEANFILES += clock_g.rel
    58 clock_g_rel_SOURCES = $(clock_rel_SOURCES)
    59 clock_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
    60 clock_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    61 
    62 noinst_DATA += clock$(LIB_VARIANT).rel
     56EXTRA_PROGRAMS += pclock.rel
     57CLEANFILES += pclock.rel
     58pclock_rel_SOURCES = ../shared/clock/p_clock.c
     59pclock_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
     60pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     61
     62EXTRA_PROGRAMS += pclock_g.rel
     63CLEANFILES += pclock_g.rel
     64pclock_g_rel_SOURCES = $(pclock_rel_SOURCES)
     65pclock_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
     66pclock_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     67
     68noinst_DATA += pclock$(LIB_VARIANT).rel
    6369
    6470EXTRA_PROGRAMS += console.rel
     
    7783noinst_DATA += console$(LIB_VARIANT).rel
    7884
    79 EXTRA_PROGRAMS += timer.rel
    80 CLEANFILES += timer.rel
    81 timer_rel_SOURCES = timer/timer.c
    82 timer_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
    83 timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    84 
    85 EXTRA_PROGRAMS += timer_g.rel
    86 CLEANFILES += timer_g.rel
    87 timer_g_rel_SOURCES = $(timer_rel_SOURCES)
    88 timer_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
    89 timer_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    90 
    91 noinst_DATA += timer$(LIB_VARIANT).rel
     85include_bsp_HEADERS = irq/irq.h
     86
     87EXTRA_PROGRAMS += irq.rel
     88CLEANFILES += irq.rel
     89irq_rel_SOURCES = irq/irq.c irq/irq_init.c irq/irq_asm.S
     90irq_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
     91irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     92
     93EXTRA_PROGRAMS += irq_g.rel
     94CLEANFILES += irq_g.rel
     95irq_g_rel_SOURCES = $(irq_rel_SOURCES)
     96irq_g_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V)
     97irq_g_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     98
     99noinst_DATA += irq$(LIB_VARIANT).rel
    92100
    93101EXTRA_DIST += vectors/README
     
    95103EXTRA_PROGRAMS += vectors.rel
    96104CLEANFILES += vectors.rel
    97 vectors_rel_SOURCES = vectors/align_h.S vectors/vectors.S
     105vectors_rel_SOURCES = vectors/align_h.S vectors/vectors.S \
     106    ../../powerpc/shared/vectors/vectors_init.c
    98107vectors_rel_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V)
    99108vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
     
    106115
    107116noinst_DATA += vectors$(LIB_VARIANT).rel
     117
     118include_bsp_HEADERS += ../../powerpc/shared/vectors/vectors.h
    108119
    109120if HAS_MP
     
    158169PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
    159170
     171$(PROJECT_INCLUDE)/bsp/$(dirstamp):
     172        @$(mkdir_p) $(PROJECT_INCLUDE)/bsp
     173        @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     174PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     175
    160176$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
    161177        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
    162178PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
    163179
     180$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     181        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
     182PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
     183
     184$(PROJECT_INCLUDE)/bsp/vectors.h: ../shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     185        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
     186PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
     187
    164188$(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT): start$(LIB_VARIANT).$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
    165189        $(INSTALL_DATA) $< $(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT)
    166190TMPINSTALL_FILES += $(PROJECT_LIB)/start$(LIB_VARIANT).$(OBJEXT)
    167191
     192$(PROJECT_LIB)/rtems_crti$(LIB_VARIANT).$(OBJEXT): rtems_crti$(LIB_VARIANT).$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
     193        $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti$(LIB_VARIANT).$(OBJEXT)
     194TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti$(LIB_VARIANT).$(OBJEXT)
     195
    168196$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
    169197        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
  • c/src/lib/libbsp/powerpc/psim/bsp_specs

    r30b4141 r270ce1ff  
    44
    55*startfile:
    6 %{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems:  ecrti%O%s \
     6%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems:  ecrti%O%s rtems_crti%O%s  crtbegin.o%s  \
    77%{!qrtems_debug: start.o%s} \
    88%{qrtems_debug: start_g.o%s}}}
    9 
    10 *endfile:
    11 %{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
    129
    1310*link:
    1411%{!qrtems: %(old_link)} %{qrtems: -Qy -dp -Bstatic -e _start -u __vectors}
    1512
     13*endfile:
     14%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
  • c/src/lib/libbsp/powerpc/psim/configure.ac

    r30b4141 r270ce1ff  
    3434wrapup/Makefile])
    3535
    36 RTEMS_PPC_EXCEPTIONS([old])
     36RTEMS_PPC_EXCEPTIONS([new])
    3737
    3838AC_OUTPUT
  • c/src/lib/libbsp/powerpc/psim/include/bsp.h

    r30b4141 r270ce1ff  
    5555#include <rtems.h>
    5656#include <rtems/console.h>
     57#include <libcpu/io.h>
    5758#include <rtems/clockdrv.h>
    58 #include <rtems/console.h>
    5959#include <rtems/iosupp.h>
     60#include <bsp/vectors.h>
    6061
    6162/* Constants */
     63
     64/*
     65 *  Information placed in the linkcmds file.
     66 */
     67
     68extern int   RAM_END;
     69extern int   end;        /* last address in the program */
    6270
    6371/*
     
    7381 */
    7482
    75 /*
    76  *  Information placed in the linkcmds file.
    77  */
    78 
    79 extern int   RAM_START;
    80 extern int   RAM_END;
    81 extern int   RAM_SIZE;
    82 
    83 extern int   PROM_START;
    84 extern int   PROM_END;
    85 extern int   PROM_SIZE;
    86 
    87 extern int   CLOCK_SPEED;
    88 
    89 extern int   end;        /* last address in the program */
     83#define BSP_Convert_decrementer( _value ) ( (unsigned long long) _value )
    9084
    9185/* functions */
    9286
    93 void bsp_start( void );
    94 
    9587void bsp_cleanup( void );
    9688
    97 rtems_isr_entry set_vector(                    /* returns old vector */
    98   rtems_isr_entry     handler,                  /* isr routine        */
    99   rtems_vector_number vector,                   /* vector number      */
    100   int                 type                      /* RTEMS or RAW intr  */
    101 );
    102 
    103 void DEBUG_puts( char *string );
    104 
    105 void BSP_fatal_return( void );
    106 
    107 void bsp_spurious_initialize( void );
    108 
    10989extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
    110 
    11190extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
    112 
    113 extern uint32_t                  bsp_isr_level;
    11491
    11592#endif /* ASM */
  • c/src/lib/libbsp/powerpc/psim/include/tm27.h

    r30b4141 r270ce1ff  
    1616#define __tm27_h
    1717
     18#include <bsp/irq.h>
     19
    1820/*
    1921 *  Stuff for Time Test 27
     
    2224#define MUST_WAIT_FOR_INTERRUPT 1
    2325
    24 #define Install_tm27_vector( _handler ) \
    25   set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )
     26void nullFunc() {}
     27static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
     28                                              0,
     29                                              (rtems_irq_enable)nullFunc,
     30                                              (rtems_irq_disable)nullFunc,
     31                                              (rtems_irq_is_enabled) nullFunc};
     32
     33void Install_tm27_vector(void (*_handler)())
     34{
     35  clockIrqData.hdl = _handler;
     36  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
     37        printk("Error installing clock interrupt handler!\n");
     38        rtems_fatal_error_occurred(1);
     39  }
     40}
    2641
    2742#define Cause_tm27_intr()  \
    2843  do { \
    29     uint32_t  _clicks = 1; \
     44    unsigned32 _clicks = 1; \
    3045    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
    3146  } while (0)
    3247
     48
    3349#define Clear_tm27_intr() \
    3450  do { \
    35     uint32_t  _clicks = 0xffffffff; \
     51    unsigned32 _clicks = 0xffffffff; \
    3652    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
    3753  } while (0)
     
    3955#define Lower_tm27_intr() \
    4056  do { \
    41     uint32_t  _msr = 0; \
     57    unsigned32 _msr = 0; \
    4258    _ISR_Set_level( 0 ); \
    4359    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
  • c/src/lib/libbsp/powerpc/psim/start/start.S

    r30b4141 r270ce1ff  
    1818 */
    1919
     20#include <rtems/asm.h>
     21#include <rtems/score/cpu.h>
     22#include <libcpu/io.h>
    2023#include "ppc-asm.h"
    2124
     
    5457        .long .LCTOC1-.Laddr
    5558
     59        .globl  __rtems_entry_point
     60        .type   __rtems_entry_point,@function
     61__rtems_entry_point:
     62#if 1
    5663        .globl  _start
    5764        .type   _start,@function
    5865_start:
     66#endif
    5967        bl      .Laddr                  /* get current address */
    6068.Laddr:
     
    101109        li      r4, 0                   /* argv */
    102110        li      r3, 0                   /* argc */
     111
    103112        /* Let her rip */
    104113        bl      FUNC_NAME(boot_card)
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    r30b4141 r270ce1ff  
    1717#include <string.h>
    1818#include <fcntl.h>
    19 
    2019#include <bsp.h>
     20#include <bsp/irq.h>
    2121#include <rtems/libio.h>
    2222#include <rtems/libcsupport.h>
    2323#include <rtems/bspIo.h>
     24#include <libcpu/cpuIdent.h>
     25#include <libcpu/spr.h>
     26
     27SPR_RW(SPRG0)
     28SPR_RW(SPRG1)
     29
     30
     31extern unsigned long __rtems_end[];
     32
     33void  initialize_exceptions(void);
     34
     35/*  On psim, each click of the decrementer register corresponds
     36 *  to 1 instruction.  By setting this to 100, we are indicating
     37 *  that we are assuming it can execute 100 instructions per
     38 *  microsecond.  This corresponds to sustaining 1 instruction
     39 *  per cycle at 100 Mhz.  Whether this is a good guess or not
     40 *  is anyone's guess.
     41 */
     42
     43extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
    2444
    2545/*
     
    3050extern rtems_configuration_table  Configuration;
    3151rtems_configuration_table         BSP_Configuration;
    32 
    3352rtems_cpu_table   Cpu_table;
    34 uint32_t          bsp_isr_level;
    3553
    3654/*
     
    4361
    4462/*
     63 * PCI Bus Frequency
     64 */
     65 unsigned int BSP_bus_frequency;
     66 /*
     67  *  * Time base divisior (how many tick for 1 second).
     68  *   */
     69 unsigned int BSP_time_base_divisor;
     70
     71
     72
     73/*
    4574 *  Use the shared implementations of the following routines
    4675 */
     
    4877void bsp_postdriver_hook(void);
    4978void bsp_libc_init( void *, uint32_t, int );
     79
     80/*
     81 * system init stack and soft ir stack size
     82 */
     83#define INIT_STACK_SIZE 0x1000
     84#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
     85
     86
     87void BSP_panic(char *s)
     88{
     89    printk("%s PANIC %s\n",_RTEMS_version, s);
     90      __asm__ __volatile ("sc");
     91}
     92
     93void _BSP_Fatal_error(unsigned int v)
     94{
     95    printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
     96      __asm__ __volatile ("sc");
     97}
    5098
    5199/*
     
    85133void bsp_start( void )
    86134{
    87   unsigned char *work_space_start;
    88 
    89 #if 0
    90   /*
    91    * Set MSR to show vectors at 0 XXX
    92    */
    93   _CPU_MSR_Value( msr_value );
    94   msr_value &= ~PPC_MSR_EP;
    95   _CPU_MSR_SET( msr_value );
    96 #endif
     135  unsigned char     *work_space_start;
     136  register uint32_t  intrStack;
     137  register uint32_t *intrStackPtr;
     138
     139  /*
     140   * Note we can not get CPU identification dynamically, so force current_ppc_cpu.
     141   */
     142  current_ppc_cpu = PPC_PSIM;
    97143
    98144  /*
     
    119165  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
    120166
    121   /*
    122    *  The monitor likes the exception table to be at 0x0.
    123    */
    124 
    125   Cpu_table.exceptions_in_RAM = TRUE;
     167  BSP_bus_frequency        = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND;
     168  BSP_time_base_divisor    = 1;
     169
     170  /*
     171   *  The simulator likes the exception table to be at 0xfff00000.
     172   */
     173
     174  Cpu_table.exceptions_in_RAM = FALSE;
    126175
    127176  BSP_Configuration.work_space_size += 1024;
     
    137186  BSP_Configuration.work_space_start = work_space_start;
    138187
    139 }
     188  /*
     189   * Initialize the interrupt related settings
     190   * SPRG1 = software managed IRQ stack
     191   *
     192   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
     193   * some settings below...
     194   */
     195  intrStack = ((uint32_t) __rtems_end) +
     196          INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
     197
     198  /* make sure it's properly aligned */
     199  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
     200
     201  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
     202  intrStackPtr = (uint32_t*) intrStack;
     203  *intrStackPtr = 0;
     204
     205  _write_SPRG1(intrStack);
     206
     207  /* signal them that we have fixed PR288 - eventually, this should go away */
     208  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
     209
     210  /*
     211   * Initialize default raw exception hanlders. See vectors/vectors_init.c
     212   */
     213  initialize_exceptions();
     214
     215  /*
     216   * Initalize RTEMS IRQ system
     217   */
     218  BSP_rtems_irq_mng_init(0);
     219
     220}
  • c/src/lib/libbsp/powerpc/psim/startup/linkcmds

    r30b4141 r270ce1ff  
    1717/* Do we need any of these for elf?
    1818   __DYNAMIC = 0;    */
    19 PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 100);
     19PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 10000);   /* 100); */
    2020PROVIDE (CPU_PPC_CLICKS_PER_MS = 16667);
    2121MEMORY
     
    2727SECTIONS
    2828{
    29   .vectors 0xFFF00100 :
    30   {
    31     *(.vectors)
    32   } >EPROM
     29  .entry_point_section :
     30  {
     31        *(.entry_point_section)
     32  } > EPROM
    3333
    3434  /* Read-only sections, merged into text segment: */
    3535  /* . = 0x40000 + SIZEOF_HEADERS; */
    3636  . = 0x4000;
    37   .interp         : { *(.interp) }
    38   .hash           : { *(.hash)          }
    39   .dynsym         : { *(.dynsym)                }
    40   .dynstr         : { *(.dynstr)                }
    41   .rela.text      : { *(.rela.text)     }
    42   .rela.data      : { *(.rela.data)     }
    43   .rela.rodata    : { *(.rela.rodata)   }
    44   .rela.got       : { *(.rela.got)      }
    45   .rela.got1      : { *(.rela.got1)     }
    46   .rela.got2      : { *(.rela.got2)     }
    47   .rela.ctors     : { *(.rela.ctors)    }
    48   .rela.dtors     : { *(.rela.dtors)    }
    49   .rela.init      : { *(.rela.init)     }
    50   .rela.fini      : { *(.rela.fini)     }
    51   .rela.bss       : { *(.rela.bss)      }
    52   .rela.plt       : { *(.rela.plt)      }
    53   .rela.sdata     : { *(.rela.sdata2)   }
    54   .rela.sbss      : { *(.rela.sbss2)    }
    55   .rela.sdata2    : { *(.rela.sdata2)   }
    56   .rela.sbss2     : { *(.rela.sbss2)    }
    57   .plt            : { *(.plt)           }
     37  .interp         : { *(.interp) }
     38  .hash           : { *(.hash) }
     39  .dynsym         : { *(.dynsym) }
     40  .dynstr         : { *(.dynstr) }
     41  .gnu.version    : { *(.gnu.version) }
     42  .gnu.version_d  : { *(.gnu.version_d) }
     43  .gnu.version_r  : { *(.gnu.version_r) }
     44  .rel.init       : { *(.rel.init) }
     45  .rela.init      : { *(.rela.init) }
     46  .rel.text       : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) }
     47  .rela.text      : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
     48  .rel.fini       : { *(.rel.fini) }
     49  .rela.fini      : { *(.rela.fini) }
     50  .rel.rodata     : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) }
     51  .rela.rodata    : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) }
     52  .rel.data       : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) }
     53  .rela.data      : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) }
     54  .rel.tdata      : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) }
     55  .rela.tdata     : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) }
     56  .rel.tbss       : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) }
     57  .rela.tbss      : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) }
     58  .rel.ctors      : { *(.rel.ctors) }
     59  .rela.ctors     : { *(.rela.ctors) }
     60  .rel.dtors      : { *(.rel.dtors) }
     61  .rela.dtors     : { *(.rela.dtors) }
     62  .rel.got        : { *(.rel.got) }
     63  .rela.got       : { *(.rela.got) }
     64  .rela.got1           : { *(.rela.got1) }
     65  .rela.got2           : { *(.rela.got2) }
     66  .rel.sdata      : { *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) }
     67  .rela.sdata     : { *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) }
     68  .rel.sbss       : { *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) }
     69  .rela.sbss      : { *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) }
     70  .rel.sdata2     : { *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) }
     71  .rela.sdata2    : { *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) }
     72  .rel.sbss2      : { *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) }
     73  .rela.sbss2     : { *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) }
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     76  .rel.plt        : { *(.rel.plt) }
     77  .rela.plt       : { *(.rela.plt) }
    5878  .text      :
    5979  {
     
    7595    *(.gnu.warning)
    7696  } >RAM
    77   .init           : { _init = .; __init = .; *(.init)           } >RAM
    78   .fini           : { _fini = .; __fini = .; *(.fini)           } >RAM
     97  .init           :
     98  {
     99    KEEP (*(.init))
     100  } >RAM =0
     101  .fini           :
     102  {
     103    _fini = .;
     104    KEEP (*(.fini))
     105  } >RAM =0
    79106  .rodata         : { *(.rodata*) *(.gnu.linkonce.r*) } >RAM
    80107  .rodata1        : { *(.rodata1)       } >RAM
     108  PROVIDE (__FRAME_BEGIN__ = .);
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     110  PROVIDE (__FRAME_END__ = .);
    82111  PROVIDE (_etext = .);
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    87116  PROVIDE (__SBSS2_END__ = .);
     117  /* .eh_frame_hdr : { *(.eh_frame_hdr) } >RAM */
    88118  /* Adjust the address for the data segment.  We want to adjust up to
    89119     the same address within the page on the next page up.  It would
     
    136166  PROVIDE (__FIXUP_END__ = .);
    137167
     168  .jcr            : { KEEP (*(.jcr))    } > RAM
     169
    138170  PROVIDE (__GOT_START__ = .);
    139171  PROVIDE (_GOT_START_ = .);
     
    156188  {
    157189    PROVIDE (__sbss_start = .);
    158     *(.sbss)
    159     *(.scommon)
    160     *(.gnu.linkonce.sb.*)
     190    *(.dynsbss)
     191    *(.sbss .sbss.* .gnu.linkonce.sb.*)
    161192    PROVIDE (__sbss_end = .);
    162193  } >RAM
     
    167198   PROVIDE (__bss_start = .);
    168199   *(.dynbss)
    169    *(.bss)
     200   *(.bss .bss.* .gnu.linkonce.b.*)
    170201   *(COMMON)
    171202  } >RAM
    172203  . =  ALIGN(8) + 0x8000;
     204  __rtems_end = . ;
    173205  PROVIDE(__stack = .);
    174206  PROVIDE(_end = .);
  • c/src/lib/libbsp/powerpc/psim/tools/Makefile.am

    r30b4141 r270ce1ff  
    2323TMPINSTALL_FILES += $(PROJECT_ROOT)/@RTEMS_BSP@/tests/psim
    2424
     25$(PROJECT_ROOT)/@RTEMS_BSP@/tests/psim-gdb: psim $(PROJECT_ROOT)/@RTEMS_BSP@/tests/$(dirstamp)
     26        $(INSTALL_SCRIPT) $< $(PROJECT_ROOT)/@RTEMS_BSP@/tests/psim-gdb
     27TMPINSTALL_FILES += $(PROJECT_ROOT)/@RTEMS_BSP@/tests/psim-gdb
     28
    2529$(PROJECT_ROOT)/@RTEMS_BSP@/tests/runtest: runtest $(PROJECT_ROOT)/@RTEMS_BSP@/tests/$(dirstamp)
    2630        $(INSTALL_SCRIPT) $< $(PROJECT_ROOT)/@RTEMS_BSP@/tests/runtest
  • c/src/lib/libbsp/powerpc/psim/tools/psim

    r30b4141 r270ce1ff  
    3737echo "b __assert"                                     >> ${GDB_FILE}
    3838
    39 RUN=powerpc-rtems-run
    40 GDB=powerpc-rtems-gdb
     39RUN=powerpc-rtems4.7-run
     40GDB=powerpc-rtems4.7-gdb
    4141
    4242case $0 in
  • c/src/lib/libbsp/powerpc/psim/vectors/vectors.S

    r30b4141 r270ce1ff  
    1 /*  vectors.s   1.1 - 95/12/04
     1/*
     2 * (c) 1999, Eric Valette valette@crf.canon.fr
    23 *
    3  *  This file contains the assembly code for the PowerPC
    4  *  interrupt vectors for RTEMS.
    54 *
    6  *  COPYRIGHT (c) 1989-1999.
    7  *  On-Line Applications Research Corporation (OAR).
     5 *  This file contains the assembly code for the PowerPC
     6 *  exception veneers for RTEMS.
    87 *
    9  *  The license and distribution terms for this file may be
    10  *  found in found in the file LICENSE in this distribution or at
    11  *  http://www.rtems.com/license/LICENSE.
    12  *
    13  *  $Id$
     8 * vectors.S,v 1.3.4.1 2003/02/20 21:48:25 joel Exp
    149 */
     10       
    1511
     12
     13#include <rtems/asm.h>
     14#include <rtems/score/cpu.h>
     15#include <bsp/vectors.h>
     16       
     17
     18#define SYNC \
     19        sync; \
     20        isync
     21       
     22        PUBLIC_VAR (__rtems_start)
     23        .section .entry_point_section,"awx",@progbits
    1624/*
    17  *  The issue with this file is getting it loaded at the right place.
    18  *  The first vector MUST be at address 0x????0100.
    19  *  How this is achieved is dependant on the tool chain.
    20  *
    21  *  However the basic mechanism for ELF assemblers is to create a
    22  *  section called ".vectors", which will be loaded to an address
    23  *  between 0x????0000 and 0x????0100 (inclusive) via a link script.
    24  *
    25  *  The basic mechanism for XCOFF assemblers is to place it in the
    26  *  normal text section, and arrange for this file to be located
    27  *  at an appropriate position on the linker command line.
    28  *
    29  *  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
    30  *  offset from 0x????0000 to the first location in the file.  This
    31  *  will usually be 0x0000 or 0x0100.
     25 * Entry point information used by bootloader code
    3226 */
     27SYM (__rtems_start):           
     28        .long   __rtems_entry_point
    3329
    34 #include <bsp.h>
    35 #include <rtems/asm.h>
     30        /*
     31         * end of special Entry point section
     32         */     
     33        .text
     34        .p2align 5     
     35               
     36PUBLIC_VAR(default_exception_vector_code_prolog)
     37SYM (default_exception_vector_code_prolog):
     38        /*
     39         * let room for exception frame
     40         */
     41        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
     42        stw     r3, GPR3_OFFSET(r1)
     43        /* R2 should never change (EABI: pointer to .sdata2) - we
     44     * save it nevertheless..
     45         */
     46        stw     r2, GPR2_OFFSET(r1)
     47        mflr    r3
     48        stw     r3, EXC_LR_OFFSET(r1)
     49        bl      0f
     500:      /*
     51         * r3 = exception vector entry point
     52         * (256 * vector number) + few instructions
     53         */
     54        mflr    r3
     55        /*
     56         * r3 = r3 >> 8 = vector
     57         */
     58        srwi    r3,r3,8
     59        ba      push_normalized_frame
     60       
     61        PUBLIC_VAR (default_exception_vector_code_prolog_size)
     62       
     63        default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog
     64       
     65        .p2align 5
     66PUBLIC_VAR (push_normalized_frame)     
     67SYM (push_normalized_frame):
     68        stw     r3, EXCEPTION_NUMBER_OFFSET(r1)
     69        stw     r0, GPR0_OFFSET(r1)
     70        mfsrr0  r3
     71        stw     r3, SRR0_FRAME_OFFSET(r1)
     72        mfsrr1  r3
     73        stw     r3, SRR1_FRAME_OFFSET(r1)
     74        /*
     75         * Save general purpose registers
     76         * Already saved in prolog : R1, R2, R3, LR.
     77         * Saved a few line above  : R0
     78         *
     79         * Manual says that "stmw" instruction may be slower than
     80         * series of individual "stw" but who cares about performance
     81         * for the DEFAULT exception handler?
     82         */
     83        stmw    r4, GPR4_OFFSET(r1)     /* save R4->R31 */
    3684
    37 #ifndef PPC_VECTOR_FILE_BASE
    38 #error "PPC_VECTOR_FILE_BASE is not defined."
    39 #endif
     85        mfcr    r31
     86        stw     r31,  EXC_CR_OFFSET(r1)
     87        mfctr   r30
     88        stw     r30,  EXC_CTR_OFFSET(r1)
     89        mfxer   r28
     90        stw     r28,  EXC_XER_OFFSET(r1)
     91        mfmsr   r28
     92        stw     r28,  EXC_MSR_OFFSET(r1)
     93        mfdar   r28
     94        stw     r28,  EXC_DAR_OFFSET(r1)
     95        /*
     96         * compute SP at exception entry
     97         */
     98        addi    r3, r1, EXCEPTION_FRAME_END
     99        /*
     100         * store it at the right place
     101         */
     102        stw     r3, GPR1_OFFSET(r1)
     103        /*
     104         * Enable data and instruction address translation, exception nesting
     105         */
     106        mfmsr   r3
     107        ori     r3,r3, MSR_RI /* | MSR_IR | MSR_DR */
     108        mtmsr   r3
     109        SYNC
     110       
     111        /*
     112         * Call C exception handler
     113         */
     114        /*
     115         * store the execption frame address in r3 (first param)
     116         */
     117        addi    r3, r1, 0x8
     118        /*
     119         * globalExceptHdl(r3)
     120         */
     121        addis   r4, 0, globalExceptHdl@ha
     122        lwz     r5, globalExceptHdl@l(r4)
     123        mtlr    r5
     124        blrl
     125        /*
     126         * Restore registers status
     127         */
     128        lwz     r31,  EXC_CR_OFFSET(r1)
     129        mtcr    r31
     130        lwz     r30,  EXC_CTR_OFFSET(r1)
     131        mtctr   r30
     132        lwz     r29,  EXC_LR_OFFSET(r1)
     133        mtlr    r29
     134        lwz     r28,  EXC_XER_OFFSET(r1)
     135        mtxer   r28
    40136
    41         /* Where this file will be loaded */
    42         .set    file_base, PPC_VECTOR_FILE_BASE
     137        lmw     r4, GPR4_OFFSET(r1)
     138        lwz     r2, GPR2_OFFSET(r1)
     139        lwz     r0, GPR0_OFFSET(r1)
    43140
    44         /* Offset to store reg 0 */
    45 
    46         .set    IP_LINK, 0
    47 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
    48         .set    IP_0, (IP_LINK + 56)
    49 #else
    50         .set    IP_0, (IP_LINK + 8)
    51 #endif
    52         .set    IP_2, (IP_0 + 4)
    53 
    54         .set    IP_3, (IP_2 + 4)
    55         .set    IP_4, (IP_3 + 4)
    56         .set    IP_5, (IP_4 + 4)
    57         .set    IP_6, (IP_5 + 4)
    58 
    59         .set    IP_7, (IP_6 + 4)
    60         .set    IP_8, (IP_7 + 4)
    61         .set    IP_9, (IP_8 + 4)
    62         .set    IP_10, (IP_9 + 4)
    63 
    64         .set    IP_11, (IP_10 + 4)
    65         .set    IP_12, (IP_11 + 4)
    66         .set    IP_13, (IP_12 + 4)
    67         .set    IP_28, (IP_13 + 4)
    68 
    69         .set    IP_29, (IP_28 + 4)
    70         .set    IP_30, (IP_29 + 4)
    71         .set    IP_31, (IP_30 + 4)
    72         .set    IP_CR, (IP_31 + 4)
    73 
    74         .set    IP_CTR, (IP_CR + 4)
    75         .set    IP_XER, (IP_CTR + 4)
    76         .set    IP_LR, (IP_XER + 4)
    77         .set    IP_PC, (IP_LR + 4)
    78 
    79         .set    IP_MSR, (IP_PC + 4)
    80 
    81         .set    IP_END, (IP_MSR + 16)
    82 
    83         /* Vector offsets                        */
    84         .set    begin_vector,0xFFF00000
    85         .set    crit_vector,0xFFF00100
    86         .set    mach_vector,0xFFF00200
    87         .set    prot_vector,0xFFF00300
    88         .set    ext_vector,0xFFF00500
    89         .set    align_vector,0xFFF00600
    90         .set    prog_vector,0xFFF00700
    91         .set    dec_vector,0xFFF00900
    92         .set    sys_vector,0xFFF00C00
    93         .set    pit_vector,0xFFF01000
    94         .set    fit_vector,0xFFF01010
    95         .set    wadt_vector,0xFFF01020
    96         .set    debug_vector,0xFFF02000
    97 
    98 /* Go to the right section */
    99 #if PPC_ASM == PPC_ASM_ELF
    100         .section .vectors,"awx",@progbits
    101 #elif PPC_ASM == PPC_ASM_XCOFF
    102         .csect  .text[PR]
    103 #endif
    104 
    105         PUBLIC_VAR (__vectors)
    106 SYM (__vectors):
    107 
    108 /* Decrementer interrupt */
    109         .org    dec_vector - file_base
    110 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
    111 #if (PPC_HAS_FPU)
    112         stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
    113 #else
    114         stwu    r1, -(20*4 + IP_END)(r1)
    115 #endif
    116 #else
    117         stwu    r1, -(IP_END)(r1)
    118 #endif
    119         stw     r0, IP_0(r1)
    120 
    121         li      r0, PPC_IRQ_DECREMENTER
    122         b       PROC (_ISR_Handler)
     141        /*
     142         * Disable data and instruction translation. Make path non recoverable...
     143         */
     144        mfmsr   r3
     145        xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
     146        mtmsr   r3
     147        SYNC
     148        /*
     149         * Restore rfi related settings
     150         */
     151                 
     152        lwz     r3, SRR1_FRAME_OFFSET(r1)
     153        mtsrr1  r3
     154        lwz     r3, SRR0_FRAME_OFFSET(r1)
     155        mtsrr0  r3
     156       
     157        lwz     r3, GPR3_OFFSET(r1)
     158        addi    r1,r1, EXCEPTION_FRAME_END
     159        SYNC
     160        rfi
  • c/src/lib/libbsp/powerpc/psim/wrapup/Makefile.am

    r30b4141 r270ce1ff  
    88CLEANFILES = ../libbsp.a
    99___libbsp_a_SOURCES =
    10 ___libbsp_a_LIBADD = ../startup$(LIB_VARIANT).rel ../clock$(LIB_VARIANT).rel \
    11     ../console$(LIB_VARIANT).rel ../timer$(LIB_VARIANT).rel \
     10___libbsp_a_LIBADD = ../startup$(LIB_VARIANT).rel ../pclock$(LIB_VARIANT).rel \
     11    ../console$(LIB_VARIANT).rel ../irq$(LIB_VARIANT).rel \
    1212    ../vectors$(LIB_VARIANT).rel
     13___libbsp_a_LIBADD += \
     14    ../../../../libcpu/@RTEMS_CPU@/shared/cpuIdent$(LIB_VARIANT).rel \
     15    ../../../../libcpu/@RTEMS_CPU@/shared/stack$(LIB_VARIANT).rel \
     16    ../@exceptions@/rtems-cpu$(LIB_VARIANT).rel \
     17    ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/clock$(LIB_VARIANT).rel \
     18    ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/exceptions$(LIB_VARIANT).rel \
     19    ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/mmu$(LIB_VARIANT).rel \
     20    ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/timer$(LIB_VARIANT).rel
     21
    1322if HAS_MP
    1423___libbsp_a_LIBADD += ../shmsupp$(LIB_VARIANT).rel
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