Changeset 24b6d2f in rtems

Timestamp:

Oct 5, 2005, 2:34:17 AM (15 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Children:

fb573a71

Parents:

a3b4632

Message:

2005-09-12 Thomas Doerfler <Thomas.Doerfler@…>

PR 527/bsps
PR 822/bsps

• mpc8xx/clock/clock.c: Currently the MBX8xx BSP does not boot, because some logical errors are in the startup code. Additionally, the mpc8xx shared clock driver does not support the clocking scheme of some of the board variants, which are clocked from a 32768Hz (!) external crystal.

Location:

c/src/lib/libcpu/powerpc

Files:

• ChangeLog (modified) (1 diff)
• mpc8xx/clock/clock.c (modified) (1 diff)

c/src/lib/libcpu/powerpc/ChangeLog

@@ +1 @@
+2005-09-12      Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
+
+        PR 527/bsps
+        PR 822/bsps
+        * mpc8xx/clock/clock.c: Currently the MBX8xx BSP does not boot,
+        because some logical errors are in the startup code. Additionally,
+        the mpc8xx shared clock driver does not support the clocking scheme
+        of some of the board variants, which are clocked from a
+        32768Hz (!) external crystal.
+
 2005-08-12      Phil Torre <ptorre@zetron.com>
 

c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c

@@ -72 +72 @@
   unsigned desiredLevel;
   rtems_unsigned32 pit_value;
-  
-  pit_value = (rtems_configuration_get_microseconds_per_tick() *
-               rtems_cpu_configuration_get_clicks_per_usec()) - 1 ;
-  
-  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
+  rtems_unsigned32 mf_value;
+  rtems_unsigned32 extclk_value;
+  
+  if (rtems_cpu_configuration_get_clicks_per_usec() == 0) {
+    /*
+     * oscclk is too low for PIT, compute extclk and derive PIT from there
+     */
+    mf_value  = m8xx.plprcr >> 20;
+    pit_value = (_CPU_Table.clock_speed
+                 / (mf_value+1) 
+                 / 4
+                 * rtems_configuration_get_microseconds_per_tick()
+                 / 1000000);
+    m8xx.sccr |=  (1<<24);
+  }
+  else {
+    pit_value = (rtems_configuration_get_microseconds_per_tick() *
+                 rtems_cpu_configuration_get_clicks_per_usec());
+  
+    m8xx.sccr &= ~(1<<24);
+  }
+  if (pit_value > (0xffff+1)) {
+    /*
+     * try to activate prescaler
+     * NOTE: divider generates odd values now...
+     */
+    pit_value = pit_value / 128;
+    m8xx.sccr |= (1<<25);
+  }
+  if (pit_value > (0xffff+1)) {           /* pit is only 16 bits long */
     rtems_fatal_error_occurred(-1);
   }
-  m8xx.sccr &= ~(1<<24);
-  m8xx.pitc = pit_value;
+  m8xx.pitc = pit_value - 1;
 
   desiredLevel = BSP_get_clock_irq_level();