Changeset 24b6d2f in rtems
- Timestamp:
- 10/05/05 02:34:17 (17 years ago)
- Children:
- fb573a71
- Parents:
- a3b4632
- Location:
- c/src/lib/libcpu/powerpc
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/powerpc/ChangeLog
ra3b4632 r24b6d2f 1 2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de> 2 3 PR 527/bsps 4 PR 822/bsps 5 * mpc8xx/clock/clock.c: Currently the MBX8xx BSP does not boot, 6 because some logical errors are in the startup code. Additionally, 7 the mpc8xx shared clock driver does not support the clocking scheme 8 of some of the board variants, which are clocked from a 9 32768Hz (!) external crystal. 10 1 11 2005-08-12 Phil Torre <ptorre@zetron.com> 2 12 -
c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c
ra3b4632 r24b6d2f 72 72 unsigned desiredLevel; 73 73 rtems_unsigned32 pit_value; 74 75 pit_value = (rtems_configuration_get_microseconds_per_tick() * 76 rtems_cpu_configuration_get_clicks_per_usec()) - 1 ; 77 78 if (pit_value > 0xffff) { /* pit is only 16 bits long */ 74 rtems_unsigned32 mf_value; 75 rtems_unsigned32 extclk_value; 76 77 if (rtems_cpu_configuration_get_clicks_per_usec() == 0) { 78 /* 79 * oscclk is too low for PIT, compute extclk and derive PIT from there 80 */ 81 mf_value = m8xx.plprcr >> 20; 82 pit_value = (_CPU_Table.clock_speed 83 / (mf_value+1) 84 / 4 85 * rtems_configuration_get_microseconds_per_tick() 86 / 1000000); 87 m8xx.sccr |= (1<<24); 88 } 89 else { 90 pit_value = (rtems_configuration_get_microseconds_per_tick() * 91 rtems_cpu_configuration_get_clicks_per_usec()); 92 93 m8xx.sccr &= ~(1<<24); 94 } 95 if (pit_value > (0xffff+1)) { 96 /* 97 * try to activate prescaler 98 * NOTE: divider generates odd values now... 99 */ 100 pit_value = pit_value / 128; 101 m8xx.sccr |= (1<<25); 102 } 103 if (pit_value > (0xffff+1)) { /* pit is only 16 bits long */ 79 104 rtems_fatal_error_occurred(-1); 80 105 } 81 m8xx.sccr &= ~(1<<24); 82 m8xx.pitc = pit_value; 106 m8xx.pitc = pit_value - 1; 83 107 84 108 desiredLevel = BSP_get_clock_irq_level();
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