Changeset 23f1974 in rtems


Ignore:
Timestamp:
Sep 12, 2007, 3:23:30 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
f93630d
Parents:
80231685
Message:

2007-09-12 Joel Sherrill <joel.sherrill@…>

PR 1257/bsps

  • at91rm9200/irq/irq.c, lpc22xx/irq/irq.c, mc9328mxl/irq/irq.c, s3c2400/irq/irq.c: Code outside of cpukit should use the public API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the public API and directly accessing _CPU_ISR_Disable and _CPU_ISR_Enable, they were bypassing the compiler memory barrier directive which could lead to problems. This patch also changes the type of the variable passed into these routines and addresses minor style issues.
Location:
c/src/lib/libcpu/arm
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/ChangeLog

    r80231685 r23f1974  
     12007-09-12      Joel Sherrill <joel.sherrill@OARcorp.com>
     2
     3        PR 1257/bsps
     4        * at91rm9200/irq/irq.c, lpc22xx/irq/irq.c, mc9328mxl/irq/irq.c,
     5        s3c2400/irq/irq.c: Code outside of cpukit should use the public API
     6        for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing the
     7        public API and directly accessing _CPU_ISR_Disable and
     8        _CPU_ISR_Enable, they were bypassing the compiler memory barrier
     9        directive which could lead to problems. This patch also changes the
     10        type of the variable passed into these routines and addresses minor
     11        style issues.
     12
    1132007-05-01      Ray Xu <xr@trasin.net>
    214
  • c/src/lib/libcpu/arm/at91rm9200/irq/irq.c

    r80231685 r23f1974  
    5050    }
    5151   
    52     _CPU_ISR_Disable(level);
     52    rtems_interrupt_disable(level);
    5353   
    5454    /*
     
    6969    }
    7070   
    71     _CPU_ISR_Enable(level);
     71    rtems_interrupt_enable(level);
    7272   
    7373    return 1;
     
    9191      return 0;
    9292    }
    93     _CPU_ISR_Disable(level);
     93    rtems_interrupt_disable(level);
    9494
    9595    /*
     
    110110    AIC_SVR_REG(irq->name * 4) = (uint32_t) default_int_handler;
    111111   
    112     _CPU_ISR_Enable(level);
     112    rtems_interrupt_enable(level);
    113113
    114114    return 1;
  • c/src/lib/libcpu/arm/lpc22xx/irq/irq.c

    r80231685 r23f1974  
    3636{
    3737    rtems_interrupt_level level;
    38     rtems_irq_hdl *bsp_tbl;
    39     int *vic_cntl;
    40     static int     irq_counter=0;
     38    rtems_irq_hdl        *bsp_tbl;
     39    int                  *vic_cntl;
     40    static int            irq_counter = 0;
    4141   
    4242    bsp_tbl = (rtems_irq_hdl *)VICVectAddrBase;
     
    5656    }
    5757
    58     _CPU_ISR_Disable(level);
     58    rtems_interrupt_disable(level);
    5959
    6060    /*
     
    7777    irq_counter++;   
    7878
    79     _CPU_ISR_Enable(level);
     79    rtems_interrupt_enable(level);
    8080   
    8181    return 1;
     
    9191{
    9292    rtems_interrupt_level level;
    93     rtems_irq_hdl *bsp_tbl;
     93    rtems_irq_hdl        *bsp_tbl;
    9494
    9595    bsp_tbl = (rtems_irq_hdl *)&VICVectAddr0;
     
    105105    }
    106106
    107     _CPU_ISR_Disable(level);
     107    rtems_interrupt_disable(level);
    108108
    109109    VICIntEnClr = 1 << irq->name;
     
    120120    bsp_tbl[irq->name] = default_int_handler;
    121121   
    122 
    123     _CPU_ISR_Enable(level);
     122    rtems_interrupt_enable(level);
    124123
    125124    return 1;
  • c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c

    r80231685 r23f1974  
    5151    }
    5252
    53     _CPU_ISR_Disable(level);
     53    rtems_interrupt_disable(level);
    5454
    5555    /*
     
    6767    }
    6868   
    69     _CPU_ISR_Enable(level);
     69    rtems_interrupt_enable(level);
    7070   
    7171    return 1;
     
    9292    }
    9393
    94     _CPU_ISR_Disable(level);
     94    rtems_interrupt_disable(level);
    9595
    9696
     
    107107    bsp_vector_table[irq->name].data = NULL;
    108108
    109     _CPU_ISR_Enable(level);
     109    rtems_interrupt_enable(level);
    110110
    111111    return 1;
  • c/src/lib/libcpu/arm/s3c2400/irq/irq.c

    r80231685 r23f1974  
    4040int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    4141{
    42     rtems_irq_hdl *HdlTable;
    43     rtems_interrupt_level level;
     42    rtems_irq_hdl         *HdlTable;
     43    rtems_interrupt_level  level;
    4444   
    4545    if (!isValidInterrupt(irq->name)) {
     
    5555    }
    5656   
    57     _CPU_ISR_Disable(level);
     57    rtems_interrupt_disable(level);
    5858
    5959    /*
     
    7070    }
    7171
    72     _CPU_ISR_Enable(level);
     72    rtems_interrupt_enable(level);
    7373
    7474    return 1;
     
    7777int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
    7878{
    79     rtems_irq_hdl *HdlTable;
    80     rtems_interrupt_level level;
     79    rtems_irq_hdl         *HdlTable;
     80    rtems_interrupt_level  level;
    8181 
    8282    if (!isValidInterrupt(irq->name)) {
     
    9191        return 0;
    9292    }
    93     _CPU_ISR_Disable(level);
     93    rtems_interrupt_disable(level);
    9494
    9595    /*
     
    105105    *(HdlTable + irq->name) = default_int_handler;
    106106         
    107     _CPU_ISR_Enable(level);
     107    rtems_interrupt_enable(level);
    108108
    109109    return 1;
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