Changeset 23213135 in rtems


Ignore:
Timestamp:
May 31, 2016, 7:36:52 AM (3 years ago)
Author:
Chris Johns <chrisj@…>
Branches:
master
Children:
560db810
Parents:
c6556e2
git-author:
Chris Johns <chrisj@…> (05/31/16 07:36:52)
git-committer:
Chris Johns <chrisj@…> (06/03/16 07:28:58)
Message:

arm: Fix printk warnings.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/arm/arm-exception-frame-print.c

    rc6556e2 r23213135  
    1717#endif
    1818
     19#include <inttypes.h>
     20
    1921#include <rtems/score/cpu.h>
    2022#include <rtems/bspIo.h>
     
    2830
    2931    printk(
    30       "FPEXC = 0x%08x\nFPSCR = 0x%08x\n",
     32      "FPEXC = 0x%08" PRIx32 "\nFPSCR = 0x%08" PRIx32 "\n",
    3133      vfp_context->register_fpexc,
    3234      vfp_context->register_fpscr
     
    3739      uint32_t high = (uint32_t) (dx[i] >> 32);
    3840
    39       printk( "D%02i = 0x%08x%08x\n", i, high, low );
     41      printk( "D%02i = 0x%08" PRIx32 "%08" PRIx32 "\n", i, high, low );
    4042    }
    4143  }
     
    4749  printk(
    4850    "\n"
    49     "R0   = 0x%08x R8  = 0x%08x\n"
    50     "R1   = 0x%08x R9  = 0x%08x\n"
    51     "R2   = 0x%08x R10 = 0x%08x\n"
    52     "R3   = 0x%08x R11 = 0x%08x\n"
    53     "R4   = 0x%08x R12 = 0x%08x\n"
    54     "R5   = 0x%08x SP  = 0x%08x\n"
    55     "R6   = 0x%08x LR  = 0x%08x\n"
    56     "R7   = 0x%08x PC  = 0x%08x\n"
     51    "R0   = 0x%08" PRIx32 " R8  = 0x%08" PRIx32 "\n"
     52    "R1   = 0x%08" PRIx32 " R9  = 0x%08" PRIx32 "\n"
     53    "R2   = 0x%08" PRIx32 " R10 = 0x%08" PRIx32 "\n"
     54    "R3   = 0x%08" PRIx32 " R11 = 0x%08" PRIx32 "\n"
     55    "R4   = 0x%08" PRIx32 " R12 = 0x%08" PRIx32 "\n"
     56    "R5   = 0x%08" PRIx32 " SP  = 0x%08" PRIx32 "\n"
     57    "R6   = 0x%08" PRIx32 " LR  = 0x%08" PRIxPTR "\n"
     58    "R7   = 0x%08" PRIx32 " PC  = 0x%08" PRIxPTR "\n"
    5759#if defined(ARM_MULTILIB_ARCH_V4)
    58     "CPSR = 0x%08x "
     60    "CPSR = 0x%08" PRIx32 " "
    5961#elif defined(ARM_MULTILIB_ARCH_V7M)
    60     "XPSR = 0x%08x "
     62    "XPSR = 0x%08" PRIx32 " "
    6163#endif
    62     "VEC = 0x%08x\n",
     64    "VEC = 0x%08" PRIxPTR "\n",
    6365    frame->register_r0,
    6466    frame->register_r8,
     
    7476    frame->register_sp,
    7577    frame->register_r6,
    76     frame->register_lr,
     78    (intptr_t) frame->register_lr,
    7779    frame->register_r7,
    78     frame->register_pc,
     80    (intptr_t) frame->register_pc,
    7981#if defined(ARM_MULTILIB_ARCH_V4)
    8082    frame->register_cpsr,
     
    8284    frame->register_xpsr,
    8385#endif
    84     frame->vector
     86    (intptr_t) frame->vector
    8587  );
    8688
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