Changeset 22f107b6 in rtems


Ignore:
Timestamp:
Apr 9, 2010, 12:25:22 PM (9 years ago)
Author:
Thomas Doerfler <Thomas.Doerfler@…>
Branches:
4.10, 4.11, master
Children:
bdac0eed
Parents:
7a6f8d0
Message:

Changes throughout

Location:
c/src/lib/libbsp/arm
Files:
1 added
23 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/lpc24xx/ChangeLog

    r7a6f8d0 r22f107b6  
     12010-04-09      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * Makefile.am, configure.ac, include/lpc24xx.h, irq/irq.c,
     4        make/custom/lpc24xx.inc, misc/io.c, startup/bspstart.c,
     5        startup/bspstarthooks.c, startup/linkcmds.lpc2362: Changes throughout.
     6
    172010-03-29      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
    28
  • c/src/lib/libbsp/arm/lpc24xx/Makefile.am

    r7a6f8d0 r22f107b6  
    8787        ../../shared/bsppost.c \
    8888        ../../shared/bsppredriverhook.c \
    89         ../../shared/bsppretaskinghook.c \
    9089        ../../shared/gnatinstallhandler.c \
    9190        ../../shared/sbrk.c \
     
    136135libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
    137136
    138 # Start hooks (FIXME: This is brittle.)
     137# Start hooks
    139138libbsp_a_SOURCES += startup/bspstarthooks.c
    140 libbsp_a-bspstarthooks.o: startup/bspstarthooks.c
    141         $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libbsp_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS:-mthumb=) \
    142         -MT libbsp_a-bspstarthooks.o -MD -MP -MF $(DEPDIR)/libbsp_a-bspstarthooks.Tpo -c -o libbsp_a-bspstarthooks.o \
    143         `test -f 'startup/bspstarthooks.c' || echo '$(srcdir)/'`startup/bspstarthooks.c
    144         $(am__mv) $(DEPDIR)/libbsp_a-bspstarthooks.Tpo $(DEPDIR)/libbsp_a-bspstarthooks.Po
    145139
    146140###############################################################################
  • c/src/lib/libbsp/arm/lpc24xx/configure.ac

    r7a6f8d0 r22f107b6  
    77
    88AC_PREREQ(2.59)
    9 AC_INIT([rtems-c-src-lib-libbsp-arm-lpc247x],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
     9AC_INIT([rtems-c-src-lib-libbsp-arm-lpc24xx],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
    1010AC_CONFIG_SRCDIR([bsp_specs])
    1111RTEMS_TOP(../../../../../..)
     
    2222AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
    2323
    24 RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[lpc2362],[TRUE])
     24RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[lpc2362],[1])
    2525RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[*],[])
    26 RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[set to true fo low memory footprint])
     26RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[disable testsuite samples with high memory demands])
    2727
     28RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[lpc2362],[3686400U])
    2829RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U])
    2930RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
     
    3233RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
    3334
     35RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc2362],[58982400U])
    3436RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
    3537RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
     
    3840RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
    3941
     42RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc24xx_ea],[1])
    4043RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[*],[])
    4144RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
     
    6063RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
    6164
     65RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc2362],[0])
    6266RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0])
    6367RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
    6468
     69RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc2362],[0])
    6570RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc24xx_ncs_*],[0])
    6671RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3])
     
    7580RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2])
    7681
     82RTEMS_BSPOPTS_SET([LPC24XX_HEAP_EXTEND],[lpc2362],[1])
     83RTEMS_BSPOPTS_HELP([LPC24XX_HEAP_EXTEND],[enable heap extend by Ethernet and USB regions])
     84
     85RTEMS_BSPOPTS_SET([LPC24XX_STOP_GPDMA],[*],[1])
     86RTEMS_BSPOPTS_HELP([LPC24XX_STOP_GPDMA],[stop general purpose DMA at start-up to avoid DMA interference])
     87
     88RTEMS_BSPOPTS_SET([LPC24XX_STOP_ETHERNET],[lpc2362],[])
     89RTEMS_BSPOPTS_SET([LPC24XX_STOP_ETHERNET],[*],[1])
     90RTEMS_BSPOPTS_HELP([LPC24XX_STOP_ETHERNET],[stop Ethernet controller at start-up to avoid DMA interference])
     91
     92RTEMS_BSPOPTS_SET([LPC24XX_STOP_USB],[lpc2362],[])
     93RTEMS_BSPOPTS_SET([LPC24XX_STOP_USB],[*],[1])
     94RTEMS_BSPOPTS_HELP([LPC24XX_STOP_USB],[stop USB controller at start-up to avoid DMA interference])
     95
    7796RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[lpc24xx_ncs_rom_ext],[0x80000040])
    7897RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
  • c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h

    r7a6f8d0 r22f107b6  
    19711971#define LPC24XX_FIO ((volatile lpc24xx_fio *) FIO_BASE_ADDR)
    19721972
     1973/* PCONP */
     1974
     1975#define PCONP_GPDMA (1U << 29)
     1976#define PCONP_ETHERNET (1U << 30)
     1977#define PCONP_USB (1U << 31)
     1978
    19731979/** @} */
    19741980
  • c/src/lib/libbsp/arm/lpc24xx/irq/irq.c

    r7a6f8d0 r22f107b6  
    111111  VICSWPrioMask = 0xffff;
    112112
    113   /* Acknowledge interrupt */
    114   VICVectAddr = 0;
     113  /* Acknowledge interrupts for all priorities */
     114  for (i = LPC24XX_IRQ_PRIORITY_VALUE_MIN; i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX; ++i) {
     115    VICVectAddr = 0;
     116  }
    115117
    116118  /* Install the IRQ exception handler */
  • c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc24xx.inc

    r7a6f8d0 r22f107b6  
    99RTEMS_CPU = arm
    1010
    11 CPU_CFLAGS = -mcpu=arm7tdmi-s -mstructure-size-boundary=8 -mthumb
     11CPU_CFLAGS = -mcpu=arm7tdmi-s -mthumb -mstructure-size-boundary=8 \
     12        -Wextra -Wno-unused -Wpointer-arith -Wcast-qual -Wconversion -Wmissing-prototypes
    1213
    1314CFLAGS_OPTIMIZE_V = -Os -g
  • c/src/lib/libbsp/arm/lpc24xx/misc/io.c

    r7a6f8d0 r22f107b6  
    7878  /* ADC */
    7979  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 0, 0, 12, 0, 13, LPC24XX_IO_ALTERNATE_2),
     80  LPC24XX_IO_ENTRY(LPC24XX_MODULE_ADC, 1, 0, 23, 0, 25, LPC24XX_IO_ALTERNATE_0),
    8081
    8182  /* I2C */
     
    104105  LPC24XX_IO_ENTRY(LPC24XX_MODULE_USB, 0, 1, 19, 1, 19, LPC24XX_IO_ALTERNATE_1),
    105106
     107  /* SPI */
     108  LPC24XX_IO_ENTRY(LPC24XX_MODULE_SPI, 0, 0, 15, 0, 18, LPC24XX_IO_ALTERNATE_2),
     109
     110  /* PWM */
     111  LPC24XX_IO_ENTRY(LPC24XX_MODULE_PWM_1, 0, 2, 0, 2, 0, LPC24XX_IO_ALTERNATE_0),
     112
    106113  /* Terminate */
    107   LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0),
     114  LPC24XX_IO_ENTRY(LPC24XX_MODULE_COUNT, 0, 0, 0, 0, 0, 0)
    108115};
    109116
  • c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c

    r7a6f8d0 r22f107b6  
    3030#include <bsp/stackalloc.h>
    3131#include <bsp/system-clocks.h>
     32
     33#ifdef LPC24XX_HEAP_EXTEND
     34  LINKER_SYMBOL(lpc24xx_region_heap_0_begin);
     35  LINKER_SYMBOL(lpc24xx_region_heap_0_size);
     36  LINKER_SYMBOL(lpc24xx_region_heap_0_end);
     37
     38  LINKER_SYMBOL(lpc24xx_region_heap_1_begin);
     39  LINKER_SYMBOL(lpc24xx_region_heap_1_size);
     40  LINKER_SYMBOL(lpc24xx_region_heap_1_end);
     41
     42  extern Heap_Control *RTEMS_Malloc_Heap;
     43#endif
     44
     45void bsp_pretasking_hook(void)
     46{
     47  #ifdef LPC24XX_HEAP_EXTEND
     48    _Heap_Extend(
     49      RTEMS_Malloc_Heap,
     50      lpc24xx_region_heap_0_begin,
     51      (uintptr_t) lpc24xx_region_heap_0_size,
     52      NULL
     53    );
     54    _Heap_Extend(
     55      RTEMS_Malloc_Heap,
     56      lpc24xx_region_heap_1_begin,
     57      (uintptr_t) lpc24xx_region_heap_1_size,
     58      NULL
     59    );
     60  #endif
     61}
    3262
    3363void bsp_start(void)
  • c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c

    r7a6f8d0 r22f107b6  
    2828
    2929#define BSP_START_SECTION __attribute__((section(".bsp_start")))
     30
     31#if defined(LPC24XX_EMC_MICRON) || defined(LPC24XX_EMC_NUMONYX)
     32  #define LPC24XX_EMC_INIT
     33#endif
    3034
    3135#ifdef LPC24XX_EMC_MICRON
     
    115119  #endif
    116120
    117   /* Set pin functions for EMC */
    118   PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555;
    119   PINSEL6 = 0x55555555;
    120   PINSEL8 = 0x55555555;
    121   PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555;
     121  #ifdef LPC24XX_EMC_INIT
     122    /* Set pin functions for EMC */
     123    PINSEL5 = (PINSEL5 & 0xf000f000) | 0x05550555;
     124    PINSEL6 = 0x55555555;
     125    PINSEL8 = 0x55555555;
     126    PINSEL9 = (PINSEL9 & 0x0f000000) | 0x50555555;
     127  #endif
    122128
    123129  #ifdef LPC24XX_EMC_NUMONYX
    124130    /* Static Memory 1 settings */
    125     bsp_start_memcpy_arm(
     131    bsp_start_memcpy(
    126132      (int *) EMC_STA_BASE_1,
    127133      (const int *) &numonyx,
     
    136142static void BSP_START_SECTION lpc24xx_init_emc_1(void)
    137143{
    138   /* Use normal memory map */
    139   EMC_CTRL = CLEAR_FLAG(EMC_CTRL, 0x2);
     144  #ifdef LPC24XX_EMC_INIT
     145    /* Use normal memory map */
     146    EMC_CTRL = CLEAR_FLAG(EMC_CTRL, 0x2);
     147  #endif
    140148
    141149  #ifdef LPC24XX_EMC_MICRON
     
    327335
    328336  /* Set PLL */
    329   lpc24xx_set_pll(1, 0, 11, 3);
     337  #if LPC24XX_OSCILLATOR_MAIN == 12000000U
     338    lpc24xx_set_pll(1, 0, 11, 3);
     339  #elif LPC24XX_OSCILLATOR_MAIN == 3686400U
     340    lpc24xx_set_pll(1, 0, 47, 5);
     341  #else
     342    #error "unexpected main oscillator frequency"
     343  #endif
    330344}
    331345
     
    356370  MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2);
    357371
    358   /* Set memory accelerator module (MAM) */
     372  /* Fully enable memory accelerator module functions (MAM) */
    359373  MAMCR = 0;
    360   MAMTIM = 4;
     374  #if LPC24XX_CCLK <= 20000000U
     375    MAMTIM = 0x1;
     376  #elif LPC24XX_CCLK <= 40000000U
     377    MAMTIM = 0x2;
     378  #elif LPC24XX_CCLK <= 60000000U
     379    MAMTIM = 0x3;
     380  #else
     381    MAMTIM = 0x4;
     382  #endif
     383  MAMCR = 0x2;
    361384
    362385  /* Enable fast IO for ports 0 and 1 */
     
    378401  lpc24xx_init_emc_1();
    379402
     403  #ifdef LPC24XX_STOP_GPDMA
     404    if ((PCONP & PCONP_GPDMA) != 0) {
     405      GPDMA_CONFIG = 0;
     406      PCONP &= ~PCONP_GPDMA;
     407    }
     408  #endif
     409
     410  #ifdef LPC24XX_STOP_ETHERNET
     411    if ((PCONP & PCONP_ETHERNET) != 0) {
     412      MAC_COMMAND = 0x38;
     413      MAC_MAC1 = 0xcf00;
     414      MAC_MAC1 = 0;
     415      PCONP &= ~PCONP_ETHERNET;
     416    }
     417  #endif
     418
     419  #ifdef LPC24XX_STOP_USB
     420    if ((PCONP & PCONP_USB) != 0) {
     421      OTG_CLK_CTRL = 0;
     422      PCONP &= ~PCONP_USB;
     423    }
     424  #endif
     425
    380426  /* Copy .text section */
    381   bsp_start_memcpy_arm(
     427  bsp_start_memcpy(
    382428    (int *) bsp_section_text_begin,
    383429    (const int *) bsp_section_text_load_begin,
     
    386432
    387433  /* Copy .rodata section */
    388   bsp_start_memcpy_arm(
     434  bsp_start_memcpy(
    389435    (int *) bsp_section_rodata_begin,
    390436    (const int *) bsp_section_rodata_load_begin,
     
    393439
    394440  /* Copy .data section */
    395   bsp_start_memcpy_arm(
     441  bsp_start_memcpy(
    396442    (int *) bsp_section_data_begin,
    397443    (const int *) bsp_section_data_load_begin,
     
    400446
    401447  /* Copy .fast section */
    402   bsp_start_memcpy_arm(
     448  bsp_start_memcpy(
    403449    (int *) bsp_section_fast_begin,
    404450    (const int *) bsp_section_fast_load_begin,
  • c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2362

    r7a6f8d0 r22f107b6  
    4949REGION_ALIAS ("REGION_RODATA", ROM_INT);
    5050REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
    51 REGION_ALIAS ("REGION_DATA", RAM_ETH);
     51REGION_ALIAS ("REGION_DATA", RAM_INT);
    5252REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
    5353REGION_ALIAS ("REGION_FAST", RAM_INT);
    5454REGION_ALIAS ("REGION_FAST_LOAD", ROM_INT);
    55 REGION_ALIAS ("REGION_BSS", RAM_ETH);
     55REGION_ALIAS ("REGION_BSS", RAM_INT);
    5656REGION_ALIAS ("REGION_WORK", RAM_INT);
    5757REGION_ALIAS ("REGION_STACK", RAM_INT);
    5858
     59lpc24xx_region_heap_0_begin = ORIGIN (RAM_ETH);
     60lpc24xx_region_heap_0_size = LENGTH (RAM_ETH);
     61lpc24xx_region_heap_0_end = lpc24xx_region_heap_0_begin + lpc24xx_region_heap_0_size;
     62
     63lpc24xx_region_heap_1_begin = ORIGIN (RAM_USB);
     64lpc24xx_region_heap_1_size = LENGTH (RAM_USB);
     65lpc24xx_region_heap_1_end = lpc24xx_region_heap_1_begin + lpc24xx_region_heap_1_size;
     66
    5967INCLUDE linkcmds.base
  • c/src/lib/libbsp/arm/lpc32xx/ChangeLog

    r7a6f8d0 r22f107b6  
     12010-04-09      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * console/hsu.c: New file.
     4        * Makefile.am, configure.ac, preinstall.am, console/console-config.c,
     5        include/bsp.h, include/bspopts.h.in, include/lpc-clock-config.h,
     6        include/lpc-ethernet-config.h, include/lpc32xx.h, include/mmu.h,
     7        startup/bspstart.c, startup/bspstarthooks.c: Changes throughout.
     8
    192010-03-03      Sebastian Huber <sebastian.huber@embedded-brains.de>
    210
  • c/src/lib/libbsp/arm/lpc32xx/Makefile.am

    r7a6f8d0 r22f107b6  
    3838include_bsp_HEADERS += ../shared/include/start.h
    3939include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
     40include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
    4041include_bsp_HEADERS += include/irq-config.h
    4142include_bsp_HEADERS += include/irq.h
     
    100101# Console
    101102libbsp_a_SOURCES += ../../shared/console.c \
    102         console/console-config.c
     103        console/console-config.c \
     104        console/hsu.c
    103105
    104106# Clock
     
    122124libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
    123125
    124 # Start hooks (FIXME: This is brittle.)
     126# Start hooks
    125127libbsp_a_SOURCES += startup/bspstarthooks.c
    126 libbsp_a-bspstarthooks.o: startup/bspstarthooks.c
    127         $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libbsp_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS:-mthumb=) \
    128         -MT libbsp_a-bspstarthooks.o -MD -MP -MF $(DEPDIR)/libbsp_a-bspstarthooks.Tpo -c -o libbsp_a-bspstarthooks.o \
    129         `test -f 'startup/bspstarthooks.c' || echo '$(srcdir)/'`startup/bspstarthooks.c
    130         $(am__mv) $(DEPDIR)/libbsp_a-bspstarthooks.Tpo $(DEPDIR)/libbsp_a-bspstarthooks.Po
    131128
    132129###############################################################################
  • c/src/lib/libbsp/arm/lpc32xx/configure.ac

    r7a6f8d0 r22f107b6  
    3434RTEMS_BSPOPTS_HELP([LPC32XX_HCLK],[AHB bus clock in Hz])
    3535
     36RTEMS_BSPOPTS_SET([LPC32XX_PERIPH_CLK],[*],[13000000U])
     37RTEMS_BSPOPTS_HELP([LPC32XX_PERIPH_CLK],[peripheral clock in Hz])
     38
    3639RTEMS_BSPOPTS_SET([LPC32XX_ETHERNET_RMII],[*],[1])
    3740RTEMS_BSPOPTS_HELP([LPC32XX_ETHERNET_RMII],[enable RMII for Ethernet])
    3841
    39 RTEMS_BSPOPTS_SET([LPC32XX_PERIPH_CLK],[*],[13000000U])
    40 RTEMS_BSPOPTS_HELP([LPC32XX_PERIPH_CLK],[peripheral clock in Hz])
     42RTEMS_BSPOPTS_SET([LPC32XX_UART_1_BAUD],[*],[])
     43RTEMS_BSPOPTS_HELP([LPC32XX_UART_1_BAUD],[baud for UART 1])
     44
     45RTEMS_BSPOPTS_SET([LPC32XX_UART_2_BAUD],[*],[])
     46RTEMS_BSPOPTS_HELP([LPC32XX_UART_2_BAUD],[baud for UART 2])
     47
     48RTEMS_BSPOPTS_SET([LPC32XX_UART_7_BAUD],[*],[])
     49RTEMS_BSPOPTS_HELP([LPC32XX_UART_7_BAUD],[baud for UART 7])
    4150
    4251RTEMS_BSPOPTS_SET([LPC32XX_CONFIG_U3CLK],[*],[])
     
    5564RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_UART_CLKMODE],[clock mode configuration for UARTs])
    5665
     66RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[*],[])
     67RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections])
     68
     69RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[*],[])
     70RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections])
     71
    5772RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
    5873RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
  • c/src/lib/libbsp/arm/lpc32xx/console/console-config.c

    r7a6f8d0 r22f107b6  
    2727#include <bsp/irq.h>
    2828
     29extern console_fns lpc32xx_hsu_fns;
     30
    2931static uint8_t lpc32xx_uart_get_register(uint32_t addr, uint8_t i)
    3032{
     
    130132    },
    131133  #endif
     134  #ifdef LPC32XX_UART_1_BAUD
     135    {
     136      .sDeviceName = "/dev/ttyS1",
     137      .deviceType = SERIAL_CUSTOM,
     138      .pDeviceFns = &lpc32xx_hsu_fns,
     139      .deviceProbe = NULL,
     140      .pDeviceFlow = NULL,
     141      .ulMargin = 16,
     142      .ulHysteresis = 8,
     143      .pDeviceParams = (void *) LPC32XX_UART_1_BAUD,
     144      .ulCtrlPort1 = LPC32XX_BASE_UART_1,
     145      .ulCtrlPort2 = 0,
     146      .ulDataPort = 0,
     147      .getRegister = NULL,
     148      .setRegister = NULL,
     149      .getData = NULL,
     150      .setData = NULL,
     151      .ulClock = 16,
     152      .ulIntVector = LPC32XX_IRQ_UART_1
     153    },
     154  #endif
     155  #ifdef LPC32XX_UART_2_BAUD
     156    {
     157      .sDeviceName = "/dev/ttyS2",
     158      .deviceType = SERIAL_CUSTOM,
     159      .pDeviceFns = &lpc32xx_hsu_fns,
     160      .deviceProbe = NULL,
     161      .pDeviceFlow = NULL,
     162      .ulMargin = 16,
     163      .ulHysteresis = 8,
     164      .pDeviceParams = (void *) LPC32XX_UART_2_BAUD,
     165      .ulCtrlPort1 = LPC32XX_BASE_UART_2,
     166      .ulCtrlPort2 = 0,
     167      .ulDataPort = 0,
     168      .getRegister = NULL,
     169      .setRegister = NULL,
     170      .getData = NULL,
     171      .setData = NULL,
     172      .ulClock = 16,
     173      .ulIntVector = LPC32XX_IRQ_UART_2
     174    },
     175  #endif
     176  #ifdef LPC32XX_UART_7_BAUD
     177    {
     178      .sDeviceName = "/dev/ttyS7",
     179      .deviceType = SERIAL_CUSTOM,
     180      .pDeviceFns = &lpc32xx_hsu_fns,
     181      .deviceProbe = NULL,
     182      .pDeviceFlow = NULL,
     183      .ulMargin = 16,
     184      .ulHysteresis = 8,
     185      .pDeviceParams = (void *) LPC32XX_UART_7_BAUD,
     186      .ulCtrlPort1 = LPC32XX_BASE_UART_7,
     187      .ulCtrlPort2 = 0,
     188      .ulDataPort = 0,
     189      .getRegister = NULL,
     190      .setRegister = NULL,
     191      .getData = NULL,
     192      .setData = NULL,
     193      .ulClock = 16,
     194      .ulIntVector = LPC32XX_IRQ_UART_7
     195    },
     196  #endif
    132197};
    133198
  • c/src/lib/libbsp/arm/lpc32xx/include/bsp.h

    r7a6f8d0 r22f107b6  
    2828#include <rtems/console.h>
    2929#include <rtems/clockdrv.h>
     30
     31#include <bsp/lpc32xx.h>
     32#include <bsp/lpc-timer.h>
    3033
    3134#ifdef __cplusplus
     
    8992void *lpc32xx_idle(uintptr_t ignored);
    9093
     94#define LPC32XX_STANDARD_TIMER ((volatile lpc_timer *) LPC32XX_BASE_TIMER_1)
     95
     96static inline unsigned lpc32xx_timer(void)
     97{
     98  volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
     99
     100  return timer->tc;
     101}
     102
    91103/** @} */
     104
     105/**
     106 * @defgroup lpc LPC Support
     107 *
     108 * @ingroup lpc32xx
     109 *
     110 * @brief LPC support package.
     111 */
    92112
    93113#endif /* ASM */
  • c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in

    r7a6f8d0 r22f107b6  
    3434#undef LPC32XX_CONFIG_UART_CLKMODE
    3535
     36/* disable MMU protection of read-only sections */
     37#undef LPC32XX_DISABLE_READ_ONLY_PROTECTION
     38
     39/* disable cache for read-write data sections */
     40#undef LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
     41
    3642/* enable RMII for Ethernet */
    3743#undef LPC32XX_ETHERNET_RMII
     
    4854/* peripheral clock in Hz */
    4955#undef LPC32XX_PERIPH_CLK
     56
     57/* baud for UART 1 */
     58#undef LPC32XX_UART_1_BAUD
     59
     60/* baud for UART 2 */
     61#undef LPC32XX_UART_2_BAUD
     62
     63/* baud for UART 7 */
     64#undef LPC32XX_UART_7_BAUD
    5065
    5166/* Define to the address where bug reports for this package should be sent. */
  • c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h

    r7a6f8d0 r22f107b6  
    22 * @file
    33 *
    4  * @ingroup lpc32xx
     4 * @ingroup lpc_clock
    55 *
    66 * @brief Clock driver configuration.
     
    3131#endif /* __cplusplus */
    3232
     33/**
     34 * @defgroup lpc_clock Clock Support
     35 *
     36 * @ingroup lpc
     37 *
     38 * @brief Clock support.
     39 *
     40 * @{
     41 */
     42
    3343#define LPC_CLOCK_INTERRUPT LPC32XX_IRQ_TIMER_0
    3444
     
    3949#define LPC_CLOCK_MODULE_ENABLE()
    4050
     51/** @} */
     52
    4153#ifdef __cplusplus
    4254}
  • c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h

    r7a6f8d0 r22f107b6  
    22 * @file
    33 *
    4  * @ingroup lpc32xx
     4 * @ingroup lpc_eth
    55 *
    66 * @brief Ethernet driver configuration.
     
    3535extern "C" {
    3636#endif /* __cplusplus */
     37
     38/**
     39 * @defgroup lpc_eth Ethernet Support
     40 *
     41 * @ingroup lpc
     42 *
     43 * @brief Ethernet support.
     44 *
     45 * @{
     46 */
    3747
    3848#define LPC_ETH_CONFIG_INTERRUPT LPC32XX_IRQ_ETHERNET
     
    7585}
    7686
     87/** @} */
     88
    7789#ifdef __cplusplus
    7890}
  • c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h

    r7a6f8d0 r22f107b6  
    22 * @file
    33 *
    4  * @ingroup lpc32xx
     4 * @ingroup lpc32xx_reg
    55 *
    66 * @brief Register base addresses.
     
    2222#ifndef LIBBSP_ARM_LPC32XX_LPC32XX_H
    2323#define LIBBSP_ARM_LPC32XX_LPC32XX_H
     24
     25/**
     26 * @defgroup lpc32xx_reg Register Definitions
     27 *
     28 * @ingroup lpc32xx
     29 *
     30 * @brief Register definitions.
     31 *
     32 * @{
     33 */
     34
     35/**
     36 * @name Register Base Addresses
     37 *
     38 * @{
     39 */
    2440
    2541#define LPC32XX_BASE_ADC 0x40048000
     
    8298#define LPC32XX_BASE_WDT 0x4003c000
    8399
     100/** @} */
     101
     102/**
     103 * @name Miscanellanous Registers
     104 *
     105 * @{
     106 */
     107
    84108#define LPC32XX_U3CLK (*(volatile uint32_t *) 0x400040d0)
    85109#define LPC32XX_U4CLK (*(volatile uint32_t *) 0x400040d4)
     
    92116#define LPC32XX_SW_INT (*(volatile uint32_t *) 0x400040a8)
    93117#define LPC32XX_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090)
    94 #define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
    95118#define LPC32XX_USB_DIV (*(volatile uint32_t *) 0x4000401c)
    96119#define LPC32XX_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4)
     
    103126#define LPC32XX_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c)
    104127#define LPC32XX_I2C_CLKLO (*(volatile uint32_t *) 0x31020310)
     128#define LPC32XX_PWR_CTRL (*(volatile uint32_t *) 0x40004044)
     129#define LPC32XX_OSC_CTRL (*(volatile uint32_t *) 0x4000404c)
     130#define LPC32XX_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050)
     131#define LPC32XX_PLL397_CTRL (*(volatile uint32_t *) 0x40004048)
     132#define LPC32XX_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058)
     133#define LPC32XX_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040)
     134#define LPC32XX_TEST_CLK (*(volatile uint32_t *) 0x400040a4)
     135#define LPC32XX_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec)
     136#define LPC32XX_START_ER_PIN (*(volatile uint32_t *) 0x40004030)
     137#define LPC32XX_START_ER_INT (*(volatile uint32_t *) 0x40004020)
     138#define LPC32XX_P0_INTR_ER (*(volatile uint32_t *) 0x40004018)
     139#define LPC32XX_START_SR_PIN (*(volatile uint32_t *) 0x40004038)
     140#define LPC32XX_START_SR_INT (*(volatile uint32_t *) 0x40004028)
     141#define LPC32XX_START_RSR_PIN (*(volatile uint32_t *) 0x40004034)
     142#define LPC32XX_START_RSR_INT (*(volatile uint32_t *) 0x40004024)
     143#define LPC32XX_START_APR_PIN (*(volatile uint32_t *) 0x4000403c)
     144#define LPC32XX_START_APR_INT (*(volatile uint32_t *) 0x4000402c)
     145#define LPC32XX_USB_CTRL (*(volatile uint32_t *) 0x40004064)
     146#define LPC32XX_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c)
     147#define LPC32XX_MS_CTRL (*(volatile uint32_t *) 0x40004080)
     148#define LPC32XX_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8)
     149#define LPC32XX_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8)
     150#define LPC32XX_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090)
     151#define LPC32XX_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054)
     152#define LPC32XX_I2S_CTRL (*(volatile uint32_t *) 0x4000407c)
     153#define LPC32XX_SSP_CTRL (*(volatile uint32_t *) 0x40004078)
     154#define LPC32XX_SPI_CTRL (*(volatile uint32_t *) 0x400040c4)
     155#define LPC32XX_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac)
     156#define LPC32XX_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0)
     157#define LPC32XX_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc)
     158#define LPC32XX_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4)
     159#define LPC32XX_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060)
     160#define LPC32XX_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0)
     161#define LPC32XX_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8)
     162#define LPC32XX_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4)
     163#define LPC32XX_POS0_IRAM_CTRl (*(volatile uint32_t *) 0x40004110)
     164#define LPC32XX_POS1_IRAM_CTRl (*(volatile uint32_t *) 0x40004114)
     165
     166/** @} */
     167
     168/**
     169 * @name GPIO Registers
     170 *
     171 * @{
     172 */
     173
     174#define LPC32XX_P0_INP_STATE (*(volatile uint32_t *) 0x40028040)
     175#define LPC32XX_P0_OUTP_SET (*(volatile uint32_t *) 0x40028044)
     176#define LPC32XX_P0_OUTP_CLR (*(volatile uint32_t *) 0x40028048)
     177#define LPC32XX_P0_DIR_SET (*(volatile uint32_t *) 0x40028050)
     178#define LPC32XX_P0_DIR_CLR (*(volatile uint32_t *) 0x40028054)
     179#define LPC32XX_P0_DIR_STATE (*(volatile uint32_t *) 0x40028058)
     180#define LPC32XX_P0_OUTP_STATE (*(volatile uint32_t *) 0x4002804c)
     181#define LPC32XX_P1_INP_STATE (*(volatile uint32_t *) 0x40028060)
     182#define LPC32XX_P1_OUTP_SET (*(volatile uint32_t *) 0x40028064)
     183#define LPC32XX_P1_OUTP_CLR (*(volatile uint32_t *) 0x40028068)
     184#define LPC32XX_P1_DIR_SET (*(volatile uint32_t *) 0x40028070)
     185#define LPC32XX_P1_DIR_CLR (*(volatile uint32_t *) 0x40028074)
     186#define LPC32XX_P1_DIR_STATE (*(volatile uint32_t *) 0x40028078)
     187#define LPC32XX_P1_OUTP_STATE (*(volatile uint32_t *) 0x4002806c)
     188#define LPC32XX_P2_INP_STATE (*(volatile uint32_t *) 0x4002801c)
     189#define LPC32XX_P2_OUTP_SET (*(volatile uint32_t *) 0x40028020)
     190#define LPC32XX_P2_OUTP_CLR (*(volatile uint32_t *) 0x40028024)
     191#define LPC32XX_P2_DIR_SET (*(volatile uint32_t *) 0x40028010)
     192#define LPC32XX_P2_DIR_CLR (*(volatile uint32_t *) 0x40028014)
     193#define LPC32XX_P2_DIR_STATE (*(volatile uint32_t *) 0x40028018)
     194#define LPC32XX_P3_INP_STATE (*(volatile uint32_t *) 0x40028000)
     195#define LPC32XX_P3_OUTP_SET (*(volatile uint32_t *) 0x40028004)
     196#define LPC32XX_P3_OUTP_CLR (*(volatile uint32_t *) 0x40028008)
     197#define LPC32XX_P3_OUTP_STATE (*(volatile uint32_t *) 0x4002800c)
     198
     199/** @} */
     200
     201/** @} */
    105202
    106203#endif /* LIBBSP_ARM_LPC32XX_LPC32XX_H */
  • c/src/lib/libbsp/arm/lpc32xx/include/mmu.h

    r7a6f8d0 r22f107b6  
    22 * @file
    33 *
    4  * @ingroup lpc32xx
     4 * @ingroup lpc32xx_mmu
    55 *
    66 * @brief MMU API.
     
    2929#endif /* __cplusplus */
    3030
     31/**
     32 * @defgroup lpc32xx_mmu MMU Support
     33 *
     34 * @ingroup lpc32xx
     35 *
     36 * @brief MMU support.
     37 *
     38 * @{
     39 */
     40
    3141#define LPC32XX_MMU_CLIENT_DOMAIN 15U
    3242
     
    4656  (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
    4757
     58/** @} */
     59
    4860#ifdef __cplusplus
    4961}
  • c/src/lib/libbsp/arm/lpc32xx/preinstall.am

    r7a6f8d0 r22f107b6  
    9595PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-timer.h
    9696
     97$(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     98        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h
     99PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h
     100
    97101$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    98102        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
  • c/src/lib/libbsp/arm/lpc32xx/startup/bspstart.c

    r7a6f8d0 r22f107b6  
    4444#define CONSOLE_TER (*(volatile uint32_t *) (LPC32XX_BASE_UART_5 + 0x30))
    4545
     46static void lpc32xx_timer_initialize(void)
     47{
     48  volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
     49
     50  LPC32XX_TIMCLK_CTRL1 = (1U << 2) | (1U << 3);
     51
     52  timer->tcr = LPC_TIMER_TCR_RST;
     53  timer->ctcr = 0x0;
     54  timer->pr = 0x0;
     55  timer->ir = 0xff;
     56  timer->mcr = 0x0;
     57  timer->ccr = 0x0;
     58  timer->tcr = LPC_TIMER_TCR_EN;
     59}
     60
    4661void bsp_start(void)
    4762{
     63  uint32_t uartclk_ctrl = 0;
     64
    4865  #ifdef LPC32XX_CONFIG_U3CLK
     66    uartclk_ctrl |= 1U << 0;
    4967    LPC32XX_U3CLK = LPC32XX_CONFIG_U3CLK;
    5068  #endif
    5169  #ifdef LPC32XX_CONFIG_U4CLK
     70    uartclk_ctrl |= 1U << 1;
    5271    LPC32XX_U4CLK = LPC32XX_CONFIG_U4CLK;
    5372  #endif
    5473  #ifdef LPC32XX_CONFIG_U5CLK
     74    uartclk_ctrl |= 1U << 2;
    5575    LPC32XX_U5CLK = LPC32XX_CONFIG_U5CLK;
    5676  #endif
    5777  #ifdef LPC32XX_CONFIG_U6CLK
     78    uartclk_ctrl |= 1U << 3;
    5879    LPC32XX_U6CLK = LPC32XX_CONFIG_U6CLK;
    5980  #endif
     
    6384  #endif
    6485
     86  LPC32XX_UARTCLK_CTRL = uartclk_ctrl;
    6587  LPC32XX_UART_CTRL = 0x0;
    6688  LPC32XX_UART_LOOP = 0x0;
     
    7597  CONSOLE_FCR = 0x7;
    7698
    77 #if 0
    78   /* FIXME */
    79   printk("LPC32XX_U3CLK %08x\n", LPC32XX_U3CLK);
    80   printk("LPC32XX_U4CLK %08x\n", LPC32XX_U4CLK);
    81   printk("LPC32XX_U5CLK %08x\n", LPC32XX_U5CLK);
    82   printk("LPC32XX_U6CLK %08x\n", LPC32XX_U6CLK);
    83   printk("LPC32XX_IRDACLK %08x\n", LPC32XX_IRDACLK);
    84   printk("LPC32XX_UART_CTRL %08x\n", LPC32XX_UART_CTRL);
    85   printk("LPC32XX_UART_CLKMODE %08x\n", LPC32XX_UART_CLKMODE);
    86   printk("LPC32XX_UART_LOOP %08x\n", LPC32XX_UART_LOOP);
    87 #endif
    88 
    89   /* Interrupts */
    9099  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
    91100    _CPU_Fatal_halt(0xe);
    92101  }
    93102
    94   /* Task stacks */
    95103  bsp_stack_initialize(
    96104    bsp_section_stack_begin,
    97105    (uintptr_t) bsp_section_stack_size
    98106  );
     107
     108  lpc32xx_timer_initialize();
    99109}
    100110
  • c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c

    r7a6f8d0 r22f107b6  
    2828#include <bsp/linker-symbols.h>
    2929
    30 #define LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
    31 
    3230#ifdef LPC32XX_DISABLE_READ_WRITE_DATA_CACHE
    3331  #define LPC32XX_MMU_READ_WRITE_DATA LPC32XX_MMU_READ_WRITE
     
    3634#endif
    3735
     36#ifdef LPC32XX_DISABLE_READ_ONLY_PROTECTION
     37  #define LPC32XX_MMU_READ_ONLY_DATA LPC32XX_MMU_READ_WRITE_CACHED
     38  #define LPC32XX_MMU_CODE LPC32XX_MMU_READ_WRITE_CACHED
     39#else
     40  #define LPC32XX_MMU_READ_ONLY_DATA LPC32XX_MMU_READ_ONLY_CACHED
     41  #define LPC32XX_MMU_CODE LPC32XX_MMU_READ_ONLY_CACHED
     42#endif
     43
    3844#define BSP_START_SECTION __attribute__((section(".bsp_start")))
    3945#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
     
    6268    .begin = (uint32_t) bsp_section_start_begin,
    6369    .end = (uint32_t) bsp_section_start_end,
    64     .flags = LPC32XX_MMU_READ_WRITE_CACHED
     70    .flags = LPC32XX_MMU_CODE
    6571  }, {
    6672    .begin = (uint32_t) bsp_section_vector_begin,
     
    7076    .begin = (uint32_t) bsp_section_text_begin,
    7177    .end = (uint32_t) bsp_section_text_end,
    72     .flags = LPC32XX_MMU_READ_WRITE_CACHED
     78    .flags = LPC32XX_MMU_CODE
    7379  }, {
    7480    .begin = (uint32_t) bsp_section_rodata_begin,
    7581    .end = (uint32_t) bsp_section_rodata_end,
    76     .flags = LPC32XX_MMU_READ_WRITE_CACHED
     82    .flags = LPC32XX_MMU_READ_ONLY_DATA
    7783  }, {
    7884    .begin = (uint32_t) bsp_section_data_begin,
     
    8288    .begin = (uint32_t) bsp_section_fast_begin,
    8389    .end = (uint32_t) bsp_section_fast_end,
    84     .flags = LPC32XX_MMU_READ_WRITE_CACHED
     90    .flags = LPC32XX_MMU_CODE
    8591  }, {
    8692    .begin = (uint32_t) bsp_section_bss_begin,
     
    94100    .begin = (uint32_t) bsp_section_stack_begin,
    95101    .end = (uint32_t) bsp_section_stack_end,
    96     .flags = LPC32XX_MMU_READ_WRITE_CACHED
     102    .flags = LPC32XX_MMU_READ_WRITE_DATA
    97103  }, {
    98104    .begin = 0x0U,
     
    178184  /* Copy .text section */
    179185  arm_cp15_instruction_cache_invalidate();
    180   bsp_start_memcpy_arm(
     186  bsp_start_memcpy(
    181187    (int *) bsp_section_text_begin,
    182188    (const int *) bsp_section_text_load_begin,
     
    186192  /* Copy .rodata section */
    187193  arm_cp15_instruction_cache_invalidate();
    188   bsp_start_memcpy_arm(
     194  bsp_start_memcpy(
    189195    (int *) bsp_section_rodata_begin,
    190196    (const int *) bsp_section_rodata_load_begin,
     
    194200  /* Copy .data section */
    195201  arm_cp15_instruction_cache_invalidate();
    196   bsp_start_memcpy_arm(
     202  bsp_start_memcpy(
    197203    (int *) bsp_section_data_begin,
    198204    (const int *) bsp_section_data_load_begin,
     
    202208  /* Copy .fast section */
    203209  arm_cp15_instruction_cache_invalidate();
    204   bsp_start_memcpy_arm(
     210  bsp_start_memcpy(
    205211    (int *) bsp_section_fast_begin,
    206212    (const int *) bsp_section_fast_load_begin,
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