Changeset 22ddca1f in rtems


Ignore:
Timestamp:
Feb 19, 2005, 6:29:39 AM (17 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
8fab7fa9
Parents:
df3ae64
Message:

2005-02-19 Ralf Corsepius <ralf.corsepius@…>

  • rtems/score/cpu.h: Remove traces from NO_CPU.
Location:
cpukit/score/cpu
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/avr/ChangeLog

    rdf3ae64 r22ddca1f  
     12005-02-19      Ralf Corsepius <ralf.corsepius@rtems.org>
     2
     3        * rtems/score/cpu.h: Remove traces from NO_CPU.
     4
    152005-02-08      Ralf Corsepius <ralf.corsepius@rtems.org>
    26
  • cpukit/score/cpu/avr/rtems/score/cpu.h

    rdf3ae64 r22ddca1f  
    4747 *  one subroutine call is avoided entirely.]
    4848 *
    49  *  NO_CPU Specific Information:
     49 *  AVR Specific Information:
    5050 *
    5151 *  XXX document implementation including references if appropriate
     
    7171 *  necessary to strike a balance when setting this parameter.
    7272 *
    73  *  NO_CPU Specific Information:
     73 *  AVR Specific Information:
    7474 *
    7575 *  XXX document implementation including references if appropriate
     
    101101 *  procedure on that CPU.
    102102 *
    103  *  NO_CPU Specific Information:
     103 *  AVR Specific Information:
    104104 *
    105105 *  XXX document implementation including references if appropriate
     
    122122 *  procedure on that CPU.
    123123 *
    124  *  NO_CPU Specific Information:
     124 *  AVR Specific Information:
    125125 *
    126126 *  XXX document implementation including references if appropriate
     
    138138 *  or CPU_INSTALL_HARDWARE_INTERRUPT_STACK is TRUE.
    139139 *
    140  *  NO_CPU Specific Information:
     140 *  AVR Specific Information:
    141141 *
    142142 *  XXX document implementation including references if appropriate
     
    150150 *  number (0)?
    151151 *
    152  *  NO_CPU Specific Information:
     152 *  AVR Specific Information:
    153153 *
    154154 *  XXX document implementation including references if appropriate
     
    166166 *  the answer is TRUE.
    167167 *
    168  *  The macro name "NO_CPU_HAS_FPU" should be made CPU specific.
     168 *  The macro name "AVR_HAS_FPU" should be made CPU specific.
    169169 *  It indicates whether or not this CPU model has FP support.  For
    170170 *  example, it would be possible to have an i386_nofp CPU model
     
    178178 *  compiler specific.
    179179 *
    180  *  NO_CPU Specific Information:
    181  *
    182  *  XXX document implementation including references if appropriate
    183  */
    184 
    185 #if ( NO_CPU_HAS_FPU == 1 )
     180 *  AVR Specific Information:
     181 *
     182 *  XXX document implementation including references if appropriate
     183 */
     184
     185#if ( AVR_HAS_FPU == 1 )
    186186#define CPU_HARDWARE_FP     TRUE
    187187#else
     
    210210 *  If CPU_HARDWARE_FP is FALSE, then this should be FALSE as well.
    211211 *
    212  *  NO_CPU Specific Information:
     212 *  AVR Specific Information:
    213213 *
    214214 *  XXX document implementation including references if appropriate
     
    228228 *  must be saved as part of the preemption.
    229229 *
    230  *  NO_CPU Specific Information:
     230 *  AVR Specific Information:
    231231 *
    232232 *  XXX document implementation including references if appropriate
     
    260260 *  be saved or restored.
    261261 *
    262  *  NO_CPU Specific Information:
     262 *  AVR Specific Information:
    263263 *
    264264 *  XXX document implementation including references if appropriate
     
    287287 *    3.  generic (if no BSP and no CPU dependent)
    288288 *
    289  *  NO_CPU Specific Information:
     289 *  AVR Specific Information:
    290290 *
    291291 *  XXX document implementation including references if appropriate
     
    301301 *  If FALSE, then the grows toward smaller addresses.
    302302 *
    303  *  NO_CPU Specific Information:
     303 *  AVR Specific Information:
    304304 *
    305305 *  XXX document implementation including references if appropriate
     
    327327 *         in the executive to justify turning this on.
    328328 *
    329  *  NO_CPU Specific Information:
     329 *  AVR Specific Information:
    330330 *
    331331 *  XXX document implementation including references if appropriate
     
    338338 *  routines are handled.
    339339 *
    340  *  NO_CPU Specific Information:
     340 *  AVR Specific Information:
    341341 *
    342342 *  XXX document implementation including references if appropriate
     
    352352 *  CPU interrupt levels is defined by the routine _CPU_ISR_Set_level().
    353353 *
    354  *  NO_CPU Specific Information:
     354 *  AVR Specific Information:
    355355 *
    356356 *  XXX document implementation including references if appropriate
     
    362362 *  Processor defined structures required for cpukit/score.
    363363 *
    364  *  NO_CPU Specific Information:
     364 *  AVR Specific Information:
    365365 *
    366366 *  XXX document implementation including references if appropriate
     
    403403 *  a debugger such as gdb.  But that is another problem.
    404404 *
    405  *  NO_CPU Specific Information:
     405 *  AVR Specific Information:
    406406 *
    407407 *  XXX document implementation including references if appropriate
     
    426426 *  the XXX processor specific parameters.
    427427 *
    428  *  NO_CPU Specific Information:
     428 *  AVR Specific Information:
    429429 *
    430430 *  XXX document implementation including references if appropriate
     
    450450 *  the file rtems/system.h.
    451451 *
    452  *  NO_CPU Specific Information:
    453  *
    454  *  XXX document implementation including references if appropriate
    455  */
    456 
    457 /*
    458  *  Macros to access NO_CPU specific additions to the CPU Table
    459  *
    460  *  NO_CPU Specific Information:
     452 *  AVR Specific Information:
     453 *
     454 *  XXX document implementation including references if appropriate
     455 */
     456
     457/*
     458 *  Macros to access AVR specific additions to the CPU Table
     459 *
     460 *  AVR Specific Information:
    461461 *
    462462 *  XXX document implementation including references if appropriate
     
    471471 *  _CPU_Context_Initialize.
    472472 *
    473  *  NO_CPU Specific Information:
     473 *  AVR Specific Information:
    474474 *
    475475 *  XXX document implementation including references if appropriate
     
    490490 *        CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
    491491 *
    492  *  NO_CPU Specific Information:
     492 *  AVR Specific Information:
    493493 *
    494494 *  XXX document implementation including references if appropriate
     
    507507 *  sequence (if a dispatch is necessary).
    508508 *
    509  *  NO_CPU Specific Information:
     509 *  AVR Specific Information:
    510510 *
    511511 *  XXX document implementation including references if appropriate
     
    517517 *  Nothing prevents the porter from declaring more CPU specific variables.
    518518 *
    519  *  NO_CPU Specific Information:
     519 *  AVR Specific Information:
    520520 *
    521521 *  XXX document implementation including references if appropriate
     
    530530 *  CPUs with a "floating point save context" instruction.
    531531 *
    532  *  NO_CPU Specific Information:
     532 *  AVR Specific Information:
    533533 *
    534534 *  XXX document implementation including references if appropriate
     
    542542 *  system this thread must exist and be able to process all directives.
    543543 *
    544  *  NO_CPU Specific Information:
     544 *  AVR Specific Information:
    545545 *
    546546 *  XXX document implementation including references if appropriate
     
    553553 *  by RTEMS.
    554554 *
    555  *  NO_CPU Specific Information:
     555 *  AVR Specific Information:
    556556 *
    557557 *  XXX document implementation including references if appropriate
     
    572572 *  that a "reasonable" small application should not have any problems.
    573573 *
    574  *  NO_CPU Specific Information:
     574 *  AVR Specific Information:
    575575 *
    576576 *  XXX document implementation including references if appropriate
     
    583583 *  alignment does not take into account the requirements for the stack.
    584584 *
    585  *  NO_CPU Specific Information:
     585 *  AVR Specific Information:
    586586 *
    587587 *  XXX document implementation including references if appropriate
     
    609609 *         elements allocated from the heap meet all restrictions.
    610610 *
    611  *  NO_CPU Specific Information:
     611 *  AVR Specific Information:
    612612 *
    613613 *  XXX document implementation including references if appropriate
     
    627627 *         be greater or equal to than CPU_ALIGNMENT.
    628628 *
    629  *  NO_CPU Specific Information:
     629 *  AVR Specific Information:
    630630 *
    631631 *  XXX document implementation including references if appropriate
     
    642642 *  NOTE:  This must be a power of 2 either 0 or greater than CPU_ALIGNMENT.
    643643 *
    644  *  NO_CPU Specific Information:
     644 *  AVR Specific Information:
    645645 *
    646646 *  XXX document implementation including references if appropriate
     
    656656 *  Support routine to initialize the RTEMS vector table after it is allocated.
    657657 *
    658  *  NO_CPU Specific Information:
     658 *  AVR Specific Information:
    659659 *
    660660 *  XXX document implementation including references if appropriate
     
    667667 *  level is returned in _level.
    668668 *
    669  *  NO_CPU Specific Information:
     669 *  AVR Specific Information:
    670670 *
    671671 *  XXX document implementation including references if appropriate
     
    682682 *  _level is not modified.
    683683 *
    684  *  NO_CPU Specific Information:
     684 *  AVR Specific Information:
    685685 *
    686686 *  XXX document implementation including references if appropriate
     
    697697 * modified.
    698698 *
    699  *  NO_CPU Specific Information:
     699 *  AVR Specific Information:
    700700 *
    701701 *  XXX document implementation including references if appropriate
     
    718718 *  The get routine usually must be implemented as a subroutine.
    719719 *
    720  *  NO_CPU Specific Information:
     720 *  AVR Specific Information:
    721721 *
    722722 *  XXX document implementation including references if appropriate
     
    753753 *        where the PSR contains an enable FPU bit.
    754754 *
    755  *  NO_CPU Specific Information:
     755 *  AVR Specific Information:
    756756 *
    757757 *  XXX document implementation including references if appropriate
     
    772772 *  assumptions of restoring a context.
    773773 *
    774  *  NO_CPU Specific Information:
     774 *  AVR Specific Information:
    775775 *
    776776 *  XXX document implementation including references if appropriate
     
    793793 *  or low to high based on the whim of the CPU designers.
    794794 *
    795  *  NO_CPU Specific Information:
     795 *  AVR Specific Information:
    796796 *
    797797 *  XXX document implementation including references if appropriate
     
    812812 *  a "null FP status word" in the correct place in the FP context.
    813813 *
    814  *  NO_CPU Specific Information:
     814 *  AVR Specific Information:
    815815 *
    816816 *  XXX document implementation including references if appropriate
     
    831831 *  halts/stops the CPU.
    832832 *
    833  *  NO_CPU Specific Information:
     833 *  AVR Specific Information:
    834834 *
    835835 *  XXX document implementation including references if appropriate
     
    898898 *      bit set
    899899 *
    900  *  NO_CPU Specific Information:
     900 *  AVR Specific Information:
    901901 *
    902902 *  XXX document implementation including references if appropriate
     
    922922 *  for that routine.
    923923 *
    924  *  NO_CPU Specific Information:
     924 *  AVR Specific Information:
    925925 *
    926926 *  XXX document implementation including references if appropriate
     
    940940 *  for that routine.
    941941 *
    942  *  NO_CPU Specific Information:
     942 *  AVR Specific Information:
    943943 *
    944944 *  XXX document implementation including references if appropriate
     
    961961 *  This routine performs CPU dependent initialization.
    962962 *
    963  *  NO_CPU Specific Information:
     963 *  AVR Specific Information:
    964964 *
    965965 *  XXX document implementation including references if appropriate
     
    977977 *  processor's vector table.
    978978 *
    979  *  NO_CPU Specific Information:
     979 *  AVR Specific Information:
    980980 *
    981981 *  XXX document implementation including references if appropriate
     
    993993 *  This routine installs an interrupt vector.
    994994 *
    995  *  NO_CPU Specific Information:
     995 *  AVR Specific Information:
    996996 *
    997997 *  XXX document implementation including references if appropriate
     
    10121012 *         is TRUE.
    10131013 *
    1014  *  NO_CPU Specific Information:
     1014 *  AVR Specific Information:
    10151015 *
    10161016 *  XXX document implementation including references if appropriate
     
    10271027 *         is TRUE.
    10281028 *
    1029  *  NO_CPU Specific Information:
     1029 *  AVR Specific Information:
    10301030 *
    10311031 *  XXX document implementation including references if appropriate
     
    10391039 *  This routine switches from the run context to the heir context.
    10401040 *
    1041  *  NO_CPU Specific Information:
     1041 *  AVR Specific Information:
    10421042 *
    10431043 *  XXX document implementation including references if appropriate
     
    10571057 *  NOTE: May be unnecessary to reload some registers.
    10581058 *
    1059  *  NO_CPU Specific Information:
     1059 *  AVR Specific Information:
    10601060 *
    10611061 *  XXX document implementation including references if appropriate
     
    10711071 *  This routine saves the floating point context passed to it.
    10721072 *
    1073  *  NO_CPU Specific Information:
     1073 *  AVR Specific Information:
    10741074 *
    10751075 *  XXX document implementation including references if appropriate
     
    10851085 *  This routine restores the floating point context passed to it.
    10861086 *
    1087  *  NO_CPU Specific Information:
     1087 *  AVR Specific Information:
    10881088 *
    10891089 *  XXX document implementation including references if appropriate
     
    11131113 *  will be fetched incorrectly.
    11141114 *
    1115  *  NO_CPU Specific Information:
     1115 *  AVR Specific Information:
    11161116 *
    11171117 *  XXX document implementation including references if appropriate
  • cpukit/score/cpu/h8300/rtems/score/cpu.h

    rdf3ae64 r22ddca1f  
    156156 *  the answer is TRUE.
    157157 *
    158  *  The macro name "NO_CPU_HAS_FPU" should be made CPU specific.
     158 *  The macro name "H8300_HAS_FPU" should be made CPU specific.
    159159 *  It indicates whether or not this CPU model has FP support.  For
    160160 *  example, it would be possible to have an i386_nofp CPU model
  • cpukit/score/cpu/sh/ChangeLog

    rdf3ae64 r22ddca1f  
     12005-02-19      Ralf Corsepius <ralf.corsepius@rtems.org>
     2
     3        * rtems/score/cpu.h: Remove traces from NO_CPU.
     4
    152005-02-08      Ralf Corsepius <ralf.corsepius@rtems.org>
    26
  • cpukit/score/cpu/sh/rtems/score/cpu.h

    rdf3ae64 r22ddca1f  
    131131 *  We currently support sh1 only, which has no FPU, other SHes have an FPU
    132132 *
    133  *  The macro name "NO_CPU_HAS_FPU" should be made CPU specific.
     133 *  The macro name "SH_HAS_FPU" should be made CPU specific.
    134134 *  It indicates whether or not this CPU model has FP support.  For
    135135 *  example, it would be possible to have an i386_nofp CPU model
  • cpukit/score/cpu/unix/ChangeLog

    rdf3ae64 r22ddca1f  
     12005-02-19      Ralf Corsepius <ralf.corsepius@rtems.org>
     2
     3        * rtems/score/cpu.h: Remove traces from NO_CPU.
     4
    152005-02-08      Ralf Corsepius <ralf.corsepius@rtems.org>
    26
  • cpukit/score/cpu/unix/rtems/score/cpu.h

    rdf3ae64 r22ddca1f  
    145145 *  the answer is TRUE.
    146146 *
    147  *  The macro name "NO_CPU_HAS_FPU" should be made CPU specific.
     147 *  The macro name "UNIX_HAS_FPU" should be made CPU specific.
    148148 *  It indicates whether or not this CPU model has FP support.  For
    149149 *  example, it would be possible to have an i386_nofp CPU model
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