Changeset 21d30494 in rtems


Ignore:
Timestamp:
Sep 11, 2006, 9:47:05 PM (14 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
343ef8e, c4a0ecf
Parents:
6094c1a
Message:

2006-09-11 Joel Sherrill <joel@…>

  • mongoosev/vectorisrs/vectorisrs.c: Convert C++ style comments to C style.
Location:
c/src/lib/libcpu/mips
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/mips/ChangeLog

    r6094c1a r21d30494  
     12006-09-11      Joel Sherrill <joel@OARcorp.com>
     2
     3        * mongoosev/vectorisrs/vectorisrs.c: Convert C++ style comments to C
     4        style.
     5
    162006-06-08      Bruce Robinson <brucer@pmccorp.com>
    27
  • c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c

    r6094c1a r21d30494  
    7171
    7272
    73 //
    74 // Instrumentation tweaks for isr timing measurement, turning them off
    75 // via this #if will remove the code entirely from the RTEMS kernel.
    76 //
     73/*
     74 * Instrumentation tweaks for isr timing measurement, turning them off
     75 * via this #if will remove the code entirely from the RTEMS kernel.
     76 */
    7777
    7878#if 0
     
    9595{
    9696   mips_get_cause( _ivcause );
    97    _ivcause &= SR_IMASK;        // mask off everything other than the interrupt bits
     97   _ivcause &= SR_IMASK;        /* mask off everything other than the interrupt bits */
    9898
    9999   return ((_ivcause & (_ivsr & SR_IMASK)) >> CAUSE_IPSHIFT);
     
    102102
    103103
    104 //
    105 // This rather strangely coded routine enforces an interrupt priority
    106 // scheme.  As it runs thru finding whichever interrupt caused it to get
    107 // here, it test for other interrupts arriving in the meantime (maybe it
    108 // occured while the vector code is executing for instance).  Each new
    109 // interrupt will be served in order of its priority.  In an effort to
    110 // minimize overhead, the cause register is only fetched after an
    111 // interrupt is serviced.  Because of the intvect goto's, this routine
    112 // will only exit when all interrupts have been serviced and no more
    113 // have arrived, this improves interrupt latency at the cost of
    114 // increasing scheduling jitter; though scheduling jitter should only
    115 // become apparent in high interrupt load conditions.
    116 //
     104/*
     105 * This rather strangely coded routine enforces an interrupt priority
     106 * scheme.  As it runs thru finding whichever interrupt caused it to get
     107 * here, it test for other interrupts arriving in the meantime (maybe it
     108 * occured while the vector code is executing for instance).  Each new
     109 * interrupt will be served in order of its priority.  In an effort to
     110 * minimize overhead, the cause register is only fetched after an
     111 * interrupt is serviced.  Because of the intvect goto's, this routine
     112 * will only exit when all interrupts have been serviced and no more
     113 * have arrived, this improves interrupt latency at the cost of
     114 * increasing scheduling jitter; though scheduling jitter should only
     115 * become apparent in high interrupt load conditions.
     116 */
    117117void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )
    118118{
     
    128128   if( cshifted & 0x3 )
    129129   {
    130       // making the software interrupt the highest priority is kind of
    131       // stupid, but it makes the bit testing lots easier.  On the other
    132       // hand, these ints are infrequently used and the testing overhead
    133       // is minimal.  Who knows, high-priority software ints might be
    134       // handy in some situation.
     130      /* making the software interrupt the highest priority is kind of
     131       * stupid, but it makes the bit testing lots easier.  On the other
     132       * hand, these ints are infrequently used and the testing overhead
     133       * is minimal.  Who knows, high-priority software ints might be
     134       * handy in some situation.
     135       */
    135136
    136137      /* unset both software int cause bits */
     
    211212*/
    212213
    213       //
    214       // iterate thru 32 bits in 4 chunks of 8 bits each.  This lets us
    215       // quickly get past unasserted interrupts instead of flogging our
    216       // way thru a full 32 bits.  pf_mask shifts left 8 bits at a time
    217       // to serve as a interrupt cause test mask.
    218       //
     214      /*
     215       * iterate thru 32 bits in 4 chunks of 8 bits each.  This lets us
     216       * quickly get past unasserted interrupts instead of flogging our
     217       * way thru a full 32 bits.  pf_mask shifts left 8 bits at a time
     218       * to serve as a interrupt cause test mask.
     219       */
    219220      for( bit=0, pf_mask = 0xff;    (bit < 32 && pf_icr);     (bit+=8, pf_mask <<= 8) )
    220221      {
    221222         if ( pf_icr & pf_mask )
    222223         {
    223             // one or more of the 8 bits we're testing is high
     224            /* one or more of the 8 bits we're testing is high */
    224225
    225226            m = (1 << bit);
    226227
    227             // iterate thru the 8 bits, servicing any of the interrupts
     228            /* iterate thru the 8 bits, servicing any of the interrupts */
    228229            for(i=0; (i<8 && pf_icr); (i++, m <<= 1))
    229230            {
     
    234235                  CLR_ISR_FLAG( 0x80 + ((bit + i) * 4) );
    235236
    236                   // or each serviced interrupt into our interrupt clear
    237                   // mask
     237                  /* or each serviced interrupt into our interrupt clear mask */
    238238                  pf_reset |= m;
    239239
    240                   // xor off each int we service so we can immediately
    241                   // exit once we get the last one
     240                  /* xor off each int we service so we can immediately
     241                   * exit once we get the last one
     242                   */
    242243                  pf_icr   %= m;
    243244
    244                   // if another interrupt has arrived, jump out right
    245                   // away but be sure to reset all the interrupts we've
    246                   // already serviced
     245                  /* if another interrupt has arrived, jump out right
     246                   * away but be sure to reset all the interrupts we've
     247                   * already serviced
     248                   */
    247249                  if( READ_CAUSE() & 0xff ) goto pfexit;
    248250               }
     
    254256   }
    255257
    256    //
    257    // this is a last ditch interrupt check, if an interrupt arrives
    258    // after this step, servicing it will incur the entire interrupt
    259    // overhead cost.
    260    //
     258   /*
     259    * this is a last ditch interrupt check, if an interrupt arrives
     260    * after this step, servicing it will incur the entire interrupt
     261    * overhead cost.
     262    */
    261263   if( (cshifted = READ_CAUSE()) & 0xff ) goto intvect;
    262264}
    263 
    264 
    265 
    266 // eof
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