Changeset 21bfd93 in rtems for c/src/lib/libcpu/sh/sh7032/timer/timer.c

Timestamp:

09/29/98 12:40:33 (25 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

f1ccfde

Parents:

766ed7c

Message:

Patch from Ralf Corsepius <corsepiu@…>:

Please find enclosed a patch which enables me to build the bare-bsp for
sh-rtems.

Changes:

1. Add preinstall to libbsp/bare/include/Makefile.in
2. Removed FORCEIT, add preinstall to libbsp/sh/gensh1/include/Makefile.in
3. Disabled support of set_vector from sh code (shared/setvec.c is still present but isn't used anymore), set_vector replaced with standard rtems functions.

Problems still present:

1. Support of spin-delays in bare bsp
2. Proper support of cpu frequency

To configure I used:

<srcdir>/configure \
--target=sh-rtems \
--prefix=<instdir>/sh-bare \
--enable-bare-cpu-model=sh7032 \
--enable-bare-cpu-cflags='-Wall -m1 -DMHZ=20
-DCPU_CONSOLE_DEVNAME="\"/dev/null\""'
--enable-rtemsbsp=bare \
--disable-networking \
--disable-cxx \
--disable-posix \
--disable-tests

IMO, if there are no objections to this patch, a similar approach should
be applied to all CPUs/BSPs (esp. hppa1.1, mips64orion, ppc403, because
they apply set_vector inside of libcpu).

File:

• c/src/lib/libcpu/sh/sh7032/timer/timer.c (modified) (2 diffs)

c/src/lib/libcpu/sh/sh7032/timer/timer.c

@@ -63 +63 @@
 void Timer_initialize( void )
 {
-  rtems_unsigned8 temp8;
+  rtems_unsigned8  temp8;
   rtems_unsigned16 temp16;
   rtems_unsigned32 level;
-  rtems_isr* ignored;
+  rtems_isr        *ignored;
 
   /*
@@ -118 +118 @@
 
   /* initialize ISR */
-  ignored = set_vector( timerisr, ITU1_VECTOR, 0);
+  _CPU_ISR_install_raw_handler( ITU1_VECTOR, timerisr, &ignored );
   _CPU_ISR_Enable( level);