Changeset 21bfd93 in rtems for c/src/lib/libcpu/sh/sh7032/timer


Ignore:
Timestamp:
09/29/98 12:40:33 (24 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
f1ccfde
Parents:
766ed7c
Message:

Patch from Ralf Corsepius <corsepiu@…>:

Please find enclosed a patch which enables me to build the bare-bsp for
sh-rtems.

Changes:

  1. Add preinstall to libbsp/bare/include/Makefile.in
  2. Removed FORCEIT, add preinstall to libbsp/sh/gensh1/include/Makefile.in
  3. Disabled support of set_vector from sh code (shared/setvec.c is still present but isn't used anymore), set_vector replaced with standard rtems functions.

Problems still present:

  1. Support of spin-delays in bare bsp
  2. Proper support of cpu frequency

To configure I used:

<srcdir>/configure \
--target=sh-rtems \
--prefix=<instdir>/sh-bare \
--enable-bare-cpu-model=sh7032 \
--enable-bare-cpu-cflags='-Wall -m1 -DMHZ=20
-DCPU_CONSOLE_DEVNAME="\"/dev/null\""'
--enable-rtemsbsp=bare \
--disable-networking \
--disable-cxx \
--disable-posix \
--disable-tests

IMO, if there are no objections to this patch, a similar approach should
be applied to all CPUs/BSPs (esp. hppa1.1, mips64orion, ppc403, because
they apply set_vector inside of libcpu).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/sh/sh7032/timer/timer.c

    r766ed7c r21bfd93  
    6363void Timer_initialize( void )
    6464{
    65   rtems_unsigned8 temp8;
     65  rtems_unsigned8  temp8;
    6666  rtems_unsigned16 temp16;
    6767  rtems_unsigned32 level;
    68   rtems_isr* ignored;
     68  rtems_isr        *ignored;
    6969
    7070  /*
     
    118118
    119119  /* initialize ISR */
    120   ignored = set_vector( timerisr, ITU1_VECTOR, 0);
     120  _CPU_ISR_install_raw_handler( ITU1_VECTOR, timerisr, &ignored );
    121121  _CPU_ISR_Enable( level);
    122122
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