Changeset 1f7c5c88 in rtems


Ignore:
Timestamp:
Sep 25, 2015, 7:31:00 PM (5 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
a57b72d
Parents:
f52885b
git-author:
Sebastian Huber <sebastian.huber@…> (09/25/15 19:31:00)
git-committer:
Sebastian Huber <sebastian.huber@…> (09/25/15 19:48:24)
Message:

score: Fix atomic compare exchange

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/sparc/sparcv8-atomic.c

    rf52885b r1f7c5c88  
    11/*
    2  * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2014-2015 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    119119  bool equal;
    120120  ISR_Level level;
    121 
    122   level = _SPARCV8_Acquire_the_one_lock();
    123 
    124   equal = *mem == *expected;
     121  uint32_t actual;
     122
     123  level = _SPARCV8_Acquire_the_one_lock();
     124
     125  actual = *mem;
     126  equal = ( actual == *expected );
    125127  if ( equal ) {
    126128    *mem = desired;
     129  } else {
     130    *expected = actual;
    127131  }
    128132
  • cpukit/score/include/rtems/score/cpustdatomic.h

    rf52885b r1f7c5c88  
    578578  bool success;
    579579  ISR_Level level;
     580  unsigned int actual;
    580581
    581582  (void) succ;
    582583  (void) fail;
    583584  _ISR_Disable( level );
    584   success = *obj == *expected;
     585  actual = *obj;
     586  success = ( actual == *expected );
    585587  if ( success ) {
    586588    *obj = desired;
     589  } else {
     590    *expected = actual;
    587591  }
    588592  _ISR_Enable( level );
     
    601605  bool success;
    602606  ISR_Level level;
     607  unsigned long actual;
    603608
    604609  (void) succ;
    605610  (void) fail;
    606611  _ISR_Disable( level );
    607   success = *obj == *expected;
     612  actual = *obj;
     613  success = ( actual == *expected );
    608614  if ( success ) {
    609615    *obj = desired;
     616  } else {
     617    *expected = actual;
    610618  }
    611619  _ISR_Enable( level );
     
    624632  bool success;
    625633  ISR_Level level;
     634  uintptr_t actual;
    626635
    627636  (void) succ;
    628637  (void) fail;
    629638  _ISR_Disable( level );
    630   success = *obj == (uintptr_t) *expected;
     639  actual = *obj;
     640  success = ( actual == (uintptr_t) *expected );
    631641  if ( success ) {
    632642    *obj = (uintptr_t) desired;
     643  } else {
     644    *expected = (void *) actual;
    633645  }
    634646  _ISR_Enable( level );
  • testsuites/sptests/spatomic01/init.c

    rf52885b r1f7c5c88  
    11/*
    2  * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013-2015 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    190190static void test_simple_atomic_compare_exchange_body(test_context *ctx)
    191191{
    192   unsigned int ia = 8, ib = 4;
    193   unsigned int ic;
    194   unsigned long a = 2, b = 1;
    195   unsigned long c;
     192  unsigned int ei;
     193  unsigned int vi;
     194  unsigned long el;
     195  unsigned long vl;
     196  bool success;
    196197
    197198  puts("=== atomic simple compare exchange test case ===");
    198199
    199   _Atomic_Store_uint(&ctx->atomic_int_value, ia, ATOMIC_ORDER_RELAXED);
    200   _Atomic_Compare_exchange_uint(&ctx->atomic_int_value, &ia, ib,
    201     ATOMIC_ORDER_RELAXED, ATOMIC_ORDER_RELAXED);
    202   ic = _Atomic_Load_uint(&ctx->atomic_int_value, ATOMIC_ORDER_RELAXED);
    203   rtems_test_assert(ic == ib);
    204 
    205   _Atomic_Store_ulong(&ctx->atomic_value, a, ATOMIC_ORDER_RELAXED);
    206   _Atomic_Compare_exchange_ulong(&ctx->atomic_value, &a, b,
    207     ATOMIC_ORDER_RELAXED, ATOMIC_ORDER_RELAXED);
    208   c = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_RELAXED);
    209   rtems_test_assert(c == b);
     200  _Atomic_Store_uint(&ctx->atomic_int_value, 1, ATOMIC_ORDER_RELAXED);
     201  ei = 2;
     202  success = _Atomic_Compare_exchange_uint(
     203    &ctx->atomic_int_value,
     204    &ei,
     205    3,
     206    ATOMIC_ORDER_RELAXED,
     207    ATOMIC_ORDER_RELAXED
     208  );
     209  rtems_test_assert(!success);
     210  rtems_test_assert(ei == 1);
     211  success = _Atomic_Compare_exchange_uint(
     212    &ctx->atomic_int_value,
     213    &ei,
     214    3,
     215    ATOMIC_ORDER_RELAXED,
     216    ATOMIC_ORDER_RELAXED
     217  );
     218  rtems_test_assert(success);
     219  vi = _Atomic_Load_uint(&ctx->atomic_int_value, ATOMIC_ORDER_RELAXED);
     220  rtems_test_assert(vi == 3);
     221
     222  _Atomic_Store_ulong(&ctx->atomic_value, 10, ATOMIC_ORDER_RELAXED);
     223  el = 11;
     224  success = _Atomic_Compare_exchange_ulong(
     225    &ctx->atomic_value,
     226    &el,
     227    12,
     228    ATOMIC_ORDER_RELAXED,
     229    ATOMIC_ORDER_RELAXED
     230  );
     231  rtems_test_assert(!success);
     232  rtems_test_assert(el == 10);
     233  success = _Atomic_Compare_exchange_ulong(
     234    &ctx->atomic_value,
     235    &el,
     236    12,
     237    ATOMIC_ORDER_RELAXED,
     238    ATOMIC_ORDER_RELAXED
     239  );
     240  rtems_test_assert(success);
     241  vl = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_RELAXED);
     242  rtems_test_assert(vl == 12);
    210243}
    211244
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