Changeset 1f18710 in rtems


Ignore:
Timestamp:
Jul 7, 2005, 9:20:38 PM (15 years ago)
Author:
Philippe Simons <loki_666@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
4bc22a6d
Parents:
9b55ef5
Message:

2005-07-07 Philippe Simons <loki_666@…>

  • Makefile.am: Remove s3c2400/lcd/lcd.c
  • s3c2400/lcd/lcd.c: Remove.
  • s3c2400/clock/support.c: file "rewrote" to avoid GPL.
Location:
c/src/lib/libcpu/arm
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/ChangeLog

    r9b55ef5 r1f18710  
     12005-07-07      Philippe Simons <loki_666@fastmail.fm>
     2
     3        * Makefile.am: Remove s3c2400/lcd/lcd.c
     4        * s3c2400/lcd/lcd.c: Remove.
     5        * s3c2400/clock/support.c: file "rewrote" to avoid GPL.
     6
    172005-06-01      Philippe Simons <loki_666@fastmail.fm>
    28
  • c/src/lib/libcpu/arm/Makefile.am

    r9b55ef5 r1f18710  
    107107s3c2400_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    108108
    109 ## s3c2400/lcd
    110 noinst_PROGRAMS += s3c2400/lcd.rel
    111 s3c2400_lcd_rel_SOURCES = s3c2400/lcd/lcd.c
    112 s3c2400_lcd_rel_CPPFLAGS = $(AM_CPPLAGS)
    113 s3c2400_lcd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    114 
    115109## s3c2400/interrupt
    116110include_HEADERS += s3c2400/irq/irq.h
  • c/src/lib/libcpu/arm/s3c2400/clock/support.c

    r9b55ef5 r1f18710  
    22#include <bsp.h>
    33#include <s3c2400.h>
    4 
    5 #define MPLL 0
    6 #define UPLL 1
    74
    85/* ------------------------------------------------------------------------- */
     
    1613/* ------------------------------------------------------------------------- */
    1714
    18 static uint32_t get_PLLCLK(int pllreg)
     15/* return FCLK frequency */
     16uint32_t get_FCLK(void)
    1917{
    2018    uint32_t r, m, p, s;
    2119
    22     if (pllreg == MPLL)
    23         r = rMPLLCON;
    24     else if (pllreg == UPLL)
    25         r = rUPLLCON;
    26     else
    27         return 0;
    28 
     20    r = rMPLLCON;
    2921    m = ((r & 0xFF000) >> 12) + 8;
    3022    p = ((r & 0x003F0) >> 4) + 2;
     
    3426}
    3527
    36 /* return FCLK frequency */
    37 uint32_t get_FCLK(void)
     28/* return UCLK frequency */
     29uint32_t get_UCLK(void)
    3830{
    39     return(get_PLLCLK(MPLL));
     31    uint32_t r, m, p, s;
     32
     33    r = rUPLLCON;
     34    m = ((r & 0xFF000) >> 12) + 8;
     35    p = ((r & 0x003F0) >> 4) + 2;
     36    s = r & 0x3;
     37
     38    return((BSP_OSC_FREQ * m) / (p << s));
    4039}
    4140
     
    4342uint32_t get_HCLK(void)
    4443{
    45     return((rCLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
     44    if (rCLKDIVN & 0x2)
     45        return get_FCLK()/2;
     46    else
     47        return get_FCLK();   
    4648}
    4749
     
    4951uint32_t get_PCLK(void)
    5052{
    51     return((rCLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
     53    if (rCLKDIVN & 0x1)
     54        return get_HCLK()/2;
     55    else
     56        return get_HCLK();
    5257}
    53 
    54 /* return UCLK frequency */
    55 uint32_t get_UCLK(void)
    56 {
    57     return(get_PLLCLK(UPLL));
    58 }
    59 
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