Changeset 1f18710 in rtems

Timestamp:

07/07/05 21:20:38 (18 years ago)

Author:

Philippe Simons <loki_666@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

4bc22a6d

Parents:

9b55ef5

Message:

2005-07-07 Philippe Simons <loki_666@…>

• Makefile.am: Remove s3c2400/lcd/lcd.c
• s3c2400/lcd/lcd.c: Remove.
• s3c2400/clock/support.c: file "rewrote" to avoid GPL.

Location:

c/src/lib/libcpu/arm

Files:

• ChangeLog (modified) (1 diff)
• Makefile.am (modified) (1 diff)
• s3c2400/clock/support.c (modified) (5 diffs)

c/src/lib/libcpu/arm/ChangeLog

@@ +1 @@
+2005-07-07      Philippe Simons <loki_666@fastmail.fm>
+
+        * Makefile.am: Remove s3c2400/lcd/lcd.c
+        * s3c2400/lcd/lcd.c: Remove.
+        * s3c2400/clock/support.c: file "rewrote" to avoid GPL.
+
 2005-06-01      Philippe Simons <loki_666@fastmail.fm>
 

c/src/lib/libcpu/arm/Makefile.am

@@ -107 +107 @@
 s3c2400_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
-## s3c2400/lcd
-noinst_PROGRAMS += s3c2400/lcd.rel
-s3c2400_lcd_rel_SOURCES = s3c2400/lcd/lcd.c
-s3c2400_lcd_rel_CPPFLAGS = $(AM_CPPLAGS)
-s3c2400_lcd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
-
 ## s3c2400/interrupt
 include_HEADERS += s3c2400/irq/irq.h

c/src/lib/libcpu/arm/s3c2400/clock/support.c

@@ -2 +2 @@
 #include <bsp.h>
 #include <s3c2400.h>
-
-#define MPLL 0
-#define UPLL 1
 
 /* ------------------------------------------------------------------------- */
@@ -16 +13 @@
 /* ------------------------------------------------------------------------- */
 
-static uint32_t get_PLLCLK(int pllreg)
+/* return FCLK frequency */
+uint32_t get_FCLK(void)
 {
     uint32_t r, m, p, s;
 
-    if (pllreg == MPLL)
-        r = rMPLLCON;
-    else if (pllreg == UPLL)
-        r = rUPLLCON;
-    else
-        return 0;
-
+    r = rMPLLCON;
     m = ((r & 0xFF000) >> 12) + 8;
     p = ((r & 0x003F0) >> 4) + 2;
@@ -34 +26 @@
 }
 
-/* return FCLK frequency */
-uint32_t get_FCLK(void)
+/* return UCLK frequency */
+uint32_t get_UCLK(void)
 {
-    return(get_PLLCLK(MPLL));
+    uint32_t r, m, p, s;
+
+    r = rUPLLCON;
+    m = ((r & 0xFF000) >> 12) + 8;
+    p = ((r & 0x003F0) >> 4) + 2;
+    s = r & 0x3;
+
+    return((BSP_OSC_FREQ * m) / (p << s));
 }
 
@@ -43 +42 @@
 uint32_t get_HCLK(void)
 {
-    return((rCLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
+    if (rCLKDIVN & 0x2) 
+        return get_FCLK()/2;
+    else
+        return get_FCLK();    
 }
 
@@ -49 +51 @@
 uint32_t get_PCLK(void)
 {
-    return((rCLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
+    if (rCLKDIVN & 0x1)
+        return get_HCLK()/2;
+    else
+        return get_HCLK();
 }
-
-/* return UCLK frequency */
-uint32_t get_UCLK(void)
-{
-    return(get_PLLCLK(UPLL));
-}
-