Changeset 1d367a49 in rtems
- Timestamp:
- Aug 24, 2011, 9:45:20 AM (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 7e85bfbe
- Parents:
- cf3d1948
- Location:
- c/src/lib/libcpu/powerpc
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/powerpc/ChangeLog
rcf3d1948 r1d367a49 1 2011-08-24 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S, 4 new-exceptions/bspsupport/ppc_exc_global_handler.c, 5 shared/include/cpuIdent.c, shared/src/stack.c: Update due to API 6 changes. 7 1 8 2011-07-21 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 9 -
c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
rcf3d1948 r1d367a49 36 36 SPR_RW(BOOKE_TSR) 37 37 SPR_RW(BOOKE_DECAR) 38 SPR_RW(DEC)39 38 40 39 extern int BSP_connect_clock_handler (void); -
c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S
rcf3d1948 r1d367a49 65 65 * Enable caches and 604-specific features if necessary. 66 66 */ 67 mfspr r9,P VR67 mfspr r9,PPC_PVR 68 68 rlwinm r9,r9,16,16,31 69 69 cmpi 0,r9,PPC_601 … … 129 129 get_L2CR: 130 130 /* Make sure this is a > 750 chip */ 131 mfspr r3,P VR131 mfspr r3,PPC_PVR 132 132 rlwinm r3,r3,16,16,31 133 133 cmplwi r3,PPC_750 /* it's a 750 */ … … 180 180 181 181 /* Make sure this is a > 750 chip */ 182 mfspr r0,P VR182 mfspr r0,PPC_PVR 183 183 rlwinm r0,r0,16,16,31 184 184 cmplwi r0,PPC_750 … … 350 350 get_L3CR: 351 351 /* Make sure this is a 7455 chip */ 352 mfspr r3,P VR352 mfspr r3,PPC_PVR 353 353 rlwinm r3,r3,16,16,31 354 354 cmplwi r3,PPC_7455 /* it's a 7455 */ … … 380 380 381 381 /* Make sure this is a 7455 chip */ 382 mfspr r0,P VR382 mfspr r0,PPC_PVR 383 383 rlwinm r0,r0,16,16,31 384 384 cmplwi r0,PPC_7455 … … 483 483 CPU_clear_bats_early: 484 484 li r3,0 485 mfspr r4,P VR485 mfspr r4,PPC_PVR 486 486 rlwinm r4,r4,16,16,31 /* r4 = 1 for 601, 4 for 604 */ 487 487 cmpwi r4, 1 -
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c
rcf3d1948 r1d367a49 43 43 { 44 44 if (ppc_cpu_is_60x()) 45 return PPC_SPECIAL_PURPOSE_REGISTER( DAR);45 return PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR); 46 46 else 47 47 switch (ppc_cpu_is_bookE()) { -
c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c
rcf3d1948 r1d367a49 22 22 * Generate inline code to read Processor Version Register 23 23 */ 24 SPR_RO(P VR)24 SPR_RO(PPC_PVR) 25 25 26 26 ppc_cpu_id_t current_ppc_cpu = PPC_UNKNOWN; … … 80 80 return current_ppc_cpu; 81 81 82 pvr = (_read_P VR() >> 16);82 pvr = (_read_PPC_PVR() >> 16); 83 83 /* 84 84 * apply tweaks to ignore version … … 211 211 ppc_cpu_revision_t get_ppc_cpu_revision(void) 212 212 { 213 ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_P VR() & 0xffff);213 ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_PPC_PVR() & 0xffff); 214 214 current_ppc_revision = rev; 215 215 return rev; -
c/src/lib/libcpu/powerpc/shared/src/stack.c
rcf3d1948 r1d367a49 3 3 #include <libcpu/spr.h> 4 4 5 SPR_RO( LR)5 SPR_RO(PPC_LR) 6 6 7 7 typedef struct FrameRec_ { … … 18 18 if (pc) stack[i++]=pc; 19 19 if (!p) 20 p = (Frame)_read_ LR();20 p = (Frame)_read_PPC_LR(); 21 21 stack[i++]=p; 22 22 p = r1;
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