Changeset 1d367a49 in rtems

Timestamp:

Aug 24, 2011, 9:45:20 AM (10 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

4.11, 5, master

Children:

7e85bfbe

Parents:

cf3d1948

Message:

2011-08-24 Sebastian Huber <sebastian.huber@…>

• mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S, new-exceptions/bspsupport/ppc_exc_global_handler.c, shared/include/cpuIdent.c, shared/src/stack.c: Update due to API changes.

Location:

c/src/lib/libcpu/powerpc

Files:

• ChangeLog (modified) (1 diff)
• mpc6xx/clock/c_clock.c (modified) (1 diff)
• mpc6xx/mmu/mmuAsm.S (modified) (6 diffs)
• new-exceptions/bspsupport/ppc_exc_global_handler.c (modified) (1 diff)
• shared/include/cpuIdent.c (modified) (3 diffs)
• shared/src/stack.c (modified) (2 diffs)

c/src/lib/libcpu/powerpc/ChangeLog

@@ +1 @@
+2011-08-24      Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+        * mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S,
+        new-exceptions/bspsupport/ppc_exc_global_handler.c,
+        shared/include/cpuIdent.c, shared/src/stack.c: Update due to API
+        changes.
+
 2011-07-21      Sebastian Huber <sebastian.huber@embedded-brains.de>
 

c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c

@@ -36 +36 @@
 SPR_RW(BOOKE_TSR)
 SPR_RW(BOOKE_DECAR)
-SPR_RW(DEC)
 
 extern int BSP_connect_clock_handler (void);

c/src/lib/libcpu/powerpc/mpc6xx/mmu/mmuAsm.S

@@ -65 +65 @@
          * Enable caches and 604-specific features if necessary.
          */
-        mfspr   r9,PVR
+        mfspr   r9,PPC_PVR
         rlwinm  r9,r9,16,16,31
         cmpi    0,r9,PPC_601
@@ -129 +129 @@
 get_L2CR:
         /* Make sure this is a > 750 chip */
-        mfspr   r3,PVR
+        mfspr   r3,PPC_PVR
         rlwinm  r3,r3,16,16,31
         cmplwi  r3,PPC_750      /* it's a 750 */
@@ -180 +180 @@
 
         /* Make sure this is a > 750 chip */
-        mfspr   r0,PVR
+        mfspr   r0,PPC_PVR
         rlwinm  r0,r0,16,16,31
         cmplwi  r0,PPC_750
@@ -350 +350 @@
 get_L3CR:
         /* Make sure this is a 7455 chip */
-        mfspr   r3,PVR
+        mfspr   r3,PPC_PVR
         rlwinm  r3,r3,16,16,31
         cmplwi  r3,PPC_7455     /* it's a 7455 */
@@ -380 +380 @@
 
         /* Make sure this is a 7455 chip */
-        mfspr   r0,PVR
+        mfspr   r0,PPC_PVR
         rlwinm  r0,r0,16,16,31
         cmplwi  r0,PPC_7455
@@ -483 +483 @@
 CPU_clear_bats_early:
         li              r3,0
-        mfspr   r4,PVR
+        mfspr   r4,PPC_PVR
         rlwinm  r4,r4,16,16,31          /* r4 = 1 for 601, 4 for 604 */
         cmpwi   r4, 1

c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c

@@ -43 +43 @@
 {
   if (ppc_cpu_is_60x())
-    return PPC_SPECIAL_PURPOSE_REGISTER(DAR);
+    return PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR);
   else
     switch (ppc_cpu_is_bookE()) {

c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c

@@ -22 +22 @@
  * Generate inline code to read Processor Version Register
  */
-SPR_RO(PVR)
+SPR_RO(PPC_PVR)
 
 ppc_cpu_id_t       current_ppc_cpu      = PPC_UNKNOWN;
@@ -80 +80 @@
         return current_ppc_cpu;
 
-  pvr = (_read_PVR() >> 16);
+  pvr = (_read_PPC_PVR() >> 16);
   /*
    * apply tweaks to ignore version
@@ -211 +211 @@
 ppc_cpu_revision_t get_ppc_cpu_revision(void)
 {
-  ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_PVR() & 0xffff);
+  ppc_cpu_revision_t rev = (ppc_cpu_revision_t) (_read_PPC_PVR() & 0xffff);
   current_ppc_revision = rev;
   return rev;

c/src/lib/libcpu/powerpc/shared/src/stack.c

@@ -3 +3 @@
 #include <libcpu/spr.h>
 
-SPR_RO(LR)
+SPR_RO(PPC_LR)
 
 typedef struct FrameRec_ {
@@ -18 +18 @@
         if (pc) stack[i++]=pc;
         if (!p)
-                p = (Frame)_read_LR();
+                p = (Frame)_read_PPC_LR();
         stack[i++]=p;
         p = r1;