Changeset 1d2cfc0 in rtems
- Timestamp:
- 11/27/00 16:59:57 (23 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- eb4c6c0
- Parents:
- a3cdac3
- Location:
- c/src/lib/libbsp/m68k/sim68000
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/m68k/sim68000/ChangeLog
ra3cdac3 r1d2cfc0 1 2000-11-27 Joel Sherrill <joel@OARcorp.com> 2 3 * start/start.S, startup/bspstart.c: Not functional for CPU32 4 but hopefully will compile now and give a warning saying that 5 the CPU32 variant needs work. 6 1 7 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de> 2 8 -
c/src/lib/libbsp/m68k/sim68000/start/start.S
ra3cdac3 r1d2cfc0 56 56 | 57 57 58 #if !defined(mcpu32) 58 59 #define MAKE_EXCEPTION_VECTOR(n) V___##n: .long (_CPU_ISR_jump_table + (n * 10)) 59 60 … … 337 338 MAKE_EXCEPTION_VECTOR(254) 338 339 MAKE_EXCEPTION_VECTOR(255) 340 #endif 339 341 340 342 | -
c/src/lib/libbsp/m68k/sim68000/startup/bspstart.c
ra3cdac3 r1d2cfc0 62 62 _M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */ 63 63 64 #if defined(cpu32) 65 #warning "do something about vectors!!!" 66 #endif 67 64 68 /* 65 69 * Clear interrupt sources.
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