Changeset 1bb72a9 in rtems


Ignore:
Timestamp:
Apr 2, 2012, 9:06:34 AM (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
8bb00ac
Parents:
a3db5ff4
git-author:
Sebastian Huber <sebastian.huber@…> (04/02/12 09:06:34)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/02/12 09:40:31)
Message:

bsp/gen83xx: Support cache BSP options

Location:
c/src/lib/libbsp/powerpc/gen83xx/startup
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c

    ra3db5ff4 r1bb72a9  
    9797   */
    9898
    99 #if BSP_INSTRUCTION_CACHE_ENABLED
     99#ifdef BSP_INSTRUCTION_CACHE_ENABLED
    100100  rtems_cache_enable_instruction();
    101101#endif
    102102
    103 #if BSP_DATA_CACHE_ENABLED
     103#ifdef BSP_DATA_CACHE_ENABLED
    104104  rtems_cache_enable_data();
    105105#endif
     
    131131
    132132  /* Initialize exception handler */
     133#ifndef BSP_DATA_CACHE_ENABLED
     134  ppc_exc_cache_wb_check = 0;
     135#endif
    133136  sc = ppc_exc_initialize(
    134137    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
  • c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c

    ra3db5ff4 r1bb72a9  
    150150
    151151  /* Clear caches */
    152   PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ILOCK | HID0_DLOCK);
     152  PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ILOCK | HID0_DLOCK | HID0_ICE | HID0_DCE);
    153153  PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI);
    154154  PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI);
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