Index: doc/user/conf.t
===================================================================
--- doc/user/conf.t	(revision a31845f7f9b4770cf9ddd8b6820641d2f4f4c1da)
+++ doc/user/conf.t	(revision 1b645c3f4cb25e1e991b341e1f079e99603dd073)
@@ -5278,9 +5278,9 @@
 @section PCI Library
 
-This section defines the system configuration paramters supported
+This section defines the system configuration parameters supported
 by @code{rtems/confdefs.h} related to configuring the PCI Library
 for RTEMS.
 
-The PCI Library startup behaviour can be configured in four diffent
+The PCI Library startup behaviour can be configured in four different
 ways depending on how @code{CONFIGURE_PCI_CONFIG_LIB} is defined:
 
@@ -5299,5 +5299,5 @@
 software. The current PCI configuration is read to create the RAM
 representation (the PCI device tree) of the PCI devices present. PCI devices
-are assumed to already have been initialized and PCI buses enumrated, it is
+are assumed to already have been initialized and PCI buses enumerated, it is
 therefore required that a BIOS or a boot loader has set up configuration space
 prior to booting into RTEMS.
@@ -5308,13 +5308,13 @@
 are to be configured at compile time by linking in a custom
 @code{struct pci_bus pci_hb} tree. The static PCI library will not probe PCI
-for devices, instead it will assume that all devices defined by the user is
+for devices, instead it will assume that all devices defined by the user are
 present, it will enumerate the PCI buses and configure all PCI devices in
 static configuration accordingly. Since probe and allocation software is not
-needed the startup is faster, have smaller footprint and does not require
+needed the startup is faster, has smaller footprint and does not require
 dynamic memory allocation.
 
 @findex PCI_LIB_PERIPHERAL
 @item @code{PCI_LIB_PERIPHERAL} is used to enable the PCI peripheral
-configuration. It is similar to @code{PCI_LIB_STATIC}, but is will never write
+configuration. It is similar to @code{PCI_LIB_STATIC}, but it will never write
 the configuration to the PCI devices since PCI peripherals are not allowed to
 access PCI configuration space.
Index: doc/user/libpci.t
===================================================================
--- doc/user/libpci.t	(revision a31845f7f9b4770cf9ddd8b6820641d2f4f4c1da)
+++ doc/user/libpci.t	(revision 1b645c3f4cb25e1e991b341e1f079e99603dd073)
@@ -3,6 +3,4 @@
 @c  Aeroflex Gaisler AB
 @c  All rights reserved.
-@c
-@c  $Id: libpci.t,v v.vv xxxx/yy/zz xx:yy:zz ? Exp $
 @c
 
@@ -30,6 +28,6 @@
 systems in mind the PCI Library offers four different configuration options
 listed below. It is selected during compile time by defining the appropriate
-macros in confdefs.h. It is also possible to enable NONE (No Configuration)
-which can be used for debuging PCI access functions.
+macros in confdefs.h. It is also possible to enable PCI_LIB_NONE (No
+Configuration) which can be used for debuging PCI access functions.
 @itemize @bullet
 @item Auto Configuration (do Plug & Play)
@@ -50,7 +48,7 @@
 bridge according to the PCI Bridge Architecture specification.
 
-Using the unique [bus:slot:func] any device can be configured regardless how PCI
-is currently set up as long as all PCI buses are enumerated correctly. The
-enumration is done during probing, all bridges are given a bus numbers in
+Using the unique [bus:slot:func] any device can be configured regardless of how
+PCI is currently set up as long as all PCI buses are enumerated correctly. The
+enumeration is done during probing, all bridges are given a bus number in
 order for the bridges to respond to accesses from both directions. The PCI
 library can assign address ranges to which a PCI device should respond using
@@ -69,5 +67,5 @@
 accessed, the peripheral is set up by the host during start up. In complex
 embedded PCI systems the peripheral may need to access other PCI boards than
-then host. In such systems a custom (static) configuration of both the host
+the host. In such systems a custom (static) configuration of both the host
 and peripheral may be a convenient solution.
 
@@ -78,8 +76,10 @@
 OS.
 
-
- The PCI standard
-defines and recommends that the backplane route the interupt lines in a
-systematic way, however in 
+The PCI standard defines and recommends that the backplane route the interupt
+lines in a systematic way, however in standard there is no such requirement.
+The PCI Auto Configuration Library implements the recommended way of routing
+which is very common but it is also supported to some extent to override the
+interrupt routing from the BSP or Host Bridge driver using the configuration
+structure.
 
 @subsection Software Components
@@ -114,8 +114,8 @@
 signals are routed between PCI-to-PCI bridges and how PCI INT[A..D]# pins are
 mapped to system IRQ. In systems where previous software (boot loader or BIOS)
-has already set up this the configuration overwritten or simply read out.
+has already set up this the configuration is overwritten or simply read out.
 
 In order to support different configuration methods the following configuration
-libraries are available can selectable by the user:
+libraries are selectable by the user:
 @itemize @bullet
 @item Auto Configuration (run Plug & Play software)
@@ -151,12 +151,12 @@
 @subsubsection Auto Configuration
 
-The auto configuration software enumerate PCI buses and initializes all PCI
+The auto configuration software enumerates PCI buses and initializes all PCI
 devices found using Plug & Play. The auto configuration software requires
 that a configuration setup has been registered by the driver or BSP in order
 to setup the I/O and Memory regions at the correct address ranges. PCI
 interrupt pins can optionally be routed over PCI-to-PCI bridges and mapped
-to a system interrupt number. Resources are sorted by size and required
+to a system interrupt number. BAR resources are sorted by size and required
 alignment, unused "dead" space may be created when PCI bridges are present
-due to the PCI bridge window size does not equal the alignment, to cope with
+due to the PCI bridge window size does not equal the alignment. To cope with
 that resources are reordered to fit smaller BARs into the dead space to minimize
 the PCI space required. If a BAR or ROM register can not be allocated a PCI
@@ -225,5 +225,5 @@
 
 A PCI peripheral is not allowed to do PCI configuration cycles, which means that
-is must either rely on the host to give it the addresses it needs, or that the
+it must either rely on the host to give it the addresses it needs, or that the
 addresses are predefined.
 
@@ -242,5 +242,5 @@
 @item PCI I/O space
 @item Registers over PCI memory space
-@item Translate PCI address into CPU accessible address and vice verse
+@item Translate PCI address into CPU accessible address and vice versa
 @end itemize
 
@@ -263,5 +263,5 @@
 pci_dev_t type is used to specify a specific PCI bus, device and function. It
 is up to the host driver or BSP to create a valid access to the requested
-PCI slot. Requests made to slots that is not supported by hardware should
+PCI slot. Requests made to slots that are not supported by hardware should
 result in PCISTS_MSTABRT and/or data must be ignored (writes) or 0xffffffff
 is always returned (reads).
@@ -289,5 +289,5 @@
 given to the functions is not the PCI I/O addresses, the caller must have
 translated PCI I/O addresses (available in the PCI BARs) into a BSP or host
-driver custom address, see @ref{Access functions} how addresses are
+driver custom address, see @ref{Access functions} for how addresses are
 translated.
 
@@ -335,5 +335,5 @@
 The PCI Access Library can provide device drivers with function pointers
 executing the above Configuration, I/O and Memory space accesses. The
-functions have the same arguments and return values as the as the above
+functions have the same arguments and return values as the above
 functions.
 
@@ -359,5 +359,5 @@
 @end example
 
-PCI devices drivers may be written to support run-time detection of endianess,
+PCI device drivers may be written to support run-time detection of endianess,
 this is mosly for debugging or for development systems. When the product is
 finally deployed macros switch to using the inline functions instead which
@@ -371,5 +371,5 @@
 using configuration space routines or in the device tree, the addresses given
 are PCI addresses. The below functions can be used to translate PCI addresses
-into CPU accessible addresses or vise versa, translation may be different for
+into CPU accessible addresses or vice versa, translation may be different for
 different PCI spaces/regions.
 
@@ -405,5 +405,5 @@
 @subsection PCI Shell command
 
-The RTEMS shell have a PCI command 'pci' which makes it possible to read/write
+The RTEMS shell has a PCI command 'pci' which makes it possible to read/write
 configuration space, print the current PCI configuration and print out a
 configuration C-file for the static or peripheral library.
