- Timestamp:
- 04/08/15 15:00:43 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- cc3f87c0
- Parents:
- f4bf22c
- git-author:
- Daniel Hellstrom <daniel@…> (04/08/15 15:00:43)
- git-committer:
- Daniel Hellstrom <daniel@…> (04/16/15 23:10:28)
- Location:
- doc/user
- Files:
-
- 2 edited
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doc/user/conf.t
rf4bf22c r1b645c3 5278 5278 @section PCI Library 5279 5279 5280 This section defines the system configuration param ters supported5280 This section defines the system configuration parameters supported 5281 5281 by @code{rtems/confdefs.h} related to configuring the PCI Library 5282 5282 for RTEMS. 5283 5283 5284 The PCI Library startup behaviour can be configured in four diffe nt5284 The PCI Library startup behaviour can be configured in four different 5285 5285 ways depending on how @code{CONFIGURE_PCI_CONFIG_LIB} is defined: 5286 5286 … … 5299 5299 software. The current PCI configuration is read to create the RAM 5300 5300 representation (the PCI device tree) of the PCI devices present. PCI devices 5301 are assumed to already have been initialized and PCI buses enum rated, it is5301 are assumed to already have been initialized and PCI buses enumerated, it is 5302 5302 therefore required that a BIOS or a boot loader has set up configuration space 5303 5303 prior to booting into RTEMS. … … 5308 5308 are to be configured at compile time by linking in a custom 5309 5309 @code{struct pci_bus pci_hb} tree. The static PCI library will not probe PCI 5310 for devices, instead it will assume that all devices defined by the user is5310 for devices, instead it will assume that all devices defined by the user are 5311 5311 present, it will enumerate the PCI buses and configure all PCI devices in 5312 5312 static configuration accordingly. Since probe and allocation software is not 5313 needed the startup is faster, ha vesmaller footprint and does not require5313 needed the startup is faster, has smaller footprint and does not require 5314 5314 dynamic memory allocation. 5315 5315 5316 5316 @findex PCI_LIB_PERIPHERAL 5317 5317 @item @code{PCI_LIB_PERIPHERAL} is used to enable the PCI peripheral 5318 configuration. It is similar to @code{PCI_LIB_STATIC}, but i swill never write5318 configuration. It is similar to @code{PCI_LIB_STATIC}, but it will never write 5319 5319 the configuration to the PCI devices since PCI peripherals are not allowed to 5320 5320 access PCI configuration space. -
doc/user/libpci.t
rf4bf22c r1b645c3 3 3 @c Aeroflex Gaisler AB 4 4 @c All rights reserved. 5 @c6 @c $Id: libpci.t,v v.vv xxxx/yy/zz xx:yy:zz ? Exp $7 5 @c 8 6 … … 30 28 systems in mind the PCI Library offers four different configuration options 31 29 listed below. It is selected during compile time by defining the appropriate 32 macros in confdefs.h. It is also possible to enable NONE (No Configuration)33 which can be used for debuging PCI access functions.30 macros in confdefs.h. It is also possible to enable PCI_LIB_NONE (No 31 Configuration) which can be used for debuging PCI access functions. 34 32 @itemize @bullet 35 33 @item Auto Configuration (do Plug & Play) … … 50 48 bridge according to the PCI Bridge Architecture specification. 51 49 52 Using the unique [bus:slot:func] any device can be configured regardless how PCI53 is currently set up as long as all PCI buses are enumerated correctly. The54 enum ration is done during probing, all bridges are given a bus numbersin50 Using the unique [bus:slot:func] any device can be configured regardless of how 51 PCI is currently set up as long as all PCI buses are enumerated correctly. The 52 enumeration is done during probing, all bridges are given a bus number in 55 53 order for the bridges to respond to accesses from both directions. The PCI 56 54 library can assign address ranges to which a PCI device should respond using … … 69 67 accessed, the peripheral is set up by the host during start up. In complex 70 68 embedded PCI systems the peripheral may need to access other PCI boards than 71 the nhost. In such systems a custom (static) configuration of both the host69 the host. In such systems a custom (static) configuration of both the host 72 70 and peripheral may be a convenient solution. 73 71 … … 78 76 OS. 79 77 80 81 The PCI standard 82 defines and recommends that the backplane route the interupt lines in a 83 systematic way, however in 78 The PCI standard defines and recommends that the backplane route the interupt 79 lines in a systematic way, however in standard there is no such requirement. 80 The PCI Auto Configuration Library implements the recommended way of routing 81 which is very common but it is also supported to some extent to override the 82 interrupt routing from the BSP or Host Bridge driver using the configuration 83 structure. 84 84 85 85 @subsection Software Components … … 114 114 signals are routed between PCI-to-PCI bridges and how PCI INT[A..D]# pins are 115 115 mapped to system IRQ. In systems where previous software (boot loader or BIOS) 116 has already set up this the configuration overwritten or simply read out.116 has already set up this the configuration is overwritten or simply read out. 117 117 118 118 In order to support different configuration methods the following configuration 119 libraries are available canselectable by the user:119 libraries are selectable by the user: 120 120 @itemize @bullet 121 121 @item Auto Configuration (run Plug & Play software) … … 151 151 @subsubsection Auto Configuration 152 152 153 The auto configuration software enumerate PCI buses and initializes all PCI153 The auto configuration software enumerates PCI buses and initializes all PCI 154 154 devices found using Plug & Play. The auto configuration software requires 155 155 that a configuration setup has been registered by the driver or BSP in order 156 156 to setup the I/O and Memory regions at the correct address ranges. PCI 157 157 interrupt pins can optionally be routed over PCI-to-PCI bridges and mapped 158 to a system interrupt number. Resources are sorted by size and required158 to a system interrupt number. BAR resources are sorted by size and required 159 159 alignment, unused "dead" space may be created when PCI bridges are present 160 due to the PCI bridge window size does not equal the alignment , to cope with160 due to the PCI bridge window size does not equal the alignment. To cope with 161 161 that resources are reordered to fit smaller BARs into the dead space to minimize 162 162 the PCI space required. If a BAR or ROM register can not be allocated a PCI … … 225 225 226 226 A PCI peripheral is not allowed to do PCI configuration cycles, which means that 227 i smust either rely on the host to give it the addresses it needs, or that the227 it must either rely on the host to give it the addresses it needs, or that the 228 228 addresses are predefined. 229 229 … … 242 242 @item PCI I/O space 243 243 @item Registers over PCI memory space 244 @item Translate PCI address into CPU accessible address and vice vers e244 @item Translate PCI address into CPU accessible address and vice versa 245 245 @end itemize 246 246 … … 263 263 pci_dev_t type is used to specify a specific PCI bus, device and function. It 264 264 is up to the host driver or BSP to create a valid access to the requested 265 PCI slot. Requests made to slots that isnot supported by hardware should265 PCI slot. Requests made to slots that are not supported by hardware should 266 266 result in PCISTS_MSTABRT and/or data must be ignored (writes) or 0xffffffff 267 267 is always returned (reads). … … 289 289 given to the functions is not the PCI I/O addresses, the caller must have 290 290 translated PCI I/O addresses (available in the PCI BARs) into a BSP or host 291 driver custom address, see @ref{Access functions} how addresses are291 driver custom address, see @ref{Access functions} for how addresses are 292 292 translated. 293 293 … … 335 335 The PCI Access Library can provide device drivers with function pointers 336 336 executing the above Configuration, I/O and Memory space accesses. The 337 functions have the same arguments and return values as the a s the above337 functions have the same arguments and return values as the above 338 338 functions. 339 339 … … 359 359 @end example 360 360 361 PCI device sdrivers may be written to support run-time detection of endianess,361 PCI device drivers may be written to support run-time detection of endianess, 362 362 this is mosly for debugging or for development systems. When the product is 363 363 finally deployed macros switch to using the inline functions instead which … … 371 371 using configuration space routines or in the device tree, the addresses given 372 372 are PCI addresses. The below functions can be used to translate PCI addresses 373 into CPU accessible addresses or vi se versa, translation may be different for373 into CPU accessible addresses or vice versa, translation may be different for 374 374 different PCI spaces/regions. 375 375 … … 405 405 @subsection PCI Shell command 406 406 407 The RTEMS shell ha vea PCI command 'pci' which makes it possible to read/write407 The RTEMS shell has a PCI command 'pci' which makes it possible to read/write 408 408 configuration space, print the current PCI configuration and print out a 409 409 configuration C-file for the static or peripheral library.
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