Changeset 19acb3b in rtems


Ignore:
Timestamp:
Jan 12, 2021, 9:31:27 AM (3 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
51e59d5
Parents:
9165349d
git-author:
Sebastian Huber <sebastian.huber@…> (01/12/21 09:31:27)
git-committer:
Sebastian Huber <sebastian.huber@…> (02/01/21 05:26:18)
Message:

nios2: Optimize ISR dispatch variant

Use _Thread_Do_dispatch() in
_Nios2_ISR_Dispatch_with_shadow_non_preemptive().

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/nios2/nios2-eic-il-low-level.S

    r9165349d r19acb3b  
    5656
    5757        /* Increment and store thread dispatch disable level */
    58         addi    r9, r16, 1
    59         stw     r9, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
     58        addi    r17, r16, 1
     59        stw     r17, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    6060
    6161        /* Call high level handler with argument */
    6262        callr   r8
    6363
    64         /* Load thread dispatch necessary */
     64        /* Load the thread dispatch necessary indicator */
    6565        ldb     r12, %gprel(_Per_CPU_Information + PER_CPU_DISPATCH_NEEDED)(gp)
    6666
    67         /* Load thread dispatch after ISR disable indicator */
     67        /* Load the thread dispatch after ISR disable indicator */
    6868        ldw     r13, %gprel(_Per_CPU_Information + PER_CPU_ISR_DISPATCH_DISABLE)(gp)
    6969
     
    7575
    7676        /*
    77          * Restore the thread dispatch disable level.  We must do this before
    78          * we return to the normal register set, because otherwise we have
    79          * problems if someone deletes or restarts the interrupted thread while
    80          * we are in the thread dispatch helper.
    81          */
    82         stw     r16, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    83 
    84         /* Is thread dispatch allowed? */
    85         bne     r16, zero, no_thread_dispatch
    86 
    87         /* Is thread dispatch necessary? */
    88         beq     r12, zero, no_thread_dispatch
    89 
    90         /* Is outermost interrupt? */
    91         andhi   r14, r14, 0x3f
    92         bne     r14, zero, no_thread_dispatch
    93 
    94         /* Is thread dispatch after ISR allowed? */
    95         bne     r13, zero, no_thread_dispatch
     77         * If the current thread dispatch disable level (r17) is one, then
     78         * negate the thread dispatch necessary indicator, otherwise the value
     79         * is irrelevant.  Or it with the previous thread dispatch disable
     80         * level value (r16).  The r15 which will be used as a status to
     81         * determine if a thread dispatch is necessary and allowed.
     82         */
     83        xor     r12, r17, r12
     84        or      r15, r12, r16
     85
     86        /*
     87         * Get the previous register set from r14.  If it is zero, then this is
     88         * the outermost interrupt.  Or it to the thread dispatch status (r15).
     89         */
     90        andhi   r12, r14, 0x3f
     91        or      r15, r12, r15
     92
     93        /*
     94         * Or the thread dispatch after ISR disable indicator (r13) to the
     95         * thread dispatch status (r15).
     96         */
     97        or      r15, r13, r15
     98
     99        /* Is a thread dispatch necessary and allowed? */
     100        bne     r15, zero, no_thread_dispatch
    96101
    97102        /* Obtain stack frame in normal register set */
     
    99104
    100105        /* Disable thread dispatch after ISR */
    101         stw     r12, %gprel(_Per_CPU_Information + PER_CPU_ISR_DISPATCH_DISABLE)(gp)
     106        stw     r17, %gprel(_Per_CPU_Information + PER_CPU_ISR_DISPATCH_DISABLE)(gp)
    102107
    103108        /* Save context */
     
    112117        wrprs   sp, r15
    113118
     119        /* Jump to thread dispatch helper */
     120        eret
     121
    114122no_thread_dispatch:
    115123
    116         /*
    117          * Return to thread dispatch helper, interrupted thread or interrupted
    118          * lower level interrupt service routine.
    119         */
     124        /* Restore the thread dispatch disable level */
     125        stw     r16, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
     126
     127        /* Return to interrupted context */
    120128        eret
    121129
     
    142150        stw     r15, FRAME_OFFSET_R15(sp)
    143151
     152        /*
     153         * Disable interrupts (1).
     154         *
     155         * We have the following invariants:
     156         *   1. status.RSIE == 0: thread context initialization
     157         *   2. status.CRS == 0: thread context initialization
     158         *   3. status.PRS: arbitrary
     159         *   4. status.IL < interrupt disable IL: else we would not be here
     160         *   5. status.IH == 0: thread context initialization
     161         *   6. status.U == 0: thread context initialization
     162         *   7. status.PIE == 1: thread context initialization
     163         * Thus we can use a constant to disable interrupts.
     164         */
     165        movi    r5, %lo(_Nios2_ISR_Status_interrupts_disabled)
     166        wrctl   status, r5
     167
    144168do_thread_dispatch:
    145169
    146         call    _Thread_Dispatch
     170        addi    r4, gp, %gprel(_Per_CPU_Information)
     171        call    _Thread_Do_dispatch
    147172
    148173        /* Restore some volatile registers */
     
    161186        ldw     r12, FRAME_OFFSET_R12(sp)
    162187
    163         /*
    164          * Disable interrupts.
    165          *
    166          * We have the following invariants:
    167          *   1. status.RSIE == 0: thread context initialization
    168          *   2. status.CRS == 0: thread context initialization
    169          *   3. status.PRS: arbitrary
    170          *   4. status.IL < interrupt disable IL: else we would not be here
    171          *   5. status.IH == 0: thread context initialization
    172          *   6. status.U == 0: thread context initialization
    173          *   7. status.PIE == 1: thread context initialization
    174          * Thus we can use a constant to disable interrupts.
    175          */
     188        /* Disable interrupts, see (1) */
    176189        rdctl   r14, status
    177190        movi    r15, %lo(_Nios2_ISR_Status_interrupts_disabled)
     
    182195
    183196        /* Is thread dispatch necessary? */
    184         bne     r13, zero, enable_interrupts_before_thread_dispatch
     197        bne     r13, zero, prepare_thread_dispatch
    185198
    186199        /* Enable thread dispatch after ISR */
     
    205218        eret
    206219
    207 enable_interrupts_before_thread_dispatch:
    208 
    209         /* Restore status */
    210         wrctl   status, r14
     220prepare_thread_dispatch:
     221
     222        /* Disable thread dispatching */
     223        movi    r4, 1
     224        stw     r4, %gprel(_Per_CPU_Information + PER_CPU_ISR_DISPATCH_DISABLE)(gp)
     225        stw     r4, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
     226
     227        /* Set interrupt level argument for _Thread_Do_dispatch() */
     228        mov     r5, r15
    211229
    212230        br      do_thread_dispatch
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